ARM: EXYNOS: Add ARCH_EXYNOS and reorganize arch/arm/mach-exynos
The arch/arm/mach-exynos4 directory (CONFIG_ARCH_EXYNOS4) has made for plaforms based on EXYNOS4 SoCs. But since upcoming Samsung's SoCs such as EXYNOS5 (ARM Cortex A15) can reuse most codes in current mach-exynos4, one mach-exynos directory will be used for them. This patch changes to CONFIG_ARCH_EXYNOS (arch/arm/mach-exynos) but keeps original CONFIG_ARCH_EXYNOS4 in mach-exynos/Kconfig to avoid changing in driver side. Cc: Arnd Bergmann <arnd@arndb.de> Cc: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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@ -837,8 +837,8 @@ config ARCH_S5PV210
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help
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help
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Samsung S5PV210/S5PC110 series based systems
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Samsung S5PV210/S5PC110 series based systems
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config ARCH_EXYNOS4
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config ARCH_EXYNOS
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bool "Samsung EXYNOS4"
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bool "SAMSUNG EXYNOS"
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select CPU_V7
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select CPU_V7
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select ARCH_SPARSEMEM_ENABLE
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select ARCH_SPARSEMEM_ENABLE
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select ARCH_HAS_HOLES_MEMORYMODEL
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select ARCH_HAS_HOLES_MEMORYMODEL
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@ -852,7 +852,7 @@ config ARCH_EXYNOS4
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select HAVE_S3C2410_WATCHDOG if WATCHDOG
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select HAVE_S3C2410_WATCHDOG if WATCHDOG
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select NEED_MACH_MEMORY_H
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select NEED_MACH_MEMORY_H
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help
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help
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Samsung EXYNOS4 series based systems
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Support for SAMSUNG's EXYNOS SoCs (EXYNOS4/5)
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config ARCH_SHARK
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config ARCH_SHARK
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bool "Shark"
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bool "Shark"
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@ -1079,7 +1079,7 @@ source "arch/arm/mach-s5pc100/Kconfig"
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source "arch/arm/mach-s5pv210/Kconfig"
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source "arch/arm/mach-s5pv210/Kconfig"
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source "arch/arm/mach-exynos4/Kconfig"
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source "arch/arm/mach-exynos/Kconfig"
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source "arch/arm/mach-shmobile/Kconfig"
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source "arch/arm/mach-shmobile/Kconfig"
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@ -180,7 +180,7 @@ machine-$(CONFIG_ARCH_S3C64XX) := s3c64xx
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machine-$(CONFIG_ARCH_S5P64X0) := s5p64x0
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machine-$(CONFIG_ARCH_S5P64X0) := s5p64x0
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machine-$(CONFIG_ARCH_S5PC100) := s5pc100
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machine-$(CONFIG_ARCH_S5PC100) := s5pc100
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machine-$(CONFIG_ARCH_S5PV210) := s5pv210
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machine-$(CONFIG_ARCH_S5PV210) := s5pv210
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machine-$(CONFIG_ARCH_EXYNOS4) := exynos4
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machine-$(CONFIG_ARCH_EXYNOS4) := exynos
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machine-$(CONFIG_ARCH_SA1100) := sa1100
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machine-$(CONFIG_ARCH_SA1100) := sa1100
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machine-$(CONFIG_ARCH_SHARK) := shark
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machine-$(CONFIG_ARCH_SHARK) := shark
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machine-$(CONFIG_ARCH_SHMOBILE) := shmobile
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machine-$(CONFIG_ARCH_SHMOBILE) := shmobile
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@ -4,19 +4,18 @@ CONFIG_KALLSYMS_ALL=y
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CONFIG_MODULES=y
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CONFIG_MODULES=y
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CONFIG_MODULE_UNLOAD=y
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CONFIG_MODULE_UNLOAD=y
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# CONFIG_BLK_DEV_BSG is not set
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# CONFIG_BLK_DEV_BSG is not set
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CONFIG_ARCH_EXYNOS4=y
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CONFIG_ARCH_EXYNOS=y
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CONFIG_S3C_LOWLEVEL_UART_PORT=1
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CONFIG_S3C_LOWLEVEL_UART_PORT=1
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CONFIG_MACH_SMDKC210=y
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CONFIG_MACH_SMDKC210=y
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CONFIG_MACH_SMDKV310=y
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CONFIG_MACH_ARMLEX4210=y
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CONFIG_MACH_ARMLEX4210=y
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CONFIG_MACH_UNIVERSAL_C210=y
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CONFIG_MACH_UNIVERSAL_C210=y
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CONFIG_MACH_NURI=y
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CONFIG_MACH_NURI=y
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CONFIG_MACH_ORIGEN=y
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CONFIG_MACH_ORIGEN=y
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CONFIG_MACH_SMDK4412=y
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CONFIG_NO_HZ=y
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CONFIG_NO_HZ=y
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CONFIG_HIGH_RES_TIMERS=y
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CONFIG_HIGH_RES_TIMERS=y
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CONFIG_SMP=y
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CONFIG_SMP=y
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CONFIG_NR_CPUS=2
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CONFIG_NR_CPUS=2
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CONFIG_HOTPLUG_CPU=y
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CONFIG_PREEMPT=y
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CONFIG_PREEMPT=y
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CONFIG_AEABI=y
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CONFIG_AEABI=y
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CONFIG_CMDLINE="root=/dev/ram0 rw ramdisk=8192 initrd=0x41000000,8M console=ttySAC1,115200 init=/linuxrc mem=256M"
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CONFIG_CMDLINE="root=/dev/ram0 rw ramdisk=8192 initrd=0x41000000,8M console=ttySAC1,115200 init=/linuxrc mem=256M"
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@ -61,13 +60,9 @@ CONFIG_DETECT_HUNG_TASK=y
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CONFIG_DEBUG_RT_MUTEXES=y
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CONFIG_DEBUG_RT_MUTEXES=y
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CONFIG_DEBUG_SPINLOCK=y
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CONFIG_DEBUG_SPINLOCK=y
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CONFIG_DEBUG_MUTEXES=y
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CONFIG_DEBUG_MUTEXES=y
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CONFIG_DEBUG_SPINLOCK_SLEEP=y
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CONFIG_DEBUG_INFO=y
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CONFIG_DEBUG_INFO=y
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# CONFIG_RCU_CPU_STALL_DETECTOR is not set
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CONFIG_SYSCTL_SYSCALL_CHECK=y
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CONFIG_SYSCTL_SYSCALL_CHECK=y
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CONFIG_DEBUG_USER=y
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CONFIG_DEBUG_USER=y
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CONFIG_DEBUG_ERRORS=y
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CONFIG_DEBUG_LL=y
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CONFIG_DEBUG_LL=y
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CONFIG_EARLY_PRINTK=y
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CONFIG_EARLY_PRINTK=y
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CONFIG_DEBUG_S3C_UART=1
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CONFIG_CRC_CCITT=y
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CONFIG_CRC_CCITT=y
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@ -1,4 +1,4 @@
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# arch/arm/mach-exynos4/Kconfig
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# arch/arm/mach-exynos/Kconfig
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#
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#
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# Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
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# Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
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# http://www.samsung.com/
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# http://www.samsung.com/
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@ -7,10 +7,27 @@
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# Configuration options for the EXYNOS4
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# Configuration options for the EXYNOS4
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if ARCH_EXYNOS4
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if ARCH_EXYNOS
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menu "SAMSUNG EXYNOS SoCs Support"
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choice
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prompt "EXYNOS System Type"
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default ARCH_EXYNOS4
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config ARCH_EXYNOS4
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bool "SAMSUNG EXYNOS4"
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help
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Samsung EXYNOS4 SoCs based systems
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endchoice
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comment "EXYNOS SoCs"
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config CPU_EXYNOS4210
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config CPU_EXYNOS4210
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bool
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bool "SAMSUNG EXYNOS4210"
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default y
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depends on ARCH_EXYNOS4
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select SAMSUNG_DMADEV
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select SAMSUNG_DMADEV
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select ARM_CPU_SUSPEND if PM
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select ARM_CPU_SUSPEND if PM
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select S5P_PM if PM
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select S5P_PM if PM
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@ -19,15 +36,18 @@ config CPU_EXYNOS4210
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Enable EXYNOS4210 CPU support
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Enable EXYNOS4210 CPU support
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config SOC_EXYNOS4212
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config SOC_EXYNOS4212
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bool
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bool "SAMSUNG EXYNOS4212"
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select ARM_CPU_SUSPEND if PM
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default y
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depends on ARCH_EXYNOS4
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select S5P_PM if PM
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select S5P_PM if PM
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select S5P_SLEEP if PM
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select S5P_SLEEP if PM
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help
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help
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Enable EXYNOS4212 SoC support
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Enable EXYNOS4212 SoC support
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config SOC_EXYNOS4412
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config SOC_EXYNOS4412
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bool
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bool "SAMSUNG EXYNOS4412"
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default y
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depends on ARCH_EXYNOS4
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help
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help
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Enable EXYNOS4412 SoC support
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Enable EXYNOS4412 SoC support
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@ -125,7 +145,7 @@ config EXYNOS4_SETUP_USB_PHY
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# machine support
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# machine support
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menu "EXYNOS4 Machines"
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if ARCH_EXYNOS4
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comment "EXYNOS4210 Boards"
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comment "EXYNOS4210 Boards"
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@ -305,12 +325,11 @@ config MACH_SMDK4412
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select MACH_SMDK4212
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select MACH_SMDK4212
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help
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help
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Machine support for Samsung SMDK4412
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Machine support for Samsung SMDK4412
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endif
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endmenu
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if ARCH_EXYNOS4
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comment "Configuration for HSMMC bus width"
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comment "Configuration for HSMMC 8-bit bus width"
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menu "Use 8-bit bus width"
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config EXYNOS4_SDHCI_CH0_8BIT
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config EXYNOS4_SDHCI_CH0_8BIT
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bool "Channel 0 with 8-bit bus"
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bool "Channel 0 with 8-bit bus"
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@ -323,6 +342,7 @@ config EXYNOS4_SDHCI_CH2_8BIT
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help
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help
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Support HSMMC Channel 2 8-bit bus.
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Support HSMMC Channel 2 8-bit bus.
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If selected, Channel 3 is disabled.
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If selected, Channel 3 is disabled.
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endif
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endmenu
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endmenu
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@ -1,4 +1,4 @@
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# arch/arm/mach-exynos4/Makefile
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# arch/arm/mach-exynos/Makefile
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#
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#
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# Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
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# Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
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# http://www.samsung.com/
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# http://www.samsung.com/
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@ -12,8 +12,8 @@ obj- :=
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# Core support for EXYNOS4 system
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# Core support for EXYNOS4 system
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obj-$(CONFIG_ARCH_EXYNOS4) += cpu.o init.o clock.o irq-combiner.o
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obj-$(CONFIG_ARCH_EXYNOS4) += cpu.o init.o clock.o irq-combiner.o setup-i2c0.o
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obj-$(CONFIG_ARCH_EXYNOS4) += setup-i2c0.o irq-eint.o dma.o pmu.o
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obj-$(CONFIG_ARCH_EXYNOS4) += irq-eint.o dma.o pmu.o
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obj-$(CONFIG_CPU_EXYNOS4210) += clock-exynos4210.o
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obj-$(CONFIG_CPU_EXYNOS4210) += clock-exynos4210.o
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obj-$(CONFIG_SOC_EXYNOS4212) += clock-exynos4212.o
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obj-$(CONFIG_SOC_EXYNOS4212) += clock-exynos4212.o
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obj-$(CONFIG_PM) += pm.o
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obj-$(CONFIG_PM) += pm.o
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@ -39,11 +39,11 @@ obj-$(CONFIG_MACH_SMDK4412) += mach-smdk4x12.o
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# device support
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# device support
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obj-y += dev-audio.o
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obj-$(CONFIG_ARCH_EXYNOS4) += dev-audio.o
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obj-$(CONFIG_EXYNOS4_DEV_AHCI) += dev-ahci.o
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obj-$(CONFIG_EXYNOS4_DEV_AHCI) += dev-ahci.o
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obj-$(CONFIG_EXYNOS4_DEV_PD) += dev-pd.o
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obj-$(CONFIG_EXYNOS4_DEV_PD) += dev-pd.o
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obj-$(CONFIG_EXYNOS4_DEV_SYSMMU) += dev-sysmmu.o
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obj-$(CONFIG_EXYNOS4_DEV_SYSMMU) += dev-sysmmu.o
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obj-$(CONFIG_EXYNOS4_DEV_DWMCI) += dev-dwmci.o
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obj-$(CONFIG_EXYNOS4_DEV_DWMCI) += dev-dwmci.o
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obj-$(CONFIG_EXYNOS4_SETUP_FIMC) += setup-fimc.o
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obj-$(CONFIG_EXYNOS4_SETUP_FIMC) += setup-fimc.o
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obj-$(CONFIG_EXYNOS4_SETUP_FIMD0) += setup-fimd0.o
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obj-$(CONFIG_EXYNOS4_SETUP_FIMD0) += setup-fimd0.o
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@ -57,5 +57,4 @@ obj-$(CONFIG_EXYNOS4_SETUP_I2C7) += setup-i2c7.o
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obj-$(CONFIG_EXYNOS4_SETUP_KEYPAD) += setup-keypad.o
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obj-$(CONFIG_EXYNOS4_SETUP_KEYPAD) += setup-keypad.o
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obj-$(CONFIG_EXYNOS4_SETUP_SDHCI) += setup-sdhci.o
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obj-$(CONFIG_EXYNOS4_SETUP_SDHCI) += setup-sdhci.o
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obj-$(CONFIG_EXYNOS4_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o
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obj-$(CONFIG_EXYNOS4_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o
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obj-$(CONFIG_EXYNOS4_SETUP_USB_PHY) += setup-usb-phy.o
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obj-$(CONFIG_EXYNOS4_SETUP_USB_PHY) += setup-usb-phy.o
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@ -1,4 +1,4 @@
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/* linux/arch/arm/mach-exynos4/cpu.c
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/* linux/arch/arm/mach-exynos/cpu.c
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*
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*
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* Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
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* Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
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* http://www.samsung.com
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* http://www.samsung.com
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@ -40,27 +40,46 @@ extern int combiner_init(unsigned int combiner_nr, void __iomem *base,
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extern void combiner_cascade_irq(unsigned int combiner_nr, unsigned int irq);
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extern void combiner_cascade_irq(unsigned int combiner_nr, unsigned int irq);
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/* Initial IO mappings */
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/* Initial IO mappings */
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static struct map_desc exynos4_iodesc[] __initdata = {
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static struct map_desc exynos_iodesc[] __initdata = {
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{
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{
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.virtual = (unsigned long)S5P_VA_SYSTIMER,
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.virtual = (unsigned long)S5P_VA_SYSTIMER,
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.pfn = __phys_to_pfn(EXYNOS4_PA_SYSTIMER),
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.pfn = __phys_to_pfn(EXYNOS_PA_SYSTIMER),
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.length = SZ_4K,
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.length = SZ_4K,
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.type = MT_DEVICE,
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}, {
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.virtual = (unsigned long)S5P_VA_CMU,
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.pfn = __phys_to_pfn(EXYNOS4_PA_CMU),
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.length = SZ_128K,
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.type = MT_DEVICE,
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.type = MT_DEVICE,
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}, {
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}, {
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.virtual = (unsigned long)S5P_VA_PMU,
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.virtual = (unsigned long)S5P_VA_PMU,
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.pfn = __phys_to_pfn(EXYNOS4_PA_PMU),
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.pfn = __phys_to_pfn(EXYNOS_PA_PMU),
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.length = SZ_64K,
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.length = SZ_64K,
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.type = MT_DEVICE,
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.type = MT_DEVICE,
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}, {
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}, {
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.virtual = (unsigned long)S5P_VA_COMBINER_BASE,
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.virtual = (unsigned long)S5P_VA_COMBINER_BASE,
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.pfn = __phys_to_pfn(EXYNOS4_PA_COMBINER),
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.pfn = __phys_to_pfn(EXYNOS_PA_COMBINER),
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.length = SZ_4K,
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.length = SZ_4K,
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.type = MT_DEVICE,
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.type = MT_DEVICE,
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}, {
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.virtual = (unsigned long)S5P_VA_GIC_CPU,
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.pfn = __phys_to_pfn(EXYNOS_PA_GIC_CPU),
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.length = SZ_64K,
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.type = MT_DEVICE,
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}, {
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.virtual = (unsigned long)S5P_VA_GIC_DIST,
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.pfn = __phys_to_pfn(EXYNOS_PA_GIC_DIST),
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.length = SZ_64K,
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.type = MT_DEVICE,
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}, {
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.virtual = (unsigned long)S3C_VA_UART,
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.pfn = __phys_to_pfn(S3C_PA_UART),
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.length = SZ_512K,
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.type = MT_DEVICE,
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},
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};
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static struct map_desc exynos4_iodesc[] __initdata = {
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{
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.virtual = (unsigned long)S5P_VA_CMU,
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.pfn = __phys_to_pfn(EXYNOS4_PA_CMU),
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.length = SZ_128K,
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.type = MT_DEVICE,
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}, {
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}, {
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.virtual = (unsigned long)S5P_VA_COREPERI_BASE,
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.virtual = (unsigned long)S5P_VA_COREPERI_BASE,
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.pfn = __phys_to_pfn(EXYNOS4_PA_COREPERI),
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.pfn = __phys_to_pfn(EXYNOS4_PA_COREPERI),
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@ -91,11 +110,6 @@ static struct map_desc exynos4_iodesc[] __initdata = {
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.pfn = __phys_to_pfn(EXYNOS4_PA_DMC0),
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.pfn = __phys_to_pfn(EXYNOS4_PA_DMC0),
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.length = SZ_4K,
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.length = SZ_4K,
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.type = MT_DEVICE,
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.type = MT_DEVICE,
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}, {
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.virtual = (unsigned long)S3C_VA_UART,
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.pfn = __phys_to_pfn(S3C_PA_UART),
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.length = SZ_512K,
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.type = MT_DEVICE,
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}, {
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}, {
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.virtual = (unsigned long)S5P_VA_SROMC,
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.virtual = (unsigned long)S5P_VA_SROMC,
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.pfn = __phys_to_pfn(EXYNOS4_PA_SROMC),
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.pfn = __phys_to_pfn(EXYNOS4_PA_SROMC),
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@ -106,16 +120,6 @@ static struct map_desc exynos4_iodesc[] __initdata = {
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.pfn = __phys_to_pfn(EXYNOS4_PA_HSPHY),
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.pfn = __phys_to_pfn(EXYNOS4_PA_HSPHY),
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.length = SZ_4K,
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.length = SZ_4K,
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.type = MT_DEVICE,
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.type = MT_DEVICE,
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}, {
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|
||||||
.virtual = (unsigned long)S5P_VA_GIC_CPU,
|
|
||||||
.pfn = __phys_to_pfn(EXYNOS4_PA_GIC_CPU),
|
|
||||||
.length = SZ_64K,
|
|
||||||
.type = MT_DEVICE,
|
|
||||||
}, {
|
|
||||||
.virtual = (unsigned long)S5P_VA_GIC_DIST,
|
|
||||||
.pfn = __phys_to_pfn(EXYNOS4_PA_GIC_DIST),
|
|
||||||
.length = SZ_64K,
|
|
||||||
.type = MT_DEVICE,
|
|
||||||
},
|
},
|
||||||
};
|
};
|
||||||
|
|
||||||
|
@ -137,7 +141,7 @@ static struct map_desc exynos4_iodesc1[] __initdata = {
|
||||||
},
|
},
|
||||||
};
|
};
|
||||||
|
|
||||||
static void exynos4_idle(void)
|
static void exynos_idle(void)
|
||||||
{
|
{
|
||||||
if (!need_resched())
|
if (!need_resched())
|
||||||
cpu_do_idle();
|
cpu_do_idle();
|
||||||
|
@ -151,12 +155,13 @@ static void exynos4_sw_reset(void)
|
||||||
}
|
}
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* exynos4_map_io
|
* exynos_map_io
|
||||||
*
|
*
|
||||||
* register the standard cpu IO areas
|
* register the standard cpu IO areas
|
||||||
*/
|
*/
|
||||||
void __init exynos4_map_io(void)
|
void __init exynos4_map_io(void)
|
||||||
{
|
{
|
||||||
|
iotable_init(exynos_iodesc, ARRAY_SIZE(exynos_iodesc));
|
||||||
iotable_init(exynos4_iodesc, ARRAY_SIZE(exynos4_iodesc));
|
iotable_init(exynos4_iodesc, ARRAY_SIZE(exynos4_iodesc));
|
||||||
|
|
||||||
if (soc_is_exynos4210() && samsung_rev() == EXYNOS4210_REV_0)
|
if (soc_is_exynos4210() && samsung_rev() == EXYNOS4210_REV_0)
|
||||||
|
@ -250,7 +255,6 @@ static int __init exynos4_core_init(void)
|
||||||
{
|
{
|
||||||
return sysdev_class_register(&exynos4_sysclass);
|
return sysdev_class_register(&exynos4_sysclass);
|
||||||
}
|
}
|
||||||
|
|
||||||
core_initcall(exynos4_core_init);
|
core_initcall(exynos4_core_init);
|
||||||
|
|
||||||
#ifdef CONFIG_CACHE_L2X0
|
#ifdef CONFIG_CACHE_L2X0
|
||||||
|
@ -279,15 +283,16 @@ static int __init exynos4_l2x0_cache_init(void)
|
||||||
early_initcall(exynos4_l2x0_cache_init);
|
early_initcall(exynos4_l2x0_cache_init);
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
int __init exynos4_init(void)
|
int __init exynos_init(void)
|
||||||
{
|
{
|
||||||
printk(KERN_INFO "EXYNOS4: Initializing architecture\n");
|
printk(KERN_INFO "EXYNOS: Initializing architecture\n");
|
||||||
|
|
||||||
/* set idle function */
|
/* set idle function */
|
||||||
pm_idle = exynos4_idle;
|
pm_idle = exynos_idle;
|
||||||
|
|
||||||
/* set sw_reset function */
|
/* set sw_reset function */
|
||||||
s5p_reset_hook = exynos4_sw_reset;
|
if (soc_is_exynos4210() || soc_is_exynos4212() || soc_is_exynos4412())
|
||||||
|
s5p_reset_hook = exynos4_sw_reset;
|
||||||
|
|
||||||
return sysdev_register(&exynos4_sysdev);
|
return sysdev_register(&exynos4_sysdev);
|
||||||
}
|
}
|
|
@ -1,4 +1,4 @@
|
||||||
/* linux/arch/arm/mach-exynos4/include/mach/map.h
|
/* linux/arch/arm/mach-exynos/include/mach/map.h
|
||||||
*
|
*
|
||||||
* Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
|
* Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
|
||||||
* http://www.samsung.com/
|
* http://www.samsung.com/
|
||||||
|
@ -145,39 +145,45 @@
|
||||||
#define S3C_PA_IIC5 EXYNOS4_PA_IIC(5)
|
#define S3C_PA_IIC5 EXYNOS4_PA_IIC(5)
|
||||||
#define S3C_PA_IIC6 EXYNOS4_PA_IIC(6)
|
#define S3C_PA_IIC6 EXYNOS4_PA_IIC(6)
|
||||||
#define S3C_PA_IIC7 EXYNOS4_PA_IIC(7)
|
#define S3C_PA_IIC7 EXYNOS4_PA_IIC(7)
|
||||||
#define SAMSUNG_PA_ADC EXYNOS4_PA_ADC
|
|
||||||
#define SAMSUNG_PA_ADC1 EXYNOS4_PA_ADC1
|
|
||||||
#define S3C_PA_RTC EXYNOS4_PA_RTC
|
#define S3C_PA_RTC EXYNOS4_PA_RTC
|
||||||
#define S3C_PA_WDT EXYNOS4_PA_WATCHDOG
|
#define S3C_PA_WDT EXYNOS4_PA_WATCHDOG
|
||||||
|
#define S3C_PA_UART EXYNOS4_PA_UART
|
||||||
|
|
||||||
#define S5P_PA_CHIPID EXYNOS4_PA_CHIPID
|
#define S5P_PA_CHIPID EXYNOS4_PA_CHIPID
|
||||||
|
#define S5P_PA_EHCI EXYNOS4_PA_EHCI
|
||||||
#define S5P_PA_FIMC0 EXYNOS4_PA_FIMC0
|
#define S5P_PA_FIMC0 EXYNOS4_PA_FIMC0
|
||||||
#define S5P_PA_FIMC1 EXYNOS4_PA_FIMC1
|
#define S5P_PA_FIMC1 EXYNOS4_PA_FIMC1
|
||||||
#define S5P_PA_FIMC2 EXYNOS4_PA_FIMC2
|
#define S5P_PA_FIMC2 EXYNOS4_PA_FIMC2
|
||||||
#define S5P_PA_FIMC3 EXYNOS4_PA_FIMC3
|
#define S5P_PA_FIMC3 EXYNOS4_PA_FIMC3
|
||||||
#define S5P_PA_MIPI_CSIS0 EXYNOS4_PA_MIPI_CSIS0
|
|
||||||
#define S5P_PA_MIPI_CSIS1 EXYNOS4_PA_MIPI_CSIS1
|
|
||||||
#define S5P_PA_FIMD0 EXYNOS4_PA_FIMD0
|
#define S5P_PA_FIMD0 EXYNOS4_PA_FIMD0
|
||||||
#define S5P_PA_ONENAND EXYNOS4_PA_ONENAND
|
|
||||||
#define S5P_PA_ONENAND_DMA EXYNOS4_PA_ONENAND_DMA
|
|
||||||
#define S5P_PA_SDRAM EXYNOS4_PA_SDRAM
|
|
||||||
#define S5P_PA_SROMC EXYNOS4_PA_SROMC
|
|
||||||
#define S5P_PA_MFC EXYNOS4_PA_MFC
|
|
||||||
#define S5P_PA_SYSCON EXYNOS4_PA_SYSCON
|
|
||||||
#define S5P_PA_TIMER EXYNOS4_PA_TIMER
|
|
||||||
#define S5P_PA_EHCI EXYNOS4_PA_EHCI
|
|
||||||
|
|
||||||
#define S5P_PA_SDO EXYNOS4_PA_SDO
|
|
||||||
#define S5P_PA_VP EXYNOS4_PA_VP
|
|
||||||
#define S5P_PA_MIXER EXYNOS4_PA_MIXER
|
|
||||||
#define S5P_PA_HDMI EXYNOS4_PA_HDMI
|
#define S5P_PA_HDMI EXYNOS4_PA_HDMI
|
||||||
#define S5P_PA_IIC_HDMIPHY EXYNOS4_PA_IIC_HDMIPHY
|
#define S5P_PA_IIC_HDMIPHY EXYNOS4_PA_IIC_HDMIPHY
|
||||||
|
#define S5P_PA_MFC EXYNOS4_PA_MFC
|
||||||
|
#define S5P_PA_MIPI_CSIS0 EXYNOS4_PA_MIPI_CSIS0
|
||||||
|
#define S5P_PA_MIPI_CSIS1 EXYNOS4_PA_MIPI_CSIS1
|
||||||
|
#define S5P_PA_MIXER EXYNOS4_PA_MIXER
|
||||||
|
#define S5P_PA_ONENAND EXYNOS4_PA_ONENAND
|
||||||
|
#define S5P_PA_ONENAND_DMA EXYNOS4_PA_ONENAND_DMA
|
||||||
|
#define S5P_PA_SDO EXYNOS4_PA_SDO
|
||||||
|
#define S5P_PA_SDRAM EXYNOS4_PA_SDRAM
|
||||||
|
#define S5P_PA_SROMC EXYNOS4_PA_SROMC
|
||||||
|
#define S5P_PA_SYSCON EXYNOS4_PA_SYSCON
|
||||||
|
#define S5P_PA_TIMER EXYNOS4_PA_TIMER
|
||||||
|
#define S5P_PA_VP EXYNOS4_PA_VP
|
||||||
|
|
||||||
|
#define SAMSUNG_PA_ADC EXYNOS4_PA_ADC
|
||||||
|
#define SAMSUNG_PA_ADC1 EXYNOS4_PA_ADC1
|
||||||
#define SAMSUNG_PA_KEYPAD EXYNOS4_PA_KEYPAD
|
#define SAMSUNG_PA_KEYPAD EXYNOS4_PA_KEYPAD
|
||||||
|
|
||||||
/* UART */
|
#define EXYNOS_PA_COMBINER EXYNOS4_PA_COMBINER
|
||||||
|
#define EXYNOS_PA_GIC_CPU EXYNOS4_PA_GIC_CPU
|
||||||
|
#define EXYNOS_PA_GIC_DIST EXYNOS4_PA_GIC_DIST
|
||||||
|
#define EXYNOS_PA_PMU EXYNOS4_PA_PMU
|
||||||
|
#define EXYNOS_PA_SYSTIMER EXYNOS4_PA_SYSTIMER
|
||||||
|
|
||||||
#define S3C_PA_UART EXYNOS4_PA_UART
|
/* Compatibility UART */
|
||||||
|
|
||||||
|
#define S3C_VA_UARTx(x) (S3C_VA_UART + ((x) * S3C_UART_OFFSET))
|
||||||
|
|
||||||
#define S5P_PA_UART(x) (S3C_PA_UART + ((x) * S3C_UART_OFFSET))
|
#define S5P_PA_UART(x) (S3C_PA_UART + ((x) * S3C_UART_OFFSET))
|
||||||
#define S5P_PA_UART0 S5P_PA_UART(0)
|
#define S5P_PA_UART0 S5P_PA_UART(0)
|
|
@ -7,7 +7,7 @@
|
||||||
|
|
||||||
config PLAT_S5P
|
config PLAT_S5P
|
||||||
bool
|
bool
|
||||||
depends on (ARCH_S5P64X0 || ARCH_S5PC100 || ARCH_S5PV210 || ARCH_EXYNOS4)
|
depends on (ARCH_S5P64X0 || ARCH_S5PC100 || ARCH_S5PV210 || ARCH_EXYNOS)
|
||||||
default y
|
default y
|
||||||
select ARM_VIC if !ARCH_EXYNOS4
|
select ARM_VIC if !ARCH_EXYNOS4
|
||||||
select ARM_GIC if ARCH_EXYNOS4
|
select ARM_GIC if ARCH_EXYNOS4
|
||||||
|
|
|
@ -75,7 +75,7 @@ static struct cpu_table cpu_ids[] __initdata = {
|
||||||
.map_io = exynos4_map_io,
|
.map_io = exynos4_map_io,
|
||||||
.init_clocks = exynos4_init_clocks,
|
.init_clocks = exynos4_init_clocks,
|
||||||
.init_uarts = exynos4_init_uarts,
|
.init_uarts = exynos4_init_uarts,
|
||||||
.init = exynos4_init,
|
.init = exynos_init,
|
||||||
.name = name_exynos4210,
|
.name = name_exynos4210,
|
||||||
}, {
|
}, {
|
||||||
.idcode = EXYNOS4212_CPU_ID,
|
.idcode = EXYNOS4212_CPU_ID,
|
||||||
|
@ -83,7 +83,7 @@ static struct cpu_table cpu_ids[] __initdata = {
|
||||||
.map_io = exynos4_map_io,
|
.map_io = exynos4_map_io,
|
||||||
.init_clocks = exynos4_init_clocks,
|
.init_clocks = exynos4_init_clocks,
|
||||||
.init_uarts = exynos4_init_uarts,
|
.init_uarts = exynos4_init_uarts,
|
||||||
.init = exynos4_init,
|
.init = exynos_init,
|
||||||
.name = name_exynos4212,
|
.name = name_exynos4212,
|
||||||
}, {
|
}, {
|
||||||
.idcode = EXYNOS4412_CPU_ID,
|
.idcode = EXYNOS4412_CPU_ID,
|
||||||
|
@ -91,7 +91,7 @@ static struct cpu_table cpu_ids[] __initdata = {
|
||||||
.map_io = exynos4_map_io,
|
.map_io = exynos4_map_io,
|
||||||
.init_clocks = exynos4_init_clocks,
|
.init_clocks = exynos4_init_clocks,
|
||||||
.init_uarts = exynos4_init_uarts,
|
.init_uarts = exynos4_init_uarts,
|
||||||
.init = exynos4_init,
|
.init = exynos_init,
|
||||||
.name = name_exynos4412,
|
.name = name_exynos4412,
|
||||||
},
|
},
|
||||||
};
|
};
|
||||||
|
|
|
@ -18,8 +18,8 @@ extern void exynos4210_register_clocks(void);
|
||||||
extern void exynos4212_register_clocks(void);
|
extern void exynos4212_register_clocks(void);
|
||||||
extern void exynos4_setup_clocks(void);
|
extern void exynos4_setup_clocks(void);
|
||||||
|
|
||||||
#ifdef CONFIG_ARCH_EXYNOS4
|
#ifdef CONFIG_ARCH_EXYNOS
|
||||||
extern int exynos4_init(void);
|
extern int exynos_init(void);
|
||||||
extern void exynos4_init_irq(void);
|
extern void exynos4_init_irq(void);
|
||||||
extern void exynos4_map_io(void);
|
extern void exynos4_map_io(void);
|
||||||
extern void exynos4_init_clocks(int xtal);
|
extern void exynos4_init_clocks(int xtal);
|
||||||
|
@ -31,5 +31,5 @@ extern struct sys_timer exynos4_timer;
|
||||||
#define exynos4_init_clocks NULL
|
#define exynos4_init_clocks NULL
|
||||||
#define exynos4_init_uarts NULL
|
#define exynos4_init_uarts NULL
|
||||||
#define exynos4_map_io NULL
|
#define exynos4_map_io NULL
|
||||||
#define exynos4_init NULL
|
#define exynos_init NULL
|
||||||
#endif
|
#endif
|
||||||
|
|
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