drm/i915: DisplayPort-MST pixel clock check
It is possible the we request to have a mode that has higher pixel clock than our HW can support. This patch checks if requested pixel clock is lower than the one supported by the HW. The requested mode is discarded if we cannot support the requested pixel clock. This patch applies to DisplayPort MST. V2: - removed computation for max pixel clock V3: - cleanup by removing unnecessary lines V4: - max_pixclk variable renamed as max_dotclk Signed-off-by: Mika Kahola <mika.kahola@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: http://patchwork.freedesktop.org/patch/msgid/1454419003-6001-4-git-send-email-mika.kahola@intel.com
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@ -371,6 +371,8 @@ static enum drm_mode_status
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intel_dp_mst_mode_valid(struct drm_connector *connector,
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struct drm_display_mode *mode)
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{
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int max_dotclk = to_i915(connector->dev)->max_dotclk_freq;
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/* TODO - validate mode against available PBN for link */
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if (mode->clock < 10000)
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return MODE_CLOCK_LOW;
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@ -378,6 +380,9 @@ intel_dp_mst_mode_valid(struct drm_connector *connector,
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if (mode->flags & DRM_MODE_FLAG_DBLCLK)
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return MODE_H_ILLEGAL;
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if (mode->clock > max_dotclk)
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return MODE_CLOCK_HIGH;
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return MODE_OK;
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}
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