ARM: dts: imx6: change the core clock of spdif
The correct core clock of spdif is SPDIF_GCLK, which is added to clock tree. So the dts also need to be updated. Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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654252659e
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833f2cbf70
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@ -218,16 +218,16 @@
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dmas = <&sdma 14 18 0>,
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<&sdma 15 18 0>;
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dma-names = "rx", "tx";
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clocks = <&clks IMX6QDL_CLK_SPDIF>, <&clks IMX6QDL_CLK_OSC>,
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<&clks IMX6QDL_CLK_SPDIF>, <&clks IMX6QDL_CLK_DUMMY>,
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<&clks IMX6QDL_CLK_DUMMY>, <&clks IMX6QDL_CLK_DUMMY>,
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<&clks IMX6QDL_CLK_DUMMY>, <&clks IMX6QDL_CLK_DUMMY>,
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<&clks IMX6QDL_CLK_DUMMY>;
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clocks = <&clks IMX6QDL_CLK_SPDIF_GCLK>, <&clks IMX6QDL_CLK_OSC>,
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<&clks IMX6QDL_CLK_SPDIF>, <&clks IMX6QDL_CLK_ASRC>,
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<&clks IMX6QDL_CLK_DUMMY>, <&clks IMX6QDL_CLK_ESAI_EXTAL>,
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<&clks IMX6QDL_CLK_IPG>, <&clks IMX6QDL_CLK_MLB>,
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<&clks IMX6QDL_CLK_DUMMY>, <&clks IMX6QDL_CLK_SPBA>;
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clock-names = "core", "rxtx0",
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"rxtx1", "rxtx2",
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"rxtx3", "rxtx4",
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"rxtx5", "rxtx6",
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"rxtx7";
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"rxtx7", "dma";
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status = "disabled";
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};
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@ -135,8 +135,24 @@
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ranges;
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spdif: spdif@02004000 {
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compatible = "fsl,imx6sl-spdif",
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"fsl,imx35-spdif";
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reg = <0x02004000 0x4000>;
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interrupts = <0 52 IRQ_TYPE_LEVEL_HIGH>;
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dmas = <&sdma 14 18 0>,
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<&sdma 15 18 0>;
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dma-names = "rx", "tx";
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clocks = <&clks IMX6SL_CLK_SPDIF_GCLK>, <&clks IMX6SL_CLK_OSC>,
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<&clks IMX6SL_CLK_SPDIF>, <&clks IMX6SL_CLK_DUMMY>,
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<&clks IMX6SL_CLK_DUMMY>, <&clks IMX6SL_CLK_DUMMY>,
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<&clks IMX6SL_CLK_IPG>, <&clks IMX6SL_CLK_DUMMY>,
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<&clks IMX6SL_CLK_DUMMY>, <&clks IMX6SL_CLK_SPBA>;
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clock-names = "core", "rxtx0",
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"rxtx1", "rxtx2",
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"rxtx3", "rxtx4",
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"rxtx5", "rxtx6",
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"rxtx7", "dma";
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status = "disabled";
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};
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ecspi1: ecspi@02008000 {
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@ -211,7 +211,7 @@
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dmas = <&sdma 14 18 0>,
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<&sdma 15 18 0>;
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dma-names = "rx", "tx";
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clocks = <&clks IMX6SX_CLK_SPDIF>,
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clocks = <&clks IMX6SX_CLK_SPDIF_GCLK>,
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<&clks IMX6SX_CLK_OSC>,
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<&clks IMX6SX_CLK_SPDIF>,
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<&clks 0>, <&clks 0>, <&clks 0>,
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