ahci: imx: Pull out the clock enable/disable calls
The same code for enabling and disabling SATA clock was found in multiple places in the driver. Implement functions that enable/disable the SATA clock and use them in such places instead of duplicating the code. Signed-off-by: Marek Vasut <marex@denx.de> Reviewed-by: Shawn Guo <shawn.guo@linaro.org> Cc: Richard Zhu <r65037@freescale.com> Cc: Linux-IDE <linux-ide@vger.kernel.org> Signed-off-by: Tejun Heo <tj@kernel.org>
This commit is contained in:
Marek Vasut
Tejun Heo
Родитель
c869325a45
Коммит
8403e2ec8d
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@ -47,6 +47,36 @@ static int ahci_imx_hotplug;
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module_param_named(hotplug, ahci_imx_hotplug, int, 0644);
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MODULE_PARM_DESC(hotplug, "AHCI IMX hot-plug support (0=Don't support, 1=support)");
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static int imx_sata_clock_enable(struct device *dev)
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{
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struct imx_ahci_priv *imxpriv = dev_get_drvdata(dev->parent);
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int ret;
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ret = clk_prepare_enable(imxpriv->sata_ref_clk);
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if (ret < 0) {
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dev_err(dev, "prepare-enable sata_ref clock err:%d\n", ret);
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return ret;
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}
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regmap_update_bits(imxpriv->gpr, IOMUXC_GPR13,
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IMX6Q_GPR13_SATA_MPLL_CLK_EN,
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IMX6Q_GPR13_SATA_MPLL_CLK_EN);
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usleep_range(1000, 2000);
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return 0;
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}
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static void imx_sata_clock_disable(struct device *dev)
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{
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struct imx_ahci_priv *imxpriv = dev_get_drvdata(dev->parent);
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regmap_update_bits(imxpriv->gpr, IOMUXC_GPR13,
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IMX6Q_GPR13_SATA_MPLL_CLK_EN,
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!IMX6Q_GPR13_SATA_MPLL_CLK_EN);
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clk_disable_unprepare(imxpriv->sata_ref_clk);
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}
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static void ahci_imx_error_handler(struct ata_port *ap)
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{
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u32 reg_val;
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@ -72,10 +102,7 @@ static void ahci_imx_error_handler(struct ata_port *ap)
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*/
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reg_val = readl(mmio + PORT_PHY_CTL);
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writel(reg_val | PORT_PHY_CTL_PDDQ_LOC, mmio + PORT_PHY_CTL);
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regmap_update_bits(imxpriv->gpr, IOMUXC_GPR13,
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IMX6Q_GPR13_SATA_MPLL_CLK_EN,
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!IMX6Q_GPR13_SATA_MPLL_CLK_EN);
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clk_disable_unprepare(imxpriv->sata_ref_clk);
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imx_sata_clock_disable(ap->dev);
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imxpriv->no_device = true;
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}
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@ -97,46 +124,9 @@ static int imx6q_sata_init(struct device *dev, void __iomem *mmio)
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unsigned int reg_val;
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struct imx_ahci_priv *imxpriv = dev_get_drvdata(dev->parent);
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imxpriv->gpr =
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syscon_regmap_lookup_by_compatible("fsl,imx6q-iomuxc-gpr");
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if (IS_ERR(imxpriv->gpr)) {
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dev_err(dev, "failed to find fsl,imx6q-iomux-gpr regmap\n");
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return PTR_ERR(imxpriv->gpr);
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}
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ret = clk_prepare_enable(imxpriv->sata_ref_clk);
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if (ret < 0) {
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dev_err(dev, "prepare-enable sata_ref clock err:%d\n", ret);
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ret = imx_sata_clock_enable(dev);
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if (ret < 0)
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return ret;
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}
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/*
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* set PHY Paremeters, two steps to configure the GPR13,
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* one write for rest of parameters, mask of first write
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* is 0x07ffffff, and the other one write for setting
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* the mpll_clk_en.
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*/
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regmap_update_bits(imxpriv->gpr, 0x34, IMX6Q_GPR13_SATA_RX_EQ_VAL_MASK
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| IMX6Q_GPR13_SATA_RX_LOS_LVL_MASK
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| IMX6Q_GPR13_SATA_RX_DPLL_MODE_MASK
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| IMX6Q_GPR13_SATA_SPD_MODE_MASK
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| IMX6Q_GPR13_SATA_MPLL_SS_EN
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| IMX6Q_GPR13_SATA_TX_ATTEN_MASK
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| IMX6Q_GPR13_SATA_TX_BOOST_MASK
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| IMX6Q_GPR13_SATA_TX_LVL_MASK
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| IMX6Q_GPR13_SATA_MPLL_CLK_EN
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| IMX6Q_GPR13_SATA_TX_EDGE_RATE
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, IMX6Q_GPR13_SATA_RX_EQ_VAL_3_0_DB
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| IMX6Q_GPR13_SATA_RX_LOS_LVL_SATA2M
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| IMX6Q_GPR13_SATA_RX_DPLL_MODE_2P_4F
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| IMX6Q_GPR13_SATA_SPD_MODE_3P0G
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| IMX6Q_GPR13_SATA_MPLL_SS_EN
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| IMX6Q_GPR13_SATA_TX_ATTEN_9_16
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| IMX6Q_GPR13_SATA_TX_BOOST_3_33_DB
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| IMX6Q_GPR13_SATA_TX_LVL_1_025_V);
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regmap_update_bits(imxpriv->gpr, 0x34, IMX6Q_GPR13_SATA_MPLL_CLK_EN,
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IMX6Q_GPR13_SATA_MPLL_CLK_EN);
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usleep_range(100, 200);
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/*
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* Configure the HWINIT bits of the HOST_CAP and HOST_PORTS_IMPL,
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@ -164,11 +154,7 @@ static int imx6q_sata_init(struct device *dev, void __iomem *mmio)
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static void imx6q_sata_exit(struct device *dev)
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{
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struct imx_ahci_priv *imxpriv = dev_get_drvdata(dev->parent);
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regmap_update_bits(imxpriv->gpr, 0x34, IMX6Q_GPR13_SATA_MPLL_CLK_EN,
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!IMX6Q_GPR13_SATA_MPLL_CLK_EN);
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clk_disable_unprepare(imxpriv->sata_ref_clk);
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imx_sata_clock_disable(dev);
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}
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static int imx_ahci_suspend(struct device *dev)
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@ -179,12 +165,8 @@ static int imx_ahci_suspend(struct device *dev)
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* If no_device is set, The CLKs had been gated off in the
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* initialization so don't do it again here.
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*/
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if (!imxpriv->no_device) {
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regmap_update_bits(imxpriv->gpr, IOMUXC_GPR13,
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IMX6Q_GPR13_SATA_MPLL_CLK_EN,
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!IMX6Q_GPR13_SATA_MPLL_CLK_EN);
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clk_disable_unprepare(imxpriv->sata_ref_clk);
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}
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if (!imxpriv->no_device)
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imx_sata_clock_disable(dev);
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return 0;
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}
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@ -192,22 +174,12 @@ static int imx_ahci_suspend(struct device *dev)
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static int imx_ahci_resume(struct device *dev)
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{
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struct imx_ahci_priv *imxpriv = dev_get_drvdata(dev->parent);
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int ret;
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int ret = 0;
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if (!imxpriv->no_device)
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ret = imx_sata_clock_enable(dev);
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if (!imxpriv->no_device) {
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ret = clk_prepare_enable(imxpriv->sata_ref_clk);
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if (ret < 0) {
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dev_err(dev, "pre-enable sata_ref clock err:%d\n", ret);
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return ret;
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}
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regmap_update_bits(imxpriv->gpr, IOMUXC_GPR13,
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IMX6Q_GPR13_SATA_MPLL_CLK_EN,
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IMX6Q_GPR13_SATA_MPLL_CLK_EN);
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usleep_range(1000, 2000);
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}
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return 0;
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}
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static struct ahci_platform_data imx6q_sata_pdata = {
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@ -290,6 +262,41 @@ static int imx_ahci_probe(struct platform_device *pdev)
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ahci_dev->dma_mask = &ahci_dev->coherent_dma_mask;
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ahci_dev->of_node = dev->of_node;
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imxpriv->gpr =
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syscon_regmap_lookup_by_compatible("fsl,imx6q-iomuxc-gpr");
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if (IS_ERR(imxpriv->gpr)) {
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dev_err(dev, "failed to find fsl,imx6q-iomux-gpr regmap\n");
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ret = PTR_ERR(imxpriv->gpr);
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goto err_out;
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}
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/*
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* Set PHY Paremeters, two steps to configure the GPR13,
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* one write for rest of parameters, mask of first write
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* is 0x07ffffff, and the other one write for setting
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* the mpll_clk_en happens in imx_sata_clock_enable().
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*/
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regmap_update_bits(imxpriv->gpr, IOMUXC_GPR13,
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IMX6Q_GPR13_SATA_RX_EQ_VAL_MASK |
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IMX6Q_GPR13_SATA_RX_LOS_LVL_MASK |
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IMX6Q_GPR13_SATA_RX_DPLL_MODE_MASK |
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IMX6Q_GPR13_SATA_SPD_MODE_MASK |
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IMX6Q_GPR13_SATA_MPLL_SS_EN |
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IMX6Q_GPR13_SATA_TX_ATTEN_MASK |
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IMX6Q_GPR13_SATA_TX_BOOST_MASK |
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IMX6Q_GPR13_SATA_TX_LVL_MASK |
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IMX6Q_GPR13_SATA_MPLL_CLK_EN |
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IMX6Q_GPR13_SATA_TX_EDGE_RATE,
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IMX6Q_GPR13_SATA_RX_EQ_VAL_3_0_DB |
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IMX6Q_GPR13_SATA_RX_LOS_LVL_SATA2M |
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IMX6Q_GPR13_SATA_RX_DPLL_MODE_2P_4F |
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IMX6Q_GPR13_SATA_SPD_MODE_3P0G |
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IMX6Q_GPR13_SATA_MPLL_SS_EN |
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IMX6Q_GPR13_SATA_TX_ATTEN_9_16 |
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IMX6Q_GPR13_SATA_TX_BOOST_3_33_DB |
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IMX6Q_GPR13_SATA_TX_LVL_1_025_V);
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ret = platform_device_add_resources(ahci_pdev, res, 2);
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if (ret)
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goto err_out;
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