x86, fpu: always use kernel_fpu_begin/end() for in-kernel FPU usage
use kernel_fpu_begin/end() instead of unconditionally accessing cr0 and saving/restoring just the few used xmm/ymm registers. This has some advantages like: * If the task's FPU state is already active, then kernel_fpu_begin() will just save the user-state and avoiding the read/write of cr0. In general, cr0 accesses are much slower. * Manual save/restore of xmm/ymm registers will affect the 'modified' and the 'init' optimizations brought in the by xsaveopt/xrstor infrastructure. * Foward compatibility with future vector register extensions will be a problem if the xmm/ymm registers are manually saved and restored (corrupting the extended state of those vector registers). With this patch, there was no significant difference in the xor throughput using AVX, measured during boot. Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com> Link: http://lkml.kernel.org/r/1345842782-24175-5-git-send-email-suresh.b.siddha@intel.com Cc: Jim Kukunas <james.t.kukunas@linux.intel.com> Cc: NeilBrown <neilb@suse.de> Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
This commit is contained in:
Suresh Siddha
H. Peter Anvin
Родитель
9c1c3fac53
Коммит
841e3604d3
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@ -534,38 +534,6 @@ static struct xor_block_template xor_block_p5_mmx = {
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* Copyright (C) 1999 Zach Brown (with obvious credit due Ingo)
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*/
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#define XMMS_SAVE \
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do { \
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preempt_disable(); \
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cr0 = read_cr0(); \
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clts(); \
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asm volatile( \
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"movups %%xmm0,(%0) ;\n\t" \
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"movups %%xmm1,0x10(%0) ;\n\t" \
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"movups %%xmm2,0x20(%0) ;\n\t" \
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"movups %%xmm3,0x30(%0) ;\n\t" \
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: \
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: "r" (xmm_save) \
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: "memory"); \
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} while (0)
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#define XMMS_RESTORE \
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do { \
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asm volatile( \
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"sfence ;\n\t" \
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"movups (%0),%%xmm0 ;\n\t" \
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"movups 0x10(%0),%%xmm1 ;\n\t" \
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"movups 0x20(%0),%%xmm2 ;\n\t" \
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"movups 0x30(%0),%%xmm3 ;\n\t" \
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: \
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: "r" (xmm_save) \
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: "memory"); \
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write_cr0(cr0); \
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preempt_enable(); \
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} while (0)
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#define ALIGN16 __attribute__((aligned(16)))
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#define OFFS(x) "16*("#x")"
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#define PF_OFFS(x) "256+16*("#x")"
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#define PF0(x) " prefetchnta "PF_OFFS(x)"(%1) ;\n"
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@ -587,10 +555,8 @@ static void
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xor_sse_2(unsigned long bytes, unsigned long *p1, unsigned long *p2)
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{
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unsigned long lines = bytes >> 8;
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char xmm_save[16*4] ALIGN16;
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int cr0;
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XMMS_SAVE;
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kernel_fpu_begin();
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asm volatile(
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#undef BLOCK
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@ -633,7 +599,7 @@ xor_sse_2(unsigned long bytes, unsigned long *p1, unsigned long *p2)
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:
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: "memory");
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XMMS_RESTORE;
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kernel_fpu_end();
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}
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static void
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@ -641,10 +607,8 @@ xor_sse_3(unsigned long bytes, unsigned long *p1, unsigned long *p2,
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unsigned long *p3)
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{
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unsigned long lines = bytes >> 8;
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char xmm_save[16*4] ALIGN16;
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int cr0;
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XMMS_SAVE;
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kernel_fpu_begin();
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asm volatile(
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#undef BLOCK
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@ -694,7 +658,7 @@ xor_sse_3(unsigned long bytes, unsigned long *p1, unsigned long *p2,
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:
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: "memory" );
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XMMS_RESTORE;
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kernel_fpu_end();
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}
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static void
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@ -702,10 +666,8 @@ xor_sse_4(unsigned long bytes, unsigned long *p1, unsigned long *p2,
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unsigned long *p3, unsigned long *p4)
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{
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unsigned long lines = bytes >> 8;
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char xmm_save[16*4] ALIGN16;
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int cr0;
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XMMS_SAVE;
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kernel_fpu_begin();
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asm volatile(
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#undef BLOCK
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@ -762,7 +724,7 @@ xor_sse_4(unsigned long bytes, unsigned long *p1, unsigned long *p2,
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:
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: "memory" );
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XMMS_RESTORE;
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kernel_fpu_end();
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}
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static void
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@ -770,10 +732,8 @@ xor_sse_5(unsigned long bytes, unsigned long *p1, unsigned long *p2,
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unsigned long *p3, unsigned long *p4, unsigned long *p5)
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{
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unsigned long lines = bytes >> 8;
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char xmm_save[16*4] ALIGN16;
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int cr0;
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XMMS_SAVE;
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kernel_fpu_begin();
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/* Make sure GCC forgets anything it knows about p4 or p5,
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such that it won't pass to the asm volatile below a
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@ -850,7 +810,7 @@ xor_sse_5(unsigned long bytes, unsigned long *p1, unsigned long *p2,
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like assuming they have some legal value. */
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asm("" : "=r" (p4), "=r" (p5));
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XMMS_RESTORE;
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kernel_fpu_end();
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}
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static struct xor_block_template xor_block_pIII_sse = {
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@ -34,41 +34,7 @@
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* no advantages to be gotten from x86-64 here anyways.
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*/
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typedef struct {
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unsigned long a, b;
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} __attribute__((aligned(16))) xmm_store_t;
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/* Doesn't use gcc to save the XMM registers, because there is no easy way to
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tell it to do a clts before the register saving. */
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#define XMMS_SAVE \
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do { \
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preempt_disable(); \
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asm volatile( \
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"movq %%cr0,%0 ;\n\t" \
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"clts ;\n\t" \
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"movups %%xmm0,(%1) ;\n\t" \
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"movups %%xmm1,0x10(%1) ;\n\t" \
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"movups %%xmm2,0x20(%1) ;\n\t" \
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"movups %%xmm3,0x30(%1) ;\n\t" \
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: "=&r" (cr0) \
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: "r" (xmm_save) \
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: "memory"); \
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} while (0)
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#define XMMS_RESTORE \
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do { \
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asm volatile( \
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"sfence ;\n\t" \
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"movups (%1),%%xmm0 ;\n\t" \
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"movups 0x10(%1),%%xmm1 ;\n\t" \
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"movups 0x20(%1),%%xmm2 ;\n\t" \
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"movups 0x30(%1),%%xmm3 ;\n\t" \
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"movq %0,%%cr0 ;\n\t" \
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: \
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: "r" (cr0), "r" (xmm_save) \
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: "memory"); \
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preempt_enable(); \
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} while (0)
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#include <asm/i387.h>
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#define OFFS(x) "16*("#x")"
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#define PF_OFFS(x) "256+16*("#x")"
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@ -91,10 +57,8 @@ static void
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xor_sse_2(unsigned long bytes, unsigned long *p1, unsigned long *p2)
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{
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unsigned int lines = bytes >> 8;
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unsigned long cr0;
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xmm_store_t xmm_save[4];
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XMMS_SAVE;
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kernel_fpu_begin();
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asm volatile(
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#undef BLOCK
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@ -135,7 +99,7 @@ xor_sse_2(unsigned long bytes, unsigned long *p1, unsigned long *p2)
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: [inc] "r" (256UL)
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: "memory");
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XMMS_RESTORE;
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kernel_fpu_end();
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}
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static void
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@ -143,11 +107,8 @@ xor_sse_3(unsigned long bytes, unsigned long *p1, unsigned long *p2,
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unsigned long *p3)
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{
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unsigned int lines = bytes >> 8;
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xmm_store_t xmm_save[4];
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unsigned long cr0;
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XMMS_SAVE;
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kernel_fpu_begin();
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asm volatile(
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#undef BLOCK
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#define BLOCK(i) \
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@ -194,7 +155,7 @@ xor_sse_3(unsigned long bytes, unsigned long *p1, unsigned long *p2,
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[p1] "+r" (p1), [p2] "+r" (p2), [p3] "+r" (p3)
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: [inc] "r" (256UL)
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: "memory");
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XMMS_RESTORE;
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kernel_fpu_end();
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}
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static void
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@ -202,10 +163,8 @@ xor_sse_4(unsigned long bytes, unsigned long *p1, unsigned long *p2,
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unsigned long *p3, unsigned long *p4)
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{
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unsigned int lines = bytes >> 8;
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xmm_store_t xmm_save[4];
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unsigned long cr0;
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XMMS_SAVE;
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kernel_fpu_begin();
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asm volatile(
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#undef BLOCK
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@ -261,7 +220,7 @@ xor_sse_4(unsigned long bytes, unsigned long *p1, unsigned long *p2,
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: [inc] "r" (256UL)
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: "memory" );
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XMMS_RESTORE;
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kernel_fpu_end();
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}
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static void
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@ -269,10 +228,8 @@ xor_sse_5(unsigned long bytes, unsigned long *p1, unsigned long *p2,
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unsigned long *p3, unsigned long *p4, unsigned long *p5)
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{
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unsigned int lines = bytes >> 8;
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xmm_store_t xmm_save[4];
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unsigned long cr0;
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XMMS_SAVE;
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kernel_fpu_begin();
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asm volatile(
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#undef BLOCK
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@ -336,7 +293,7 @@ xor_sse_5(unsigned long bytes, unsigned long *p1, unsigned long *p2,
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: [inc] "r" (256UL)
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: "memory");
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XMMS_RESTORE;
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kernel_fpu_end();
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}
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static struct xor_block_template xor_block_sse = {
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@ -20,32 +20,6 @@
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#include <linux/compiler.h>
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#include <asm/i387.h>
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#define ALIGN32 __aligned(32)
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#define YMM_SAVED_REGS 4
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#define YMMS_SAVE \
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do { \
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preempt_disable(); \
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cr0 = read_cr0(); \
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clts(); \
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asm volatile("vmovaps %%ymm0, %0" : "=m" (ymm_save[0]) : : "memory"); \
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asm volatile("vmovaps %%ymm1, %0" : "=m" (ymm_save[32]) : : "memory"); \
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asm volatile("vmovaps %%ymm2, %0" : "=m" (ymm_save[64]) : : "memory"); \
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asm volatile("vmovaps %%ymm3, %0" : "=m" (ymm_save[96]) : : "memory"); \
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} while (0);
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#define YMMS_RESTORE \
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do { \
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asm volatile("sfence" : : : "memory"); \
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asm volatile("vmovaps %0, %%ymm3" : : "m" (ymm_save[96])); \
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asm volatile("vmovaps %0, %%ymm2" : : "m" (ymm_save[64])); \
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asm volatile("vmovaps %0, %%ymm1" : : "m" (ymm_save[32])); \
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asm volatile("vmovaps %0, %%ymm0" : : "m" (ymm_save[0])); \
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write_cr0(cr0); \
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preempt_enable(); \
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} while (0);
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#define BLOCK4(i) \
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BLOCK(32 * i, 0) \
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BLOCK(32 * (i + 1), 1) \
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@ -60,10 +34,9 @@ do { \
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static void xor_avx_2(unsigned long bytes, unsigned long *p0, unsigned long *p1)
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{
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unsigned long cr0, lines = bytes >> 9;
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char ymm_save[32 * YMM_SAVED_REGS] ALIGN32;
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unsigned long lines = bytes >> 9;
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YMMS_SAVE
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kernel_fpu_begin();
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while (lines--) {
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#undef BLOCK
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@ -82,16 +55,15 @@ do { \
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p1 = (unsigned long *)((uintptr_t)p1 + 512);
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}
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YMMS_RESTORE
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kernel_fpu_end();
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}
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static void xor_avx_3(unsigned long bytes, unsigned long *p0, unsigned long *p1,
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unsigned long *p2)
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{
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unsigned long cr0, lines = bytes >> 9;
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char ymm_save[32 * YMM_SAVED_REGS] ALIGN32;
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unsigned long lines = bytes >> 9;
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YMMS_SAVE
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kernel_fpu_begin();
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while (lines--) {
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#undef BLOCK
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@ -113,16 +85,15 @@ do { \
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p2 = (unsigned long *)((uintptr_t)p2 + 512);
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}
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YMMS_RESTORE
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kernel_fpu_end();
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}
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static void xor_avx_4(unsigned long bytes, unsigned long *p0, unsigned long *p1,
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unsigned long *p2, unsigned long *p3)
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{
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unsigned long cr0, lines = bytes >> 9;
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char ymm_save[32 * YMM_SAVED_REGS] ALIGN32;
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unsigned long lines = bytes >> 9;
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YMMS_SAVE
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kernel_fpu_begin();
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while (lines--) {
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#undef BLOCK
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@ -147,16 +118,15 @@ do { \
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p3 = (unsigned long *)((uintptr_t)p3 + 512);
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}
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YMMS_RESTORE
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kernel_fpu_end();
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}
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static void xor_avx_5(unsigned long bytes, unsigned long *p0, unsigned long *p1,
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unsigned long *p2, unsigned long *p3, unsigned long *p4)
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{
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unsigned long cr0, lines = bytes >> 9;
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char ymm_save[32 * YMM_SAVED_REGS] ALIGN32;
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unsigned long lines = bytes >> 9;
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YMMS_SAVE
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kernel_fpu_begin();
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while (lines--) {
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#undef BLOCK
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@ -184,7 +154,7 @@ do { \
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p4 = (unsigned long *)((uintptr_t)p4 + 512);
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}
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YMMS_RESTORE
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kernel_fpu_end();
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}
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static struct xor_block_template xor_block_avx = {
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