MMC fixes for 3.10-rc5:
- sdhci-acpi: Fix initial runtime PM status, add more ACPI IDs - atmel-mci, omap_hsmmc: DT handling fixes - esdhc-imx: Fix SDIO IRQs, fix multiblock reads (both h/w errata) -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.13 (GNU/Linux) iQIcBAABAgAGBQJRq4CwAAoJEHNBYZ7TNxYMMasQANRnWqA7FVa3Jk/hL5t32P37 TWso0z29jGPdeUaHD4nZiJN+fMFqsvrmw1rjZ6ftqNiTA/beHopgCKHocu13A7si t7Mc0LtVXchjJfLljw/H0qMO8Zg4H843/vw53S+dkRaJz/8WdTXg27jnXzlRuR1N itB2gRKnc57LtmHSBtqNhyqY+BJzlut960+By4JWyFrHZha0iC4PdpSLiT9kr9S6 QpJQndjVxhG3GoFOpoaDchaci9yGjwvWlaQClVCQ2rLmcWAmW+kx4aIQQxDYLeXD /JVIZkbi4IE6P99v6Zyswqa22IOT4lJVYY0YHEB7nScen181KykdDaF+QOcYRtW5 myXm4e3bVK5FnzH6jKIIb+lfVtys2jQEDp88hniYhL4Ede2pZnqxJemeoBvWZ7G/ t40JlDzJojw9GyWGqFZ4k1Vg8J1YtpmzB6jDSOQNMXMDli2Jf4XmaHNL8wQk9/nx /kL71P5TY/AxKs5dN2DJPuBnr9cmYNYwFgnOV36N/6CUKkcojKSDYGyA4uowYhh9 ycAJjaNMwwaJFK8nupe14ENvIkEBT+jp97mZss7hAgg2egpOtt0gSvltlRLPEGAR 5W0kEA1j5AgMnMREmhYgQ528z4uADN3+ABdRlUdUpIf+BD/XPBMhVNrkp5kB+ZFu Oru8VcPysPWbUxegy+eK =Fq1Y -----END PGP SIGNATURE----- Merge tag 'mmc-fixes-for-3.10-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/cjb/mmc Pull MMC fixes from Chris Ball: - sdhci-acpi: Fix initial runtime PM status, add more ACPI IDs - atmel-mci, omap_hsmmc: DT handling fixes - esdhc-imx: Fix SDIO IRQs, fix multiblock reads (both h/w errata) * tag 'mmc-fixes-for-3.10-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/cjb/mmc: mmc: omap_hsmmc: Skip platform_get_resource_byname() for dt case mmc: omap_hsmmc: convert to dma_request_slave_channel_compat mmc: omap_hsmmc: Fix the DT pbias workaround for MMC controllers 2 to 5 mmc: sdhci-pci: add more device ids mmc: sdhci-acpi: add more device ids mmc: sdhci-acpi: fix initial runtime pm status mmc: atmel-mci: convert to dma_request_slave_channel_compat() mmc: sdhci-esdhc-imx: fix multiblock reads on i.MX53 mmc: sdhci-esdhc-imx: Fix SDIO interrupts
This commit is contained in:
Linus Torvalds
Коммит
844ce9f204
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@ -2230,10 +2230,15 @@ static void __exit atmci_cleanup_slot(struct atmel_mci_slot *slot,
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mmc_free_host(slot->mmc);
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}
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static bool atmci_filter(struct dma_chan *chan, void *slave)
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static bool atmci_filter(struct dma_chan *chan, void *pdata)
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{
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struct mci_dma_data *sl = slave;
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struct mci_platform_data *sl_pdata = pdata;
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struct mci_dma_data *sl;
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if (!sl_pdata)
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return false;
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sl = sl_pdata->dma_slave;
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if (sl && find_slave_dev(sl) == chan->device->dev) {
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chan->private = slave_data_ptr(sl);
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return true;
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@ -2245,24 +2250,18 @@ static bool atmci_filter(struct dma_chan *chan, void *slave)
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static bool atmci_configure_dma(struct atmel_mci *host)
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{
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struct mci_platform_data *pdata;
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dma_cap_mask_t mask;
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if (host == NULL)
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return false;
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pdata = host->pdev->dev.platform_data;
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if (!pdata)
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return false;
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dma_cap_zero(mask);
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dma_cap_set(DMA_SLAVE, mask);
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if (pdata->dma_slave && find_slave_dev(pdata->dma_slave)) {
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dma_cap_mask_t mask;
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/* Try to grab a DMA channel */
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dma_cap_zero(mask);
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dma_cap_set(DMA_SLAVE, mask);
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host->dma.chan =
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dma_request_channel(mask, atmci_filter, pdata->dma_slave);
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}
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host->dma.chan = dma_request_slave_channel_compat(mask, atmci_filter, pdata,
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&host->pdev->dev, "rxtx");
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if (!host->dma.chan) {
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dev_warn(&host->pdev->dev, "no DMA channel available\n");
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return false;
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@ -161,6 +161,7 @@ struct omap_hsmmc_host {
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*/
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struct regulator *vcc;
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struct regulator *vcc_aux;
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int pbias_disable;
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void __iomem *base;
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resource_size_t mapbase;
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spinlock_t irq_lock; /* Prevent races with irq handler */
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@ -255,11 +256,11 @@ static int omap_hsmmc_set_power(struct device *dev, int slot, int power_on,
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if (!host->vcc)
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return 0;
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/*
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* With DT, never turn OFF the regulator. This is because
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* With DT, never turn OFF the regulator for MMC1. This is because
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* the pbias cell programming support is still missing when
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* booting with Device tree
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*/
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if (dev->of_node && !vdd)
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if (host->pbias_disable && !vdd)
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return 0;
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if (mmc_slot(host).before_set_reg)
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@ -1520,10 +1521,10 @@ static void omap_hsmmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
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(ios->vdd == DUAL_VOLT_OCR_BIT) &&
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/*
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* With pbias cell programming missing, this
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* can't be allowed when booting with device
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* can't be allowed on MMC1 when booting with device
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* tree.
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*/
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!host->dev->of_node) {
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!host->pbias_disable) {
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/*
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* The mmc_select_voltage fn of the core does
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* not seem to set the power_mode to
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@ -1871,6 +1872,10 @@ static int omap_hsmmc_probe(struct platform_device *pdev)
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omap_hsmmc_context_save(host);
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/* This can be removed once we support PBIAS with DT */
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if (host->dev->of_node && host->mapbase == 0x4809c000)
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host->pbias_disable = 1;
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host->dbclk = clk_get(&pdev->dev, "mmchsdb_fck");
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/*
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* MMC can still work without debounce clock.
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@ -1906,33 +1911,41 @@ static int omap_hsmmc_probe(struct platform_device *pdev)
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omap_hsmmc_conf_bus_power(host);
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res = platform_get_resource_byname(pdev, IORESOURCE_DMA, "tx");
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if (!res) {
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dev_err(mmc_dev(host->mmc), "cannot get DMA TX channel\n");
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ret = -ENXIO;
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goto err_irq;
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}
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tx_req = res->start;
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if (!pdev->dev.of_node) {
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res = platform_get_resource_byname(pdev, IORESOURCE_DMA, "tx");
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if (!res) {
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dev_err(mmc_dev(host->mmc), "cannot get DMA TX channel\n");
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ret = -ENXIO;
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goto err_irq;
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}
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tx_req = res->start;
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res = platform_get_resource_byname(pdev, IORESOURCE_DMA, "rx");
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if (!res) {
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dev_err(mmc_dev(host->mmc), "cannot get DMA RX channel\n");
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ret = -ENXIO;
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goto err_irq;
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res = platform_get_resource_byname(pdev, IORESOURCE_DMA, "rx");
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if (!res) {
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dev_err(mmc_dev(host->mmc), "cannot get DMA RX channel\n");
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ret = -ENXIO;
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goto err_irq;
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}
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rx_req = res->start;
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}
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rx_req = res->start;
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dma_cap_zero(mask);
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dma_cap_set(DMA_SLAVE, mask);
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host->rx_chan = dma_request_channel(mask, omap_dma_filter_fn, &rx_req);
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host->rx_chan =
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dma_request_slave_channel_compat(mask, omap_dma_filter_fn,
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&rx_req, &pdev->dev, "rx");
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if (!host->rx_chan) {
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dev_err(mmc_dev(host->mmc), "unable to obtain RX DMA engine channel %u\n", rx_req);
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ret = -ENXIO;
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goto err_irq;
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}
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host->tx_chan = dma_request_channel(mask, omap_dma_filter_fn, &tx_req);
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host->tx_chan =
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dma_request_slave_channel_compat(mask, omap_dma_filter_fn,
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&tx_req, &pdev->dev, "tx");
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if (!host->tx_chan) {
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dev_err(mmc_dev(host->mmc), "unable to obtain TX DMA engine channel %u\n", tx_req);
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ret = -ENXIO;
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@ -87,6 +87,12 @@ static const struct sdhci_ops sdhci_acpi_ops_dflt = {
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.enable_dma = sdhci_acpi_enable_dma,
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};
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static const struct sdhci_acpi_slot sdhci_acpi_slot_int_emmc = {
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.caps = MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE,
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.caps2 = MMC_CAP2_HC_ERASE_SZ,
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.flags = SDHCI_ACPI_RUNTIME_PM,
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};
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static const struct sdhci_acpi_slot sdhci_acpi_slot_int_sdio = {
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.quirks2 = SDHCI_QUIRK2_HOST_OFF_CARD_ON,
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.caps = MMC_CAP_NONREMOVABLE | MMC_CAP_POWER_OFF_CARD,
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@ -94,23 +100,67 @@ static const struct sdhci_acpi_slot sdhci_acpi_slot_int_sdio = {
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.pm_caps = MMC_PM_KEEP_POWER,
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};
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static const struct sdhci_acpi_slot sdhci_acpi_slot_int_sd = {
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};
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struct sdhci_acpi_uid_slot {
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const char *hid;
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const char *uid;
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const struct sdhci_acpi_slot *slot;
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};
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static const struct sdhci_acpi_uid_slot sdhci_acpi_uids[] = {
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{ "80860F14" , "1" , &sdhci_acpi_slot_int_emmc },
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{ "80860F14" , "3" , &sdhci_acpi_slot_int_sd },
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{ "INT33BB" , "2" , &sdhci_acpi_slot_int_sdio },
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{ "INT33C6" , NULL, &sdhci_acpi_slot_int_sdio },
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{ "PNP0D40" },
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{ },
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};
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static const struct acpi_device_id sdhci_acpi_ids[] = {
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{ "INT33C6", (kernel_ulong_t)&sdhci_acpi_slot_int_sdio },
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{ "PNP0D40" },
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{ "80860F14" },
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{ "INT33BB" },
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{ "INT33C6" },
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{ "PNP0D40" },
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{ },
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};
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MODULE_DEVICE_TABLE(acpi, sdhci_acpi_ids);
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static const struct sdhci_acpi_slot *sdhci_acpi_get_slot(const char *hid)
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static const struct sdhci_acpi_slot *sdhci_acpi_get_slot_by_ids(const char *hid,
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const char *uid)
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{
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const struct acpi_device_id *id;
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const struct sdhci_acpi_uid_slot *u;
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for (id = sdhci_acpi_ids; id->id[0]; id++)
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if (!strcmp(id->id, hid))
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return (const struct sdhci_acpi_slot *)id->driver_data;
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for (u = sdhci_acpi_uids; u->hid; u++) {
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if (strcmp(u->hid, hid))
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continue;
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if (!u->uid)
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return u->slot;
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if (uid && !strcmp(u->uid, uid))
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return u->slot;
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}
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return NULL;
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}
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static const struct sdhci_acpi_slot *sdhci_acpi_get_slot(acpi_handle handle,
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const char *hid)
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{
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const struct sdhci_acpi_slot *slot;
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struct acpi_device_info *info;
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const char *uid = NULL;
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acpi_status status;
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status = acpi_get_object_info(handle, &info);
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if (!ACPI_FAILURE(status) && (info->valid & ACPI_VALID_UID))
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uid = info->unique_id.string;
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slot = sdhci_acpi_get_slot_by_ids(hid, uid);
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kfree(info);
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return slot;
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}
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static int sdhci_acpi_probe(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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@ -148,7 +198,7 @@ static int sdhci_acpi_probe(struct platform_device *pdev)
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c = sdhci_priv(host);
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c->host = host;
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c->slot = sdhci_acpi_get_slot(hid);
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c->slot = sdhci_acpi_get_slot(handle, hid);
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c->pdev = pdev;
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c->use_runtime_pm = sdhci_acpi_flag(c, SDHCI_ACPI_RUNTIME_PM);
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@ -202,6 +252,7 @@ static int sdhci_acpi_probe(struct platform_device *pdev)
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goto err_free;
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if (c->use_runtime_pm) {
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pm_runtime_set_active(dev);
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pm_suspend_ignore_children(dev, 1);
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pm_runtime_set_autosuspend_delay(dev, 50);
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pm_runtime_use_autosuspend(dev);
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@ -85,6 +85,12 @@ struct pltfm_imx_data {
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struct clk *clk_ipg;
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struct clk *clk_ahb;
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struct clk *clk_per;
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enum {
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NO_CMD_PENDING, /* no multiblock command pending*/
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MULTIBLK_IN_PROCESS, /* exact multiblock cmd in process */
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WAIT_FOR_INT, /* sent CMD12, waiting for response INT */
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} multiblock_status;
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};
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static struct platform_device_id imx_esdhc_devtype[] = {
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@ -154,6 +160,8 @@ static inline void esdhc_clrset_le(struct sdhci_host *host, u32 mask, u32 val, i
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static u32 esdhc_readl_le(struct sdhci_host *host, int reg)
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{
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struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
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struct pltfm_imx_data *imx_data = pltfm_host->priv;
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u32 val = readl(host->ioaddr + reg);
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if (unlikely(reg == SDHCI_CAPABILITIES)) {
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@ -175,6 +183,18 @@ static u32 esdhc_readl_le(struct sdhci_host *host, int reg)
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val &= ~ESDHC_INT_VENDOR_SPEC_DMA_ERR;
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val |= SDHCI_INT_ADMA_ERROR;
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}
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/*
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* mask off the interrupt we get in response to the manually
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* sent CMD12
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*/
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if ((imx_data->multiblock_status == WAIT_FOR_INT) &&
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((val & SDHCI_INT_RESPONSE) == SDHCI_INT_RESPONSE)) {
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val &= ~SDHCI_INT_RESPONSE;
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writel(SDHCI_INT_RESPONSE, host->ioaddr +
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SDHCI_INT_STATUS);
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imx_data->multiblock_status = NO_CMD_PENDING;
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}
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}
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return val;
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@ -211,6 +231,15 @@ static void esdhc_writel_le(struct sdhci_host *host, u32 val, int reg)
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v = readl(host->ioaddr + ESDHC_VENDOR_SPEC);
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v &= ~ESDHC_VENDOR_SPEC_SDIO_QUIRK;
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writel(v, host->ioaddr + ESDHC_VENDOR_SPEC);
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if (imx_data->multiblock_status == MULTIBLK_IN_PROCESS)
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{
|
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/* send a manual CMD12 with RESPTYP=none */
|
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data = MMC_STOP_TRANSMISSION << 24 |
|
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SDHCI_CMD_ABORTCMD << 16;
|
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writel(data, host->ioaddr + SDHCI_TRANSFER_MODE);
|
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imx_data->multiblock_status = WAIT_FOR_INT;
|
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}
|
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}
|
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|
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if (unlikely(reg == SDHCI_INT_ENABLE || reg == SDHCI_SIGNAL_ENABLE)) {
|
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|
|
@ -277,11 +306,13 @@ static void esdhc_writew_le(struct sdhci_host *host, u16 val, int reg)
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}
|
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return;
|
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case SDHCI_COMMAND:
|
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if ((host->cmd->opcode == MMC_STOP_TRANSMISSION ||
|
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host->cmd->opcode == MMC_SET_BLOCK_COUNT) &&
|
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(imx_data->flags & ESDHC_FLAG_MULTIBLK_NO_INT))
|
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if (host->cmd->opcode == MMC_STOP_TRANSMISSION)
|
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val |= SDHCI_CMD_ABORTCMD;
|
||||
|
||||
if ((host->cmd->opcode == MMC_SET_BLOCK_COUNT) &&
|
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(imx_data->flags & ESDHC_FLAG_MULTIBLK_NO_INT))
|
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imx_data->multiblock_status = MULTIBLK_IN_PROCESS;
|
||||
|
||||
if (is_imx6q_usdhc(imx_data))
|
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writel(val << 16,
|
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host->ioaddr + SDHCI_TRANSFER_MODE);
|
||||
|
|
@ -324,8 +355,10 @@ static void esdhc_writeb_le(struct sdhci_host *host, u8 val, int reg)
|
|||
/*
|
||||
* Do not touch buswidth bits here. This is done in
|
||||
* esdhc_pltfm_bus_width.
|
||||
* Do not touch the D3CD bit either which is used for the
|
||||
* SDIO interrupt errata workaround.
|
||||
*/
|
||||
mask = 0xffff & ~ESDHC_CTRL_BUSWIDTH_MASK;
|
||||
mask = 0xffff & ~(ESDHC_CTRL_BUSWIDTH_MASK | ESDHC_CTRL_D3CD);
|
||||
|
||||
esdhc_clrset_le(host, mask, new_val, reg);
|
||||
return;
|
||||
|
|
|
|||
|
|
@ -33,6 +33,9 @@
|
|||
*/
|
||||
#define PCI_DEVICE_ID_INTEL_PCH_SDIO0 0x8809
|
||||
#define PCI_DEVICE_ID_INTEL_PCH_SDIO1 0x880a
|
||||
#define PCI_DEVICE_ID_INTEL_BYT_EMMC 0x0f14
|
||||
#define PCI_DEVICE_ID_INTEL_BYT_SDIO 0x0f15
|
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#define PCI_DEVICE_ID_INTEL_BYT_SD 0x0f16
|
||||
|
||||
/*
|
||||
* PCI registers
|
||||
|
|
@ -304,6 +307,33 @@ static const struct sdhci_pci_fixes sdhci_intel_pch_sdio = {
|
|||
.probe_slot = pch_hc_probe_slot,
|
||||
};
|
||||
|
||||
static int byt_emmc_probe_slot(struct sdhci_pci_slot *slot)
|
||||
{
|
||||
slot->host->mmc->caps |= MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE;
|
||||
slot->host->mmc->caps2 |= MMC_CAP2_HC_ERASE_SZ;
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int byt_sdio_probe_slot(struct sdhci_pci_slot *slot)
|
||||
{
|
||||
slot->host->mmc->caps |= MMC_CAP_POWER_OFF_CARD | MMC_CAP_NONREMOVABLE;
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct sdhci_pci_fixes sdhci_intel_byt_emmc = {
|
||||
.allow_runtime_pm = true,
|
||||
.probe_slot = byt_emmc_probe_slot,
|
||||
};
|
||||
|
||||
static const struct sdhci_pci_fixes sdhci_intel_byt_sdio = {
|
||||
.quirks2 = SDHCI_QUIRK2_HOST_OFF_CARD_ON,
|
||||
.allow_runtime_pm = true,
|
||||
.probe_slot = byt_sdio_probe_slot,
|
||||
};
|
||||
|
||||
static const struct sdhci_pci_fixes sdhci_intel_byt_sd = {
|
||||
};
|
||||
|
||||
/* O2Micro extra registers */
|
||||
#define O2_SD_LOCK_WP 0xD3
|
||||
#define O2_SD_MULTI_VCC3V 0xEE
|
||||
|
|
@ -855,6 +885,30 @@ static const struct pci_device_id pci_ids[] = {
|
|||
.driver_data = (kernel_ulong_t)&sdhci_intel_pch_sdio,
|
||||
},
|
||||
|
||||
{
|
||||
.vendor = PCI_VENDOR_ID_INTEL,
|
||||
.device = PCI_DEVICE_ID_INTEL_BYT_EMMC,
|
||||
.subvendor = PCI_ANY_ID,
|
||||
.subdevice = PCI_ANY_ID,
|
||||
.driver_data = (kernel_ulong_t)&sdhci_intel_byt_emmc,
|
||||
},
|
||||
|
||||
{
|
||||
.vendor = PCI_VENDOR_ID_INTEL,
|
||||
.device = PCI_DEVICE_ID_INTEL_BYT_SDIO,
|
||||
.subvendor = PCI_ANY_ID,
|
||||
.subdevice = PCI_ANY_ID,
|
||||
.driver_data = (kernel_ulong_t)&sdhci_intel_byt_sdio,
|
||||
},
|
||||
|
||||
{
|
||||
.vendor = PCI_VENDOR_ID_INTEL,
|
||||
.device = PCI_DEVICE_ID_INTEL_BYT_SD,
|
||||
.subvendor = PCI_ANY_ID,
|
||||
.subdevice = PCI_ANY_ID,
|
||||
.driver_data = (kernel_ulong_t)&sdhci_intel_byt_sd,
|
||||
},
|
||||
|
||||
{
|
||||
.vendor = PCI_VENDOR_ID_O2,
|
||||
.device = PCI_DEVICE_ID_O2_8120,
|
||||
|
|
|
|||
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