can: janz-ican3: add support for CAL/CANopen firmware
In our department we are using some older Janz ICAN3-modules in our dekstop pcs. There we have slightly different carrier boards than the janz-cmodio supported in the kernel sources, called CAN-PCI2 with two submodules. But the pci configuration regions are identical. So extending the supported pci devices to the corresponding device ids is sufficient to get the drivers working. * The old ICAN3-modules with firmware 1.28 need more then 250ms for the restart after reset. I've increased the timeout to 500ms. * The janz_ican3 module uses the raw can services of the Janz-firmware, this means firmware must be ICANOS/2. Our ICAN3-modules are equipped with CAL/CANopen-firmware, so I must use the appropriate commands for the layer management services. Te driver detects the firmware after module reset and selects the commands matching the firmware. This affects the bus on/off-command (ican3_set_bus_state) and the configuration of the bittiming (ican3_set_bittiming). For better diagnostics the detected firmware string is presented as sysfs attribute (fwinfo). Signed-off-by: Andreas Gröger <andreas24groeger@gmail.com> Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
This commit is contained in:
Andreas Gröger
Marc Kleine-Budde
Родитель
0d1802ef8f
Коммит
844e0edf42
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@ -8,3 +8,12 @@ Description:
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Default: 1 (termination active)
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Reading: get actual termination state
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Writing: set actual termination state (0=no termination, 1=termination active)
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What: /sys/class/net/<iface>/fwinfo
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Date: May 2015
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KernelVersion: 3.19
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Contact: Andreas Gröger <andreas24groeger@gmail.com>
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Description:
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Firmware stamp of ican3 module
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Read-only: 32 byte string identification of the ICAN3 module
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(known values: "JANZ-ICAN3 ICANOS 1.xx", "JANZ-ICAN3 CAL/CANopen 1.xx")
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@ -267,6 +267,10 @@ static void cmodio_pci_remove(struct pci_dev *dev)
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static const struct pci_device_id cmodio_pci_ids[] = {
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{ PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_9030, PCI_VENDOR_ID_JANZ, 0x0101 },
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{ PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_9050, PCI_VENDOR_ID_JANZ, 0x0100 },
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{ PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_9030, PCI_VENDOR_ID_JANZ, 0x0201 },
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{ PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_9030, PCI_VENDOR_ID_JANZ, 0x0202 },
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{ PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_9050, PCI_VENDOR_ID_JANZ, 0x0201 },
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{ PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_9050, PCI_VENDOR_ID_JANZ, 0x0202 },
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{ 0, }
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};
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MODULE_DEVICE_TABLE(pci, cmodio_pci_ids);
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@ -40,6 +40,7 @@
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#define MSYNC_PEER 0x00 /* ICAN only */
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#define MSYNC_LOCL 0x01 /* host only */
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#define TARGET_RUNNING 0x02
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#define FIRMWARE_STAMP 0x60 /* big endian firmware stamp */
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#define MSYNC_RB0 0x01
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#define MSYNC_RB1 0x02
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@ -83,6 +84,7 @@
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#define MSG_COFFREQ 0x42
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#define MSG_CONREQ 0x43
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#define MSG_CCONFREQ 0x47
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#define MSG_LMTS 0xb4
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/*
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* Janz ICAN3 CAN Inquiry Message Types
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@ -165,6 +167,12 @@
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/* SJA1000 Clock Input */
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#define ICAN3_CAN_CLOCK 8000000
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/* Janz ICAN3 firmware types */
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enum ican3_fwtype {
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ICAN3_FWTYPE_ICANOS,
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ICAN3_FWTYPE_CAL_CANOPEN,
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};
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/* Driver Name */
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#define DRV_NAME "janz-ican3"
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@ -215,6 +223,10 @@ struct ican3_dev {
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struct completion buserror_comp;
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struct can_berr_counter bec;
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/* firmware type */
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enum ican3_fwtype fwtype;
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char fwinfo[32];
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/* old and new style host interface */
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unsigned int iftype;
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@ -750,13 +762,61 @@ static int ican3_set_id_filter(struct ican3_dev *mod, bool accept)
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*/
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static int ican3_set_bus_state(struct ican3_dev *mod, bool on)
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{
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struct can_bittiming *bt = &mod->can.bittiming;
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struct ican3_msg msg;
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u8 btr0, btr1;
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int res;
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memset(&msg, 0, sizeof(msg));
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msg.spec = on ? MSG_CONREQ : MSG_COFFREQ;
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msg.len = cpu_to_le16(0);
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/* This algorithm was stolen from drivers/net/can/sja1000/sja1000.c */
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/* The bittiming register command for the ICAN3 just sets the bit timing */
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/* registers on the SJA1000 chip directly */
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btr0 = ((bt->brp - 1) & 0x3f) | (((bt->sjw - 1) & 0x3) << 6);
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btr1 = ((bt->prop_seg + bt->phase_seg1 - 1) & 0xf) |
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(((bt->phase_seg2 - 1) & 0x7) << 4);
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if (mod->can.ctrlmode & CAN_CTRLMODE_3_SAMPLES)
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btr1 |= 0x80;
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return ican3_send_msg(mod, &msg);
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if (mod->fwtype == ICAN3_FWTYPE_ICANOS) {
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if (on) {
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/* set bittiming */
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memset(&msg, 0, sizeof(msg));
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msg.spec = MSG_CBTRREQ;
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msg.len = cpu_to_le16(4);
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msg.data[0] = 0x00;
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msg.data[1] = 0x00;
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msg.data[2] = btr0;
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msg.data[3] = btr1;
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res = ican3_send_msg(mod, &msg);
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if (res)
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return res;
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}
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/* can-on/off request */
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memset(&msg, 0, sizeof(msg));
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msg.spec = on ? MSG_CONREQ : MSG_COFFREQ;
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msg.len = cpu_to_le16(0);
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return ican3_send_msg(mod, &msg);
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} else if (mod->fwtype == ICAN3_FWTYPE_CAL_CANOPEN) {
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memset(&msg, 0, sizeof(msg));
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msg.spec = MSG_LMTS;
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if (on) {
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msg.len = cpu_to_le16(4);
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msg.data[0] = 0;
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msg.data[1] = 0;
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msg.data[2] = btr0;
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msg.data[3] = btr1;
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} else {
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msg.len = cpu_to_le16(2);
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msg.data[0] = 1;
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msg.data[1] = 0;
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}
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return ican3_send_msg(mod, &msg);
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}
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return -ENOTSUPP;
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}
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static int ican3_set_termination(struct ican3_dev *mod, bool on)
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@ -1402,7 +1462,7 @@ static int ican3_reset_module(struct ican3_dev *mod)
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return 0;
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msleep(10);
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} while (time_before(jiffies, start + HZ / 4));
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} while (time_before(jiffies, start + HZ / 2));
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netdev_err(mod->ndev, "failed to reset CAN module\n");
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return -ETIMEDOUT;
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@ -1427,6 +1487,17 @@ static int ican3_startup_module(struct ican3_dev *mod)
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return ret;
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}
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/* detect firmware */
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memcpy_fromio(mod->fwinfo, mod->dpm + FIRMWARE_STAMP, sizeof(mod->fwinfo) - 1);
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if (strncmp(mod->fwinfo, "JANZ-ICAN3", 10)) {
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netdev_err(mod->ndev, "ICAN3 not detected (found %s)\n", mod->fwinfo);
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return -ENODEV;
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}
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if (strstr(mod->fwinfo, "CAL/CANopen"))
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mod->fwtype = ICAN3_FWTYPE_CAL_CANOPEN;
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else
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mod->fwtype = ICAN3_FWTYPE_ICANOS;
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/* re-enable interrupts so we can send messages */
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iowrite8(1 << mod->num, &mod->ctrl->int_enable);
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@ -1615,36 +1686,6 @@ static const struct can_bittiming_const ican3_bittiming_const = {
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.brp_inc = 1,
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};
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/*
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* This routine was stolen from drivers/net/can/sja1000/sja1000.c
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*
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* The bittiming register command for the ICAN3 just sets the bit timing
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* registers on the SJA1000 chip directly
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*/
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static int ican3_set_bittiming(struct net_device *ndev)
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{
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struct ican3_dev *mod = netdev_priv(ndev);
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struct can_bittiming *bt = &mod->can.bittiming;
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struct ican3_msg msg;
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u8 btr0, btr1;
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btr0 = ((bt->brp - 1) & 0x3f) | (((bt->sjw - 1) & 0x3) << 6);
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btr1 = ((bt->prop_seg + bt->phase_seg1 - 1) & 0xf) |
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(((bt->phase_seg2 - 1) & 0x7) << 4);
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if (mod->can.ctrlmode & CAN_CTRLMODE_3_SAMPLES)
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btr1 |= 0x80;
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memset(&msg, 0, sizeof(msg));
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msg.spec = MSG_CBTRREQ;
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msg.len = cpu_to_le16(4);
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msg.data[0] = 0x00;
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msg.data[1] = 0x00;
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msg.data[2] = btr0;
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msg.data[3] = btr1;
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return ican3_send_msg(mod, &msg);
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}
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static int ican3_set_mode(struct net_device *ndev, enum can_mode mode)
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{
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struct ican3_dev *mod = netdev_priv(ndev);
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@ -1730,11 +1771,22 @@ static ssize_t ican3_sysfs_set_term(struct device *dev,
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return count;
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}
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static ssize_t ican3_sysfs_show_fwinfo(struct device *dev,
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struct device_attribute *attr,
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char *buf)
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{
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struct ican3_dev *mod = netdev_priv(to_net_dev(dev));
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return scnprintf(buf, PAGE_SIZE, "%s\n", mod->fwinfo);
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}
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static DEVICE_ATTR(termination, S_IWUSR | S_IRUGO, ican3_sysfs_show_term,
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ican3_sysfs_set_term);
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static DEVICE_ATTR(fwinfo, S_IRUSR | S_IRUGO, ican3_sysfs_show_fwinfo, NULL);
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static struct attribute *ican3_sysfs_attrs[] = {
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&dev_attr_termination.attr,
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&dev_attr_fwinfo.attr,
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NULL,
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};
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@ -1794,7 +1846,6 @@ static int ican3_probe(struct platform_device *pdev)
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mod->can.clock.freq = ICAN3_CAN_CLOCK;
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mod->can.bittiming_const = &ican3_bittiming_const;
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mod->can.do_set_bittiming = ican3_set_bittiming;
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mod->can.do_set_mode = ican3_set_mode;
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mod->can.do_get_berr_counter = ican3_get_berr_counter;
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mod->can.ctrlmode_supported = CAN_CTRLMODE_3_SAMPLES
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@ -1866,7 +1917,7 @@ static int ican3_probe(struct platform_device *pdev)
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goto out_free_irq;
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}
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dev_info(dev, "module %d: registered CAN device\n", pdata->modno);
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netdev_info(mod->ndev, "module %d: registered CAN device\n", pdata->modno);
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return 0;
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out_free_irq:
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