dt-bindings: remoteproc: qcom: Add SC7280 ADSP support
Add ADSP PIL loading support for SC7280 SoCs. Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/1664368073-13659-2-git-send-email-quic_srivasam@quicinc.com
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/remoteproc/qcom,sc7280-adsp-pil.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Qualcomm SC7280 ADSP Peripheral Image Loader
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maintainers:
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- Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com>
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description:
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This document describes the hardware for a component that loads and boots firmware
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on the Qualcomm Technology Inc. ADSP.
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properties:
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compatible:
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enum:
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- qcom,sc7280-adsp-pil
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reg:
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items:
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- description: qdsp6ss register
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- description: efuse q6ss register
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iommus:
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items:
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- description: Phandle to apps_smmu node with sid mask
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interrupts:
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items:
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- description: Watchdog interrupt
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- description: Fatal interrupt
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- description: Ready interrupt
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- description: Handover interrupt
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- description: Stop acknowledge interrupt
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- description: Shutdown acknowledge interrupt
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interrupt-names:
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items:
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- const: wdog
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- const: fatal
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- const: ready
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- const: handover
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- const: stop-ack
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- const: shutdown-ack
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clocks:
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items:
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- description: XO clock
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- description: GCC CFG NOC LPASS clock
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clock-names:
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items:
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- const: xo
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- const: gcc_cfg_noc_lpass
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power-domains:
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items:
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- description: LCX power domain
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resets:
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items:
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- description: PDC AUDIO SYNC RESET
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- description: CC LPASS restart
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reset-names:
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items:
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- const: pdc_sync
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- const: cc_lpass
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memory-region:
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maxItems: 1
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description: Reference to the reserved-memory for the Hexagon core
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qcom,halt-regs:
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$ref: /schemas/types.yaml#/definitions/phandle-array
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description:
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Phandle reference to a syscon representing TCSR followed by the
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four offsets within syscon for q6, modem, nc and qv6 halt registers.
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items:
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- items:
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- description: phandle to TCSR_MUTEX registers
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- description: offset to the Q6 halt register
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- description: offset to the modem halt register
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- description: offset to the nc halt register
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- description: offset to the vq6 halt register
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qcom,smem-states:
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$ref: /schemas/types.yaml#/definitions/phandle-array
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description: States used by the AP to signal the Hexagon core
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items:
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- description: Stop the modem
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qcom,smem-state-names:
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description: The names of the state bits used for SMP2P output
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const: stop
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qcom,qmp:
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$ref: /schemas/types.yaml#/definitions/phandle
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description: Reference to the AOSS side-channel message RAM.
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glink-edge:
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$ref: qcom,glink-edge.yaml#
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type: object
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unevaluatedProperties: false
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description: |
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Qualcomm G-Link subnode which represents communication edge, channels
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and devices related to the ADSP.
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properties:
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label:
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const: lpass
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gpr: true
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apr: false
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fastrpc: false
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required:
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- label
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required:
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- compatible
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- reg
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- interrupts
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- interrupt-names
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- clocks
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- clock-names
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- power-domains
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- resets
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- reset-names
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- qcom,halt-regs
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- memory-region
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- qcom,smem-states
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- qcom,smem-state-names
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- qcom,qmp
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/clock/qcom,rpmh.h>
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#include <dt-bindings/clock/qcom,gcc-sc7280.h>
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#include <dt-bindings/clock/qcom,lpass-sc7280.h>
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#include <dt-bindings/reset/qcom,sdm845-aoss.h>
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#include <dt-bindings/reset/qcom,sdm845-pdc.h>
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#include <dt-bindings/power/qcom-rpmpd.h>
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#include <dt-bindings/mailbox/qcom-ipcc.h>
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remoteproc@3000000 {
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compatible = "qcom,sc7280-adsp-pil";
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reg = <0x03000000 0x5000>,
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<0x0355b000 0x10>;
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interrupts-extended = <&pdc 162 IRQ_TYPE_EDGE_RISING>,
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<&adsp_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
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<&adsp_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
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<&adsp_smp2p_in 2 IRQ_TYPE_EDGE_RISING>,
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<&adsp_smp2p_in 3 IRQ_TYPE_EDGE_RISING>,
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<&adsp_smp2p_in 7 IRQ_TYPE_EDGE_RISING>;
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interrupt-names = "wdog", "fatal", "ready",
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"handover", "stop-ack", "shutdown-ack";
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clocks = <&rpmhcc RPMH_CXO_CLK>,
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<&gcc GCC_CFG_NOC_LPASS_CLK>;
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clock-names = "xo", "gcc_cfg_noc_lpass";
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power-domains = <&rpmhpd SC7280_LCX>;
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resets = <&pdc_reset PDC_AUDIO_SYNC_RESET>,
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<&aoss_reset AOSS_CC_LPASS_RESTART>;
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reset-names = "pdc_sync", "cc_lpass";
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qcom,halt-regs = <&tcsr_mutex 0x23000 0x25000 0x28000 0x33000>;
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memory-region = <&adsp_mem>;
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qcom,smem-states = <&adsp_smp2p_out 0>;
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qcom,smem-state-names = "stop";
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qcom,qmp = <&aoss_qmp>;
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glink-edge {
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interrupts-extended = <&ipcc IPCC_CLIENT_LPASS
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IPCC_MPROC_SIGNAL_GLINK_QMP
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IRQ_TYPE_EDGE_RISING>;
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mboxes = <&ipcc IPCC_CLIENT_LPASS
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IPCC_MPROC_SIGNAL_GLINK_QMP>;
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label = "lpass";
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qcom,remote-pid = <2>;
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};
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};
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