mmc: sdhci-esdhc-imx: remove emulation of uhs_mode
We no longer need to emulate the uhs_mode field of the host control2 register - the main sdhci driver never reads this back to evaluate the current mode as it caches the current mode instead. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Tested-by: Markus Pargmann <mpa@pengutronix.de> Tested-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Chris Ball <chris@printf.net>
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4b6f37d3a3
Коммит
850a29b859
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@ -160,7 +160,6 @@ struct pltfm_imx_data {
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MULTIBLK_IN_PROCESS, /* exact multiblock cmd in process */
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WAIT_FOR_INT, /* sent CMD12, waiting for response INT */
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} multiblock_status;
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u32 uhs_mode;
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u32 is_ddr;
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};
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@ -382,7 +381,6 @@ static u16 esdhc_readw_le(struct sdhci_host *host, int reg)
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if (val & ESDHC_MIX_CTRL_SMPCLK_SEL)
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ret |= SDHCI_CTRL_TUNED_CLK;
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ret |= (imx_data->uhs_mode & SDHCI_CTRL_UHS_MASK);
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ret &= ~SDHCI_CTRL_PRESET_VAL_ENABLE;
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return ret;
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@ -429,7 +427,6 @@ static void esdhc_writew_le(struct sdhci_host *host, u16 val, int reg)
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else
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new_val &= ~ESDHC_VENDOR_SPEC_VSELECT;
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writel(new_val, host->ioaddr + ESDHC_VENDOR_SPEC);
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imx_data->uhs_mode = val & SDHCI_CTRL_UHS_MASK;
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if (imx_data->socdata->flags & ESDHC_FLAG_MAN_TUNING) {
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new_val = readl(host->ioaddr + ESDHC_MIX_CTRL);
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if (val & SDHCI_CTRL_TUNED_CLK)
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@ -841,28 +838,20 @@ static int esdhc_change_pinstate(struct sdhci_host *host,
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return pinctrl_select_state(imx_data->pinctrl, pinctrl);
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}
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static void esdhc_set_uhs_signaling(struct sdhci_host *host, unsigned int uhs)
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static void esdhc_set_uhs_signaling(struct sdhci_host *host, unsigned timing)
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{
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struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
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struct pltfm_imx_data *imx_data = pltfm_host->priv;
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struct esdhc_platform_data *boarddata = &imx_data->boarddata;
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switch (uhs) {
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switch (timing) {
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case MMC_TIMING_UHS_SDR12:
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imx_data->uhs_mode = SDHCI_CTRL_UHS_SDR12;
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break;
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case MMC_TIMING_UHS_SDR25:
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imx_data->uhs_mode = SDHCI_CTRL_UHS_SDR25;
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break;
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case MMC_TIMING_UHS_SDR50:
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imx_data->uhs_mode = SDHCI_CTRL_UHS_SDR50;
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break;
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case MMC_TIMING_UHS_SDR104:
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case MMC_TIMING_MMC_HS200:
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imx_data->uhs_mode = SDHCI_CTRL_UHS_SDR104;
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break;
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case MMC_TIMING_UHS_DDR50:
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imx_data->uhs_mode = SDHCI_CTRL_UHS_DDR50;
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writel(readl(host->ioaddr + ESDHC_MIX_CTRL) |
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ESDHC_MIX_CTRL_DDREN,
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host->ioaddr + ESDHC_MIX_CTRL);
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@ -879,7 +868,7 @@ static void esdhc_set_uhs_signaling(struct sdhci_host *host, unsigned int uhs)
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break;
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}
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esdhc_change_pinstate(host, uhs);
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esdhc_change_pinstate(host, timing);
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}
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static void esdhc_reset(struct sdhci_host *host, u8 mask)
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