Move most of remaining omap iommu code to drivers/iommu.
This is needed for the multiplatform kernels as the plat and mach headers cannot be included. These changes were agreed to be merged via the arm-soc tree by Joerg and Ohad as these will cause some merge conflicts with the other related clean-up branches. So omap-for-v3.8/cleanup-headers-iommu should be added as one of the depends branches for arm-soc. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.12 (GNU/Linux) iQIcBAABAgAGBQJQrSVZAAoJEBvUPslcq6Vz6jwQAILCHwQK9P5Up2Fejxrz51SE GSuWjmo0+b1jfPphg9m7ctJCb5wCuVYgOf7d2XkZgHqjzop4fGX/bHYoviZRxBGl atqGH8velt9Jhr/FUo6KczgntGT339BXkdoN+WwP6VbM72mzReV0UOVq9II8BItK HyQNqJlcAZiPoIcpHnM6rYxJFXnBrlQKkJYlG9EaGNdEipeKsY+f8qOSq00gKgDp epfNaiCkinYwPXTRX3/NvFH3vwrKjvpDg7qTpUi/V1AebngH5GZrzfVLr3mWIRy6 vmMe/qu5tz55+opvuIN8AFDZA+DLie1YAOwgbNAQ6yHft3WwFT/8rB7+LnxFhFb0 cNc++NxsD9dJS5Hed1q02kDZ4mkN8Ss41mTzyK0g1sIQzdumDUMDo8SGprxRBfls RLVYWLEoGZ9gPmXwlUHD9+hEz6SrwDN0sUJRQH7omcyFT7oOfwocJaO+FzAZ9QE2 uPYF/h/k15rRlFt4wdGuhaYRXhayBrAnjr43FxfZiIbqdDWaz77j1cSbmkvaEAYE BQH8xWXmDjBIZIm0kxt3ajB7M+z+ZH/4D2pmHU7Ljd6ybewxrI+SasQ5ZJT+EJSH ZBSGVMsrgD/oesNr0GrA/l3Z+FTnRpWwEcXxydWZBcENRVALfBm+khE5jqSo+hag KAPEfoHBDyxQ91OFO8rb =yFcc -----END PGP SIGNATURE----- Merge tag 'omap-for-v3.8/cleanup-headers-iommu-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/headers From Tony Lindgren: Move most of remaining omap iommu code to drivers/iommu. This is needed for the multiplatform kernels as the plat and mach headers cannot be included. These changes were agreed to be merged via the arm-soc tree by Joerg and Ohad as these will cause some merge conflicts with the other related clean-up branches. So omap-for-v3.8/cleanup-headers-iommu should be added as one of the depends branches for arm-soc. * tag 'omap-for-v3.8/cleanup-headers-iommu-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: OMAP2+: Move iommu/iovmm headers to platform_data ARM: OMAP2+: Make some definitions local ARM: OMAP2+: Move iommu2 to drivers/iommu/omap-iommu2.c ARM: OMAP2+: Move plat/iovmm.h to include/linux/omap-iommu.h ARM: OMAP2+: Move iopgtable header to drivers/iommu/ ARM: OMAP: Merge iommu2.h into iommu.h Conflicts due to surrounding changes in: arch/arm/mach-omap2/omap_hwmod_44xx_data.c drivers/media/platform/omap3isp/ispvideo.c Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Коммит
8556650dd3
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@ -196,8 +196,6 @@ obj-$(CONFIG_HW_PERF_EVENTS) += pmu.o
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obj-$(CONFIG_OMAP_MBOX_FWK) += mailbox_mach.o
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mailbox_mach-objs := mailbox.o
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obj-$(CONFIG_OMAP_IOMMU) += iommu2.o
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iommu-$(CONFIG_OMAP_IOMMU) := omap-iommu.o
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obj-y += $(iommu-m) $(iommu-y)
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@ -128,7 +128,7 @@ static struct platform_device omap2cam_device = {
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#if defined(CONFIG_IOMMU_API)
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#include <plat/iommu.h>
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#include <linux/platform_data/iommu-omap.h>
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static struct resource omap3isp_resources[] = {
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{
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@ -13,7 +13,7 @@
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <plat/iommu.h>
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#include <linux/platform_data/iommu-omap.h>
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#include "soc.h"
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#include "common.h"
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@ -24,8 +24,8 @@
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#include "l4_3xxx.h"
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#include <linux/platform_data/asoc-ti-mcbsp.h>
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#include <linux/platform_data/spi-omap2-mcspi.h>
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#include <linux/platform_data/iommu-omap.h>
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#include <plat/dmtimer.h>
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#include <plat/iommu.h>
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#include "am35xx.h"
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@ -27,8 +27,8 @@
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#include <linux/platform_data/spi-omap2-mcspi.h>
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#include <linux/platform_data/asoc-ti-mcbsp.h>
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#include <linux/platform_data/iommu-omap.h>
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#include <plat/dmtimer.h>
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#include <plat/iommu.h>
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#include "omap_hwmod.h"
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#include "omap_hwmod_common_data.h"
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@ -1,96 +0,0 @@
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/*
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* omap iommu: omap2 architecture specific definitions
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*
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* Copyright (C) 2008-2009 Nokia Corporation
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*
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* Written by Hiroshi DOYU <Hiroshi.DOYU@nokia.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __MACH_IOMMU2_H
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#define __MACH_IOMMU2_H
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#include <linux/io.h>
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/*
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* MMU Register offsets
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*/
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#define MMU_REVISION 0x00
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#define MMU_SYSCONFIG 0x10
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#define MMU_SYSSTATUS 0x14
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#define MMU_IRQSTATUS 0x18
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#define MMU_IRQENABLE 0x1c
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#define MMU_WALKING_ST 0x40
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#define MMU_CNTL 0x44
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#define MMU_FAULT_AD 0x48
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#define MMU_TTB 0x4c
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#define MMU_LOCK 0x50
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#define MMU_LD_TLB 0x54
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#define MMU_CAM 0x58
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#define MMU_RAM 0x5c
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#define MMU_GFLUSH 0x60
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#define MMU_FLUSH_ENTRY 0x64
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#define MMU_READ_CAM 0x68
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#define MMU_READ_RAM 0x6c
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#define MMU_EMU_FAULT_AD 0x70
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#define MMU_REG_SIZE 256
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/*
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* MMU Register bit definitions
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*/
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#define MMU_LOCK_BASE_SHIFT 10
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#define MMU_LOCK_BASE_MASK (0x1f << MMU_LOCK_BASE_SHIFT)
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#define MMU_LOCK_BASE(x) \
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((x & MMU_LOCK_BASE_MASK) >> MMU_LOCK_BASE_SHIFT)
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#define MMU_LOCK_VICT_SHIFT 4
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#define MMU_LOCK_VICT_MASK (0x1f << MMU_LOCK_VICT_SHIFT)
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#define MMU_LOCK_VICT(x) \
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((x & MMU_LOCK_VICT_MASK) >> MMU_LOCK_VICT_SHIFT)
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#define MMU_CAM_VATAG_SHIFT 12
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#define MMU_CAM_VATAG_MASK \
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((~0UL >> MMU_CAM_VATAG_SHIFT) << MMU_CAM_VATAG_SHIFT)
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#define MMU_CAM_P (1 << 3)
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#define MMU_CAM_V (1 << 2)
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#define MMU_CAM_PGSZ_MASK 3
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#define MMU_CAM_PGSZ_1M (0 << 0)
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#define MMU_CAM_PGSZ_64K (1 << 0)
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#define MMU_CAM_PGSZ_4K (2 << 0)
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#define MMU_CAM_PGSZ_16M (3 << 0)
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#define MMU_RAM_PADDR_SHIFT 12
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#define MMU_RAM_PADDR_MASK \
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((~0UL >> MMU_RAM_PADDR_SHIFT) << MMU_RAM_PADDR_SHIFT)
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#define MMU_RAM_ENDIAN_SHIFT 9
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#define MMU_RAM_ENDIAN_MASK (1 << MMU_RAM_ENDIAN_SHIFT)
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#define MMU_RAM_ENDIAN_BIG (1 << MMU_RAM_ENDIAN_SHIFT)
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#define MMU_RAM_ENDIAN_LITTLE (0 << MMU_RAM_ENDIAN_SHIFT)
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#define MMU_RAM_ELSZ_SHIFT 7
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#define MMU_RAM_ELSZ_MASK (3 << MMU_RAM_ELSZ_SHIFT)
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#define MMU_RAM_ELSZ_8 (0 << MMU_RAM_ELSZ_SHIFT)
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#define MMU_RAM_ELSZ_16 (1 << MMU_RAM_ELSZ_SHIFT)
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#define MMU_RAM_ELSZ_32 (2 << MMU_RAM_ELSZ_SHIFT)
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#define MMU_RAM_ELSZ_NONE (3 << MMU_RAM_ELSZ_SHIFT)
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#define MMU_RAM_MIXED_SHIFT 6
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#define MMU_RAM_MIXED_MASK (1 << MMU_RAM_MIXED_SHIFT)
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#define MMU_RAM_MIXED MMU_RAM_MIXED_MASK
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/*
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* register accessors
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*/
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static inline u32 iommu_read_reg(struct omap_iommu *obj, size_t offs)
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{
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return __raw_readl(obj->regbase + offs);
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}
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static inline void iommu_write_reg(struct omap_iommu *obj, u32 val, size_t offs)
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{
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__raw_writel(val, obj->regbase + offs);
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}
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#endif /* __MACH_IOMMU2_H */
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@ -1,89 +0,0 @@
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/*
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* omap iommu: simple virtual address space management
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*
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* Copyright (C) 2008-2009 Nokia Corporation
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*
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* Written by Hiroshi DOYU <Hiroshi.DOYU@nokia.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __IOMMU_MMAP_H
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#define __IOMMU_MMAP_H
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#include <linux/iommu.h>
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struct iovm_struct {
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struct omap_iommu *iommu; /* iommu object which this belongs to */
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u32 da_start; /* area definition */
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u32 da_end;
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u32 flags; /* IOVMF_: see below */
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struct list_head list; /* linked in ascending order */
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const struct sg_table *sgt; /* keep 'page' <-> 'da' mapping */
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void *va; /* mpu side mapped address */
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};
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/*
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* IOVMF_FLAGS: attribute for iommu virtual memory area(iovma)
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*
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* lower 16 bit is used for h/w and upper 16 bit is for s/w.
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*/
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#define IOVMF_SW_SHIFT 16
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/*
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* iovma: h/w flags derived from cam and ram attribute
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*/
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#define IOVMF_CAM_MASK (~((1 << 10) - 1))
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#define IOVMF_RAM_MASK (~IOVMF_CAM_MASK)
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#define IOVMF_PGSZ_MASK (3 << 0)
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#define IOVMF_PGSZ_1M MMU_CAM_PGSZ_1M
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#define IOVMF_PGSZ_64K MMU_CAM_PGSZ_64K
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#define IOVMF_PGSZ_4K MMU_CAM_PGSZ_4K
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#define IOVMF_PGSZ_16M MMU_CAM_PGSZ_16M
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#define IOVMF_ENDIAN_MASK (1 << 9)
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#define IOVMF_ENDIAN_BIG MMU_RAM_ENDIAN_BIG
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#define IOVMF_ENDIAN_LITTLE MMU_RAM_ENDIAN_LITTLE
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#define IOVMF_ELSZ_MASK (3 << 7)
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#define IOVMF_ELSZ_8 MMU_RAM_ELSZ_8
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#define IOVMF_ELSZ_16 MMU_RAM_ELSZ_16
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#define IOVMF_ELSZ_32 MMU_RAM_ELSZ_32
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#define IOVMF_ELSZ_NONE MMU_RAM_ELSZ_NONE
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#define IOVMF_MIXED_MASK (1 << 6)
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#define IOVMF_MIXED MMU_RAM_MIXED
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/*
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* iovma: s/w flags, used for mapping and umapping internally.
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*/
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#define IOVMF_MMIO (1 << IOVMF_SW_SHIFT)
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#define IOVMF_ALLOC (2 << IOVMF_SW_SHIFT)
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#define IOVMF_ALLOC_MASK (3 << IOVMF_SW_SHIFT)
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/* "superpages" is supported just with physically linear pages */
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#define IOVMF_DISCONT (1 << (2 + IOVMF_SW_SHIFT))
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#define IOVMF_LINEAR (2 << (2 + IOVMF_SW_SHIFT))
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#define IOVMF_LINEAR_MASK (3 << (2 + IOVMF_SW_SHIFT))
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#define IOVMF_DA_FIXED (1 << (4 + IOVMF_SW_SHIFT))
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extern struct iovm_struct *omap_find_iovm_area(struct device *dev, u32 da);
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extern u32
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omap_iommu_vmap(struct iommu_domain *domain, struct device *dev, u32 da,
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const struct sg_table *sgt, u32 flags);
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extern struct sg_table *omap_iommu_vunmap(struct iommu_domain *domain,
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struct device *dev, u32 da);
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extern u32
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omap_iommu_vmalloc(struct iommu_domain *domain, struct device *dev,
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u32 da, size_t bytes, u32 flags);
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extern void
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omap_iommu_vfree(struct iommu_domain *domain, struct device *dev,
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const u32 da);
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extern void *omap_da_to_va(struct device *dev, u32 da);
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#endif /* __IOMMU_MMAP_H */
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@ -7,6 +7,7 @@ obj-$(CONFIG_DMAR_TABLE) += dmar.o
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obj-$(CONFIG_INTEL_IOMMU) += iova.o intel-iommu.o
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obj-$(CONFIG_IRQ_REMAP) += intel_irq_remapping.o irq_remapping.o
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obj-$(CONFIG_OMAP_IOMMU) += omap-iommu.o
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obj-$(CONFIG_OMAP_IOMMU) += omap-iommu2.o
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obj-$(CONFIG_OMAP_IOVMM) += omap-iovmm.o
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obj-$(CONFIG_OMAP_IOMMU_DEBUG) += omap-iommu-debug.o
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obj-$(CONFIG_TEGRA_IOMMU_GART) += tegra-gart.o
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@ -18,11 +18,11 @@
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#include <linux/uaccess.h>
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#include <linux/platform_device.h>
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#include <linux/debugfs.h>
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#include <linux/omap-iommu.h>
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#include <linux/platform_data/iommu-omap.h>
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#include <plat/iommu.h>
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#include <plat/iovmm.h>
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#include <plat/iopgtable.h>
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#include "omap-iopgtable.h"
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#include "omap-iommu.h"
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#define MAXCOLUMN 100 /* for short messages */
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|
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@ -19,14 +19,17 @@
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#include <linux/clk.h>
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#include <linux/platform_device.h>
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#include <linux/iommu.h>
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#include <linux/omap-iommu.h>
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#include <linux/mutex.h>
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#include <linux/spinlock.h>
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#include <linux/io.h>
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#include <asm/cacheflush.h>
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#include <plat/iommu.h>
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#include <linux/platform_data/iommu-omap.h>
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#include <plat/iopgtable.h>
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#include "omap-iopgtable.h"
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#include "omap-iommu.h"
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#define for_each_iotlb_cr(obj, n, __i, cr) \
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for (__i = 0; \
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@ -51,6 +54,21 @@ struct omap_iommu_domain {
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spinlock_t lock;
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};
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#define MMU_LOCK_BASE_SHIFT 10
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#define MMU_LOCK_BASE_MASK (0x1f << MMU_LOCK_BASE_SHIFT)
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#define MMU_LOCK_BASE(x) \
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((x & MMU_LOCK_BASE_MASK) >> MMU_LOCK_BASE_SHIFT)
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#define MMU_LOCK_VICT_SHIFT 4
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#define MMU_LOCK_VICT_MASK (0x1f << MMU_LOCK_VICT_SHIFT)
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#define MMU_LOCK_VICT(x) \
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((x & MMU_LOCK_VICT_MASK) >> MMU_LOCK_VICT_SHIFT)
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struct iotlb_lock {
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short base;
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short vict;
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};
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/* accommodate the difference between omap1 and omap2/3 */
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static const struct iommu_functions *arch_iommu;
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|
@ -1015,6 +1033,23 @@ static void iopte_cachep_ctor(void *iopte)
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clean_dcache_area(iopte, IOPTE_TABLE_SIZE);
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}
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static u32 iotlb_init_entry(struct iotlb_entry *e, u32 da, u32 pa,
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u32 flags)
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{
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memset(e, 0, sizeof(*e));
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|
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e->da = da;
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e->pa = pa;
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e->valid = 1;
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/* FIXME: add OMAP1 support */
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e->pgsz = flags & MMU_CAM_PGSZ_MASK;
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e->endian = flags & MMU_RAM_ENDIAN_MASK;
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e->elsz = flags & MMU_RAM_ELSZ_MASK;
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e->mixed = flags & MMU_RAM_MIXED_MASK;
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return iopgsz_to_bytes(e->pgsz);
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}
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static int omap_iommu_map(struct iommu_domain *domain, unsigned long da,
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phys_addr_t pa, size_t bytes, int prot)
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{
|
||||
|
|
|
@ -10,8 +10,9 @@
|
|||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
#ifndef __MACH_IOMMU_H
|
||||
#define __MACH_IOMMU_H
|
||||
#if defined(CONFIG_ARCH_OMAP1)
|
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#error "iommu for this processor not implemented yet"
|
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#endif
|
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|
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struct iotlb_entry {
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u32 da;
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|
@ -71,11 +72,6 @@ struct cr_regs {
|
|||
};
|
||||
};
|
||||
|
||||
struct iotlb_lock {
|
||||
short base;
|
||||
short vict;
|
||||
};
|
||||
|
||||
/* architecture specific functions */
|
||||
struct iommu_functions {
|
||||
unsigned long version;
|
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|
@ -103,42 +99,6 @@ struct iommu_functions {
|
|||
ssize_t (*dump_ctx)(struct omap_iommu *obj, char *buf, ssize_t len);
|
||||
};
|
||||
|
||||
/**
|
||||
* struct omap_mmu_dev_attr - OMAP mmu device attributes for omap_hwmod
|
||||
* @da_start: device address where the va space starts.
|
||||
* @da_end: device address where the va space ends.
|
||||
* @nr_tlb_entries: number of entries supported by the translation
|
||||
* look-aside buffer (TLB).
|
||||
*/
|
||||
struct omap_mmu_dev_attr {
|
||||
u32 da_start;
|
||||
u32 da_end;
|
||||
int nr_tlb_entries;
|
||||
};
|
||||
|
||||
struct iommu_platform_data {
|
||||
const char *name;
|
||||
const char *clk_name;
|
||||
const int nr_tlb_entries;
|
||||
u32 da_start;
|
||||
u32 da_end;
|
||||
};
|
||||
|
||||
/**
|
||||
* struct iommu_arch_data - omap iommu private data
|
||||
* @name: name of the iommu device
|
||||
* @iommu_dev: handle of the iommu device
|
||||
*
|
||||
* This is an omap iommu private data object, which binds an iommu user
|
||||
* to its iommu device. This object should be placed at the iommu user's
|
||||
* dev_archdata so generic IOMMU API can be used without having to
|
||||
* utilize omap-specific plumbing anymore.
|
||||
*/
|
||||
struct omap_iommu_arch_data {
|
||||
const char *name;
|
||||
struct omap_iommu *iommu_dev;
|
||||
};
|
||||
|
||||
#ifdef CONFIG_IOMMU_API
|
||||
/**
|
||||
* dev_to_omap_iommu() - retrieves an omap iommu object from a user device
|
||||
|
@ -152,18 +112,59 @@ static inline struct omap_iommu *dev_to_omap_iommu(struct device *dev)
|
|||
}
|
||||
#endif
|
||||
|
||||
/* IOMMU errors */
|
||||
#define OMAP_IOMMU_ERR_TLB_MISS (1 << 0)
|
||||
#define OMAP_IOMMU_ERR_TRANS_FAULT (1 << 1)
|
||||
#define OMAP_IOMMU_ERR_EMU_MISS (1 << 2)
|
||||
#define OMAP_IOMMU_ERR_TBLWALK_FAULT (1 << 3)
|
||||
#define OMAP_IOMMU_ERR_MULTIHIT_FAULT (1 << 4)
|
||||
/*
|
||||
* MMU Register offsets
|
||||
*/
|
||||
#define MMU_REVISION 0x00
|
||||
#define MMU_SYSCONFIG 0x10
|
||||
#define MMU_SYSSTATUS 0x14
|
||||
#define MMU_IRQSTATUS 0x18
|
||||
#define MMU_IRQENABLE 0x1c
|
||||
#define MMU_WALKING_ST 0x40
|
||||
#define MMU_CNTL 0x44
|
||||
#define MMU_FAULT_AD 0x48
|
||||
#define MMU_TTB 0x4c
|
||||
#define MMU_LOCK 0x50
|
||||
#define MMU_LD_TLB 0x54
|
||||
#define MMU_CAM 0x58
|
||||
#define MMU_RAM 0x5c
|
||||
#define MMU_GFLUSH 0x60
|
||||
#define MMU_FLUSH_ENTRY 0x64
|
||||
#define MMU_READ_CAM 0x68
|
||||
#define MMU_READ_RAM 0x6c
|
||||
#define MMU_EMU_FAULT_AD 0x70
|
||||
|
||||
#if defined(CONFIG_ARCH_OMAP1)
|
||||
#error "iommu for this processor not implemented yet"
|
||||
#else
|
||||
#include <plat/iommu2.h>
|
||||
#endif
|
||||
#define MMU_REG_SIZE 256
|
||||
|
||||
/*
|
||||
* MMU Register bit definitions
|
||||
*/
|
||||
#define MMU_CAM_VATAG_SHIFT 12
|
||||
#define MMU_CAM_VATAG_MASK \
|
||||
((~0UL >> MMU_CAM_VATAG_SHIFT) << MMU_CAM_VATAG_SHIFT)
|
||||
#define MMU_CAM_P (1 << 3)
|
||||
#define MMU_CAM_V (1 << 2)
|
||||
#define MMU_CAM_PGSZ_MASK 3
|
||||
#define MMU_CAM_PGSZ_1M (0 << 0)
|
||||
#define MMU_CAM_PGSZ_64K (1 << 0)
|
||||
#define MMU_CAM_PGSZ_4K (2 << 0)
|
||||
#define MMU_CAM_PGSZ_16M (3 << 0)
|
||||
|
||||
#define MMU_RAM_PADDR_SHIFT 12
|
||||
#define MMU_RAM_PADDR_MASK \
|
||||
((~0UL >> MMU_RAM_PADDR_SHIFT) << MMU_RAM_PADDR_SHIFT)
|
||||
|
||||
#define MMU_RAM_ENDIAN_MASK (1 << MMU_RAM_ENDIAN_SHIFT)
|
||||
#define MMU_RAM_ENDIAN_BIG (1 << MMU_RAM_ENDIAN_SHIFT)
|
||||
|
||||
#define MMU_RAM_ELSZ_MASK (3 << MMU_RAM_ELSZ_SHIFT)
|
||||
#define MMU_RAM_ELSZ_8 (0 << MMU_RAM_ELSZ_SHIFT)
|
||||
#define MMU_RAM_ELSZ_16 (1 << MMU_RAM_ELSZ_SHIFT)
|
||||
#define MMU_RAM_ELSZ_32 (2 << MMU_RAM_ELSZ_SHIFT)
|
||||
#define MMU_RAM_ELSZ_NONE (3 << MMU_RAM_ELSZ_SHIFT)
|
||||
#define MMU_RAM_MIXED_SHIFT 6
|
||||
#define MMU_RAM_MIXED_MASK (1 << MMU_RAM_MIXED_SHIFT)
|
||||
#define MMU_RAM_MIXED MMU_RAM_MIXED_MASK
|
||||
|
||||
/*
|
||||
* utilities for super page(16MB, 1MB, 64KB and 4KB)
|
||||
|
@ -199,23 +200,29 @@ extern void omap_iotlb_cr_to_e(struct cr_regs *cr, struct iotlb_entry *e);
|
|||
extern int
|
||||
omap_iopgtable_store_entry(struct omap_iommu *obj, struct iotlb_entry *e);
|
||||
|
||||
extern int omap_iommu_set_isr(const char *name,
|
||||
int (*isr)(struct omap_iommu *obj, u32 da, u32 iommu_errs,
|
||||
void *priv),
|
||||
void *isr_priv);
|
||||
|
||||
extern void omap_iommu_save_ctx(struct device *dev);
|
||||
extern void omap_iommu_restore_ctx(struct device *dev);
|
||||
|
||||
extern int omap_install_iommu_arch(const struct iommu_functions *ops);
|
||||
extern void omap_uninstall_iommu_arch(const struct iommu_functions *ops);
|
||||
|
||||
extern int omap_foreach_iommu_device(void *data,
|
||||
int (*fn)(struct device *, void *));
|
||||
|
||||
extern int omap_install_iommu_arch(const struct iommu_functions *ops);
|
||||
extern void omap_uninstall_iommu_arch(const struct iommu_functions *ops);
|
||||
|
||||
extern ssize_t
|
||||
omap_iommu_dump_ctx(struct omap_iommu *obj, char *buf, ssize_t len);
|
||||
extern size_t
|
||||
omap_dump_tlb_entries(struct omap_iommu *obj, char *buf, ssize_t len);
|
||||
|
||||
#endif /* __MACH_IOMMU_H */
|
||||
/*
|
||||
* register accessors
|
||||
*/
|
||||
static inline u32 iommu_read_reg(struct omap_iommu *obj, size_t offs)
|
||||
{
|
||||
return __raw_readl(obj->regbase + offs);
|
||||
}
|
||||
|
||||
static inline void iommu_write_reg(struct omap_iommu *obj, u32 val, size_t offs)
|
||||
{
|
||||
__raw_writel(val, obj->regbase + offs);
|
||||
}
|
|
@ -13,12 +13,15 @@
|
|||
|
||||
#include <linux/err.h>
|
||||
#include <linux/device.h>
|
||||
#include <linux/io.h>
|
||||
#include <linux/jiffies.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/omap-iommu.h>
|
||||
#include <linux/slab.h>
|
||||
#include <linux/stringify.h>
|
||||
#include <linux/platform_data/iommu-omap.h>
|
||||
|
||||
#include <plat/iommu.h>
|
||||
#include "omap-iommu.h"
|
||||
|
||||
/*
|
||||
* omap2 architecture specific register bit definitions
|
||||
|
@ -65,6 +68,12 @@
|
|||
((pgsz) == MMU_CAM_PGSZ_64K) ? 0xffff0000 : \
|
||||
((pgsz) == MMU_CAM_PGSZ_4K) ? 0xfffff000 : 0)
|
||||
|
||||
/* IOMMU errors */
|
||||
#define OMAP_IOMMU_ERR_TLB_MISS (1 << 0)
|
||||
#define OMAP_IOMMU_ERR_TRANS_FAULT (1 << 1)
|
||||
#define OMAP_IOMMU_ERR_EMU_MISS (1 << 2)
|
||||
#define OMAP_IOMMU_ERR_TBLWALK_FAULT (1 << 3)
|
||||
#define OMAP_IOMMU_ERR_MULTIHIT_FAULT (1 << 4)
|
||||
|
||||
static void __iommu_set_twl(struct omap_iommu *obj, bool on)
|
||||
{
|
|
@ -10,9 +10,6 @@
|
|||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
#ifndef __PLAT_OMAP_IOMMU_H
|
||||
#define __PLAT_OMAP_IOMMU_H
|
||||
|
||||
/*
|
||||
* "L2 table" address mask and size definitions.
|
||||
*/
|
||||
|
@ -97,24 +94,5 @@ static inline phys_addr_t omap_iommu_translate(u32 d, u32 va, u32 mask)
|
|||
#define iopte_index(da) (((da) >> IOPTE_SHIFT) & (PTRS_PER_IOPTE - 1))
|
||||
#define iopte_offset(iopgd, da) (iopgd_page_vaddr(iopgd) + iopte_index(da))
|
||||
|
||||
static inline u32 iotlb_init_entry(struct iotlb_entry *e, u32 da, u32 pa,
|
||||
u32 flags)
|
||||
{
|
||||
memset(e, 0, sizeof(*e));
|
||||
|
||||
e->da = da;
|
||||
e->pa = pa;
|
||||
e->valid = 1;
|
||||
/* FIXME: add OMAP1 support */
|
||||
e->pgsz = flags & MMU_CAM_PGSZ_MASK;
|
||||
e->endian = flags & MMU_RAM_ENDIAN_MASK;
|
||||
e->elsz = flags & MMU_RAM_ELSZ_MASK;
|
||||
e->mixed = flags & MMU_RAM_MIXED_MASK;
|
||||
|
||||
return iopgsz_to_bytes(e->pgsz);
|
||||
}
|
||||
|
||||
#define to_iommu(dev) \
|
||||
(struct omap_iommu *)platform_get_drvdata(to_platform_device(dev))
|
||||
|
||||
#endif /* __PLAT_OMAP_IOMMU_H */
|
|
@ -17,14 +17,58 @@
|
|||
#include <linux/device.h>
|
||||
#include <linux/scatterlist.h>
|
||||
#include <linux/iommu.h>
|
||||
#include <linux/omap-iommu.h>
|
||||
#include <linux/platform_data/iommu-omap.h>
|
||||
|
||||
#include <asm/cacheflush.h>
|
||||
#include <asm/mach/map.h>
|
||||
|
||||
#include <plat/iommu.h>
|
||||
#include <plat/iovmm.h>
|
||||
#include "omap-iopgtable.h"
|
||||
#include "omap-iommu.h"
|
||||
|
||||
#include <plat/iopgtable.h>
|
||||
/*
|
||||
* IOVMF_FLAGS: attribute for iommu virtual memory area(iovma)
|
||||
*
|
||||
* lower 16 bit is used for h/w and upper 16 bit is for s/w.
|
||||
*/
|
||||
#define IOVMF_SW_SHIFT 16
|
||||
|
||||
/*
|
||||
* iovma: h/w flags derived from cam and ram attribute
|
||||
*/
|
||||
#define IOVMF_CAM_MASK (~((1 << 10) - 1))
|
||||
#define IOVMF_RAM_MASK (~IOVMF_CAM_MASK)
|
||||
|
||||
#define IOVMF_PGSZ_MASK (3 << 0)
|
||||
#define IOVMF_PGSZ_1M MMU_CAM_PGSZ_1M
|
||||
#define IOVMF_PGSZ_64K MMU_CAM_PGSZ_64K
|
||||
#define IOVMF_PGSZ_4K MMU_CAM_PGSZ_4K
|
||||
#define IOVMF_PGSZ_16M MMU_CAM_PGSZ_16M
|
||||
|
||||
#define IOVMF_ENDIAN_MASK (1 << 9)
|
||||
#define IOVMF_ENDIAN_BIG MMU_RAM_ENDIAN_BIG
|
||||
|
||||
#define IOVMF_ELSZ_MASK (3 << 7)
|
||||
#define IOVMF_ELSZ_16 MMU_RAM_ELSZ_16
|
||||
#define IOVMF_ELSZ_32 MMU_RAM_ELSZ_32
|
||||
#define IOVMF_ELSZ_NONE MMU_RAM_ELSZ_NONE
|
||||
|
||||
#define IOVMF_MIXED_MASK (1 << 6)
|
||||
#define IOVMF_MIXED MMU_RAM_MIXED
|
||||
|
||||
/*
|
||||
* iovma: s/w flags, used for mapping and umapping internally.
|
||||
*/
|
||||
#define IOVMF_MMIO (1 << IOVMF_SW_SHIFT)
|
||||
#define IOVMF_ALLOC (2 << IOVMF_SW_SHIFT)
|
||||
#define IOVMF_ALLOC_MASK (3 << IOVMF_SW_SHIFT)
|
||||
|
||||
/* "superpages" is supported just with physically linear pages */
|
||||
#define IOVMF_DISCONT (1 << (2 + IOVMF_SW_SHIFT))
|
||||
#define IOVMF_LINEAR (2 << (2 + IOVMF_SW_SHIFT))
|
||||
#define IOVMF_LINEAR_MASK (3 << (2 + IOVMF_SW_SHIFT))
|
||||
|
||||
#define IOVMF_DA_FIXED (1 << (4 + IOVMF_SW_SHIFT))
|
||||
|
||||
static struct kmem_cache *iovm_area_cachep;
|
||||
|
||||
|
|
|
@ -61,6 +61,7 @@
|
|||
#include <linux/i2c.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/omap-iommu.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/regulator/consumer.h>
|
||||
#include <linux/slab.h>
|
||||
|
|
|
@ -31,11 +31,9 @@
|
|||
#include <media/v4l2-device.h>
|
||||
#include <linux/device.h>
|
||||
#include <linux/io.h>
|
||||
#include <linux/iommu.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/wait.h>
|
||||
#include <linux/iommu.h>
|
||||
#include <plat/iommu.h>
|
||||
#include <plat/iovmm.h>
|
||||
|
||||
#include "ispstat.h"
|
||||
#include "ispccdc.h"
|
||||
|
|
|
@ -30,6 +30,7 @@
|
|||
#include <linux/device.h>
|
||||
#include <linux/dma-mapping.h>
|
||||
#include <linux/mm.h>
|
||||
#include <linux/omap-iommu.h>
|
||||
#include <linux/sched.h>
|
||||
#include <linux/slab.h>
|
||||
#include <media/v4l2-event.h>
|
||||
|
|
|
@ -26,6 +26,7 @@
|
|||
*/
|
||||
|
||||
#include <linux/dma-mapping.h>
|
||||
#include <linux/omap-iommu.h>
|
||||
#include <linux/slab.h>
|
||||
#include <linux/uaccess.h>
|
||||
|
||||
|
|
|
@ -27,6 +27,7 @@
|
|||
#include <linux/clk.h>
|
||||
#include <linux/mm.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/omap-iommu.h>
|
||||
#include <linux/pagemap.h>
|
||||
#include <linux/scatterlist.h>
|
||||
#include <linux/sched.h>
|
||||
|
@ -36,6 +37,7 @@
|
|||
#include <media/v4l2-ioctl.h>
|
||||
#include <plat/iommu.h>
|
||||
#include <plat/iovmm.h>
|
||||
#include <plat/omap-pm.h>
|
||||
|
||||
#include "ispvideo.h"
|
||||
#include "isp.h"
|
||||
|
|
|
@ -0,0 +1,52 @@
|
|||
/*
|
||||
* omap iommu: simple virtual address space management
|
||||
*
|
||||
* Copyright (C) 2008-2009 Nokia Corporation
|
||||
*
|
||||
* Written by Hiroshi DOYU <Hiroshi.DOYU@nokia.com>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
#ifndef _INTEL_IOMMU_H_
|
||||
#define _INTEL_IOMMU_H_
|
||||
|
||||
struct iovm_struct {
|
||||
struct omap_iommu *iommu; /* iommu object which this belongs to */
|
||||
u32 da_start; /* area definition */
|
||||
u32 da_end;
|
||||
u32 flags; /* IOVMF_: see below */
|
||||
struct list_head list; /* linked in ascending order */
|
||||
const struct sg_table *sgt; /* keep 'page' <-> 'da' mapping */
|
||||
void *va; /* mpu side mapped address */
|
||||
};
|
||||
|
||||
#define MMU_RAM_ENDIAN_SHIFT 9
|
||||
#define MMU_RAM_ENDIAN_LITTLE (0 << MMU_RAM_ENDIAN_SHIFT)
|
||||
#define MMU_RAM_ELSZ_8 (0 << MMU_RAM_ELSZ_SHIFT)
|
||||
#define IOVMF_ENDIAN_LITTLE MMU_RAM_ENDIAN_LITTLE
|
||||
#define MMU_RAM_ELSZ_SHIFT 7
|
||||
#define IOVMF_ELSZ_8 MMU_RAM_ELSZ_8
|
||||
|
||||
struct iommu_domain;
|
||||
|
||||
extern struct iovm_struct *omap_find_iovm_area(struct device *dev, u32 da);
|
||||
extern u32
|
||||
omap_iommu_vmap(struct iommu_domain *domain, struct device *dev, u32 da,
|
||||
const struct sg_table *sgt, u32 flags);
|
||||
extern struct sg_table *omap_iommu_vunmap(struct iommu_domain *domain,
|
||||
struct device *dev, u32 da);
|
||||
extern u32
|
||||
omap_iommu_vmalloc(struct iommu_domain *domain, struct device *dev,
|
||||
u32 da, size_t bytes, u32 flags);
|
||||
extern void
|
||||
omap_iommu_vfree(struct iommu_domain *domain, struct device *dev,
|
||||
const u32 da);
|
||||
extern void *omap_da_to_va(struct device *dev, u32 da);
|
||||
|
||||
extern void omap_iommu_save_ctx(struct device *dev);
|
||||
extern void omap_iommu_restore_ctx(struct device *dev);
|
||||
|
||||
#endif
|
|
@ -0,0 +1,49 @@
|
|||
/*
|
||||
* omap iommu: main structures
|
||||
*
|
||||
* Copyright (C) 2008-2009 Nokia Corporation
|
||||
*
|
||||
* Written by Hiroshi DOYU <Hiroshi.DOYU@nokia.com>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
#define MMU_REG_SIZE 256
|
||||
|
||||
/**
|
||||
* struct iommu_arch_data - omap iommu private data
|
||||
* @name: name of the iommu device
|
||||
* @iommu_dev: handle of the iommu device
|
||||
*
|
||||
* This is an omap iommu private data object, which binds an iommu user
|
||||
* to its iommu device. This object should be placed at the iommu user's
|
||||
* dev_archdata so generic IOMMU API can be used without having to
|
||||
* utilize omap-specific plumbing anymore.
|
||||
*/
|
||||
struct omap_iommu_arch_data {
|
||||
const char *name;
|
||||
struct omap_iommu *iommu_dev;
|
||||
};
|
||||
|
||||
/**
|
||||
* struct omap_mmu_dev_attr - OMAP mmu device attributes for omap_hwmod
|
||||
* @da_start: device address where the va space starts.
|
||||
* @da_end: device address where the va space ends.
|
||||
* @nr_tlb_entries: number of entries supported by the translation
|
||||
* look-aside buffer (TLB).
|
||||
*/
|
||||
struct omap_mmu_dev_attr {
|
||||
u32 da_start;
|
||||
u32 da_end;
|
||||
int nr_tlb_entries;
|
||||
};
|
||||
|
||||
struct iommu_platform_data {
|
||||
const char *name;
|
||||
const char *clk_name;
|
||||
const int nr_tlb_entries;
|
||||
u32 da_start;
|
||||
u32 da_end;
|
||||
};
|
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