dmaengine: dw-edma: Add device_prep_interleave_dma() support
Add device_prep_interleave_dma() support to Synopsys DMA driver. This feature implements a similar data transfer mechanism to the scatter-gather implementation. Signed-off-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com> Link: https://lore.kernel.org/r/73dc36264910654e266ae25814d892a0476e4427.1613674948.git.gustavo.pimentel@synopsys.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
This commit is contained in:
Gustavo Pimentel
Vinod Koul
Родитель
1aef6ffe99
Коммит
85e7518f42
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@ -329,7 +329,7 @@ dw_edma_device_transfer(struct dw_edma_transfer *xfer)
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struct dw_edma_chunk *chunk;
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struct dw_edma_burst *burst;
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struct dw_edma_desc *desc;
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u32 cnt;
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u32 cnt = 0;
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int i;
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if (!chan->configured)
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@ -352,12 +352,19 @@ dw_edma_device_transfer(struct dw_edma_transfer *xfer)
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return NULL;
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}
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if (xfer->cyclic) {
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if (xfer->type == EDMA_XFER_CYCLIC) {
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if (!xfer->xfer.cyclic.len || !xfer->xfer.cyclic.cnt)
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return NULL;
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} else {
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} else if (xfer->type == EDMA_XFER_SCATTER_GATHER) {
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if (xfer->xfer.sg.len < 1)
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return NULL;
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} else if (xfer->type == EDMA_XFER_INTERLEAVED) {
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if (!xfer->xfer.il->numf)
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return NULL;
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if (xfer->xfer.il->numf > 0 && xfer->xfer.il->frame_size > 0)
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return NULL;
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} else {
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return NULL;
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}
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desc = dw_edma_alloc_desc(chan);
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@ -368,18 +375,28 @@ dw_edma_device_transfer(struct dw_edma_transfer *xfer)
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if (unlikely(!chunk))
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goto err_alloc;
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src_addr = chan->config.src_addr;
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dst_addr = chan->config.dst_addr;
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if (xfer->cyclic) {
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cnt = xfer->xfer.cyclic.cnt;
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if (xfer->type == EDMA_XFER_INTERLEAVED) {
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src_addr = xfer->xfer.il->src_start;
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dst_addr = xfer->xfer.il->dst_start;
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} else {
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src_addr = chan->config.src_addr;
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dst_addr = chan->config.dst_addr;
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}
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if (xfer->type == EDMA_XFER_CYCLIC) {
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cnt = xfer->xfer.cyclic.cnt;
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} else if (xfer->type == EDMA_XFER_SCATTER_GATHER) {
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cnt = xfer->xfer.sg.len;
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sg = xfer->xfer.sg.sgl;
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} else if (xfer->type == EDMA_XFER_INTERLEAVED) {
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if (xfer->xfer.il->numf > 0)
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cnt = xfer->xfer.il->numf;
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else
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cnt = xfer->xfer.il->frame_size;
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}
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for (i = 0; i < cnt; i++) {
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if (!xfer->cyclic && !sg)
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if (xfer->type == EDMA_XFER_SCATTER_GATHER && !sg)
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break;
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if (chunk->bursts_alloc == chan->ll_max) {
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@ -392,19 +409,21 @@ dw_edma_device_transfer(struct dw_edma_transfer *xfer)
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if (unlikely(!burst))
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goto err_alloc;
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if (xfer->cyclic)
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if (xfer->type == EDMA_XFER_CYCLIC)
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burst->sz = xfer->xfer.cyclic.len;
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else
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else if (xfer->type == EDMA_XFER_SCATTER_GATHER)
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burst->sz = sg_dma_len(sg);
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else if (xfer->type == EDMA_XFER_INTERLEAVED)
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burst->sz = xfer->xfer.il->sgl[i].size;
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chunk->ll_region.sz += burst->sz;
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desc->alloc_sz += burst->sz;
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if (chan->dir == EDMA_DIR_WRITE) {
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burst->sar = src_addr;
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if (xfer->cyclic) {
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if (xfer->type == EDMA_XFER_CYCLIC) {
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burst->dar = xfer->xfer.cyclic.paddr;
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} else {
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} else if (xfer->type == EDMA_XFER_SCATTER_GATHER) {
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burst->dar = dst_addr;
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/* Unlike the typical assumption by other
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* drivers/IPs the peripheral memory isn't
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@ -416,9 +435,9 @@ dw_edma_device_transfer(struct dw_edma_transfer *xfer)
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}
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} else {
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burst->dar = dst_addr;
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if (xfer->cyclic) {
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if (xfer->type == EDMA_XFER_CYCLIC) {
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burst->sar = xfer->xfer.cyclic.paddr;
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} else {
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} else if (xfer->type == EDMA_XFER_SCATTER_GATHER) {
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burst->sar = src_addr;
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/* Unlike the typical assumption by other
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* drivers/IPs the peripheral memory isn't
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@ -430,10 +449,24 @@ dw_edma_device_transfer(struct dw_edma_transfer *xfer)
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}
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}
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if (!xfer->cyclic) {
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if (xfer->type == EDMA_XFER_SCATTER_GATHER) {
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src_addr += sg_dma_len(sg);
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dst_addr += sg_dma_len(sg);
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sg = sg_next(sg);
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} else if (xfer->type == EDMA_XFER_INTERLEAVED &&
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xfer->xfer.il->frame_size > 0) {
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struct dma_interleaved_template *il = xfer->xfer.il;
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struct data_chunk *dc = &il->sgl[i];
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if (il->src_sgl) {
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src_addr += burst->sz;
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src_addr += dmaengine_get_src_icg(il, dc);
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}
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if (il->dst_sgl) {
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dst_addr += burst->sz;
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dst_addr += dmaengine_get_dst_icg(il, dc);
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}
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}
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}
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@ -459,7 +492,7 @@ dw_edma_device_prep_slave_sg(struct dma_chan *dchan, struct scatterlist *sgl,
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xfer.xfer.sg.sgl = sgl;
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xfer.xfer.sg.len = len;
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xfer.flags = flags;
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xfer.cyclic = false;
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xfer.type = EDMA_XFER_SCATTER_GATHER;
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return dw_edma_device_transfer(&xfer);
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}
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@ -478,7 +511,23 @@ dw_edma_device_prep_dma_cyclic(struct dma_chan *dchan, dma_addr_t paddr,
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xfer.xfer.cyclic.len = len;
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xfer.xfer.cyclic.cnt = count;
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xfer.flags = flags;
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xfer.cyclic = true;
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xfer.type = EDMA_XFER_CYCLIC;
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return dw_edma_device_transfer(&xfer);
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}
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static struct dma_async_tx_descriptor *
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dw_edma_device_prep_interleaved_dma(struct dma_chan *dchan,
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struct dma_interleaved_template *ilt,
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unsigned long flags)
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{
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struct dw_edma_transfer xfer;
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xfer.dchan = dchan;
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xfer.direction = ilt->dir;
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xfer.xfer.il = ilt;
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xfer.flags = flags;
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xfer.type = EDMA_XFER_INTERLEAVED;
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return dw_edma_device_transfer(&xfer);
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}
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@ -738,6 +787,7 @@ static int dw_edma_channel_setup(struct dw_edma_chip *chip, bool write,
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dma_cap_set(DMA_SLAVE, dma->cap_mask);
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dma_cap_set(DMA_CYCLIC, dma->cap_mask);
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dma_cap_set(DMA_PRIVATE, dma->cap_mask);
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dma_cap_set(DMA_INTERLEAVE, dma->cap_mask);
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dma->directions = BIT(write ? DMA_DEV_TO_MEM : DMA_MEM_TO_DEV);
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dma->src_addr_widths = BIT(DMA_SLAVE_BUSWIDTH_4_BYTES);
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dma->dst_addr_widths = BIT(DMA_SLAVE_BUSWIDTH_4_BYTES);
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@ -756,6 +806,7 @@ static int dw_edma_channel_setup(struct dw_edma_chip *chip, bool write,
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dma->device_tx_status = dw_edma_device_tx_status;
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dma->device_prep_slave_sg = dw_edma_device_prep_slave_sg;
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dma->device_prep_dma_cyclic = dw_edma_device_prep_dma_cyclic;
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dma->device_prep_interleaved_dma = dw_edma_device_prep_interleaved_dma;
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dma_set_max_seg_size(dma->dev, U32_MAX);
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@ -39,6 +39,12 @@ enum dw_edma_status {
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EDMA_ST_BUSY
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};
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enum dw_edma_xfer_type {
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EDMA_XFER_SCATTER_GATHER = 0,
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EDMA_XFER_CYCLIC,
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EDMA_XFER_INTERLEAVED
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};
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struct dw_edma_chan;
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struct dw_edma_chunk;
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@ -146,12 +152,13 @@ struct dw_edma_cyclic {
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struct dw_edma_transfer {
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struct dma_chan *dchan;
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union dw_edma_xfer {
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struct dw_edma_sg sg;
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struct dw_edma_cyclic cyclic;
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struct dw_edma_sg sg;
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struct dw_edma_cyclic cyclic;
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struct dma_interleaved_template *il;
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} xfer;
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enum dma_transfer_direction direction;
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unsigned long flags;
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bool cyclic;
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enum dw_edma_xfer_type type;
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};
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static inline
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