[ARM] 3823/1: iop3xx: switch iop32x/iop33x over to shared time code
Switch the iop32x and iop33x code over to the common time implementation, and remove the (nearly identical) iop32x and iop33x time implementations. Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit is contained in:
Lennert Buytenhek
Russell King
Родитель
48388b2a56
Коммит
863753a81e
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@ -2,7 +2,7 @@
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# Makefile for the linux kernel.
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#
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obj-y := common.o setup.o irq.o time.o
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obj-y := common.o setup.o irq.o
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obj-m :=
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obj-n :=
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obj- :=
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@ -29,6 +29,7 @@
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#include <asm/hardware.h>
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#include <asm/mach-types.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/time.h>
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#include <asm/hardware/iop3xx.h>
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#define IOP321_UART_XTAL 1843200
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@ -67,16 +68,22 @@ void __init iop32x_init(void)
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#ifdef CONFIG_ARCH_IQ80321
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extern void iq80321_map_io(void);
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extern struct sys_timer iop321_timer;
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extern void iop321_init_time(void);
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#endif
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#ifdef CONFIG_ARCH_IQ31244
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extern void iq31244_map_io(void);
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extern struct sys_timer iop321_timer;
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extern void iop321_init_time(void);
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#endif
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static void __init iop3xx_timer_init(void)
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{
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iop3xx_init_time(IOP321_TICK_RATE);
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}
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struct sys_timer iop321_timer = {
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.init = iop3xx_timer_init,
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.offset = iop3xx_gettimeoffset,
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};
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#if defined(CONFIG_ARCH_IQ80321)
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MACHINE_START(IQ80321, "Intel IQ80321")
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/* Maintainer: Intel Corporation */
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@ -1,108 +0,0 @@
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/*
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* arch/arm/mach-iop32x/time.c
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*
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* Timer code for IOP321 based systems
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*
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* Author: Deepak Saxena <dsaxena@mvista.com>
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*
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* Copyright 2002-2003 MontaVista Software Inc.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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#include <linux/kernel.h>
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#include <linux/interrupt.h>
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#include <linux/time.h>
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#include <linux/init.h>
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#include <linux/timex.h>
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#include <asm/hardware.h>
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#include <asm/io.h>
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#include <asm/irq.h>
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#include <asm/uaccess.h>
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#include <asm/mach/irq.h>
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#include <asm/mach/time.h>
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#define IOP321_TIME_SYNC 0
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static inline unsigned long get_elapsed(void)
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{
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return LATCH - *IOP321_TU_TCR0;
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}
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static unsigned long iop321_gettimeoffset(void)
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{
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unsigned long elapsed, usec;
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u32 tisr1, tisr2;
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/*
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* If an interrupt was pending before we read the timer,
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* we've already wrapped. Factor this into the time.
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* If an interrupt was pending after we read the timer,
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* it may have wrapped between checking the interrupt
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* status and reading the timer. Re-read the timer to
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* be sure its value is after the wrap.
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*/
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asm volatile("mrc p6, 0, %0, c6, c1, 0" : "=r" (tisr1));
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elapsed = get_elapsed();
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asm volatile("mrc p6, 0, %0, c6, c1, 0" : "=r" (tisr2));
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if(tisr1 & 1)
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elapsed += LATCH;
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else if (tisr2 & 1)
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elapsed = LATCH + get_elapsed();
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/*
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* Now convert them to usec.
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*/
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usec = (unsigned long)(elapsed / (CLOCK_TICK_RATE/1000000));
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return usec;
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}
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static irqreturn_t
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iop321_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
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{
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u32 tisr;
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write_seqlock(&xtime_lock);
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asm volatile("mrc p6, 0, %0, c6, c1, 0" : "=r" (tisr));
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tisr |= 1;
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asm volatile("mcr p6, 0, %0, c6, c1, 0" : : "r" (tisr));
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timer_tick(regs);
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write_sequnlock(&xtime_lock);
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return IRQ_HANDLED;
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}
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static struct irqaction iop321_timer_irq = {
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.name = "IOP321 Timer Tick",
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.handler = iop321_timer_interrupt,
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.flags = IRQF_DISABLED | IRQF_TIMER,
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};
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static void __init iop321_timer_init(void)
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{
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u32 timer_ctl;
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setup_irq(IRQ_IOP321_TIMER0, &iop321_timer_irq);
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timer_ctl = IOP321_TMR_EN | IOP321_TMR_PRIVILEGED | IOP321_TMR_RELOAD |
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IOP321_TMR_RATIO_1_1;
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asm volatile("mcr p6, 0, %0, c4, c1, 0" : : "r" (LATCH));
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asm volatile("mcr p6, 0, %0, c0, c1, 0" : : "r" (timer_ctl));
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}
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struct sys_timer iop321_timer = {
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.init = &iop321_timer_init,
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.offset = iop321_gettimeoffset,
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};
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@ -2,7 +2,7 @@
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# Makefile for the linux kernel.
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#
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obj-y := setup.o irq.o time.o
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obj-y := setup.o irq.o
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obj-m :=
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obj-n :=
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obj- :=
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@ -28,6 +28,7 @@
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#include <asm/hardware.h>
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#include <asm/mach-types.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/time.h>
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#include <asm/hardware/iop3xx.h>
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#define IOP331_UART_XTAL 33334000
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@ -118,9 +119,18 @@ void __init iop33x_init(void)
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#ifdef CONFIG_ARCH_IOP33X
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extern void iop331_init_irq(void);
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extern struct sys_timer iop331_timer;
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#endif
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static void __init iop3xx_timer_init(void)
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{
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iop3xx_init_time(IOP331_TICK_RATE);
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}
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struct sys_timer iop331_timer = {
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.init = iop3xx_timer_init,
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.offset = iop3xx_gettimeoffset,
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};
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#if defined(CONFIG_ARCH_IQ80331)
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MACHINE_START(IQ80331, "Intel IQ80331")
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/* Maintainer: Intel Corp. */
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@ -1,106 +0,0 @@
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/*
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* arch/arm/mach-iop33x/time.c
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*
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* Timer code for IOP331 based systems
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*
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* Author: Dave Jiang <dave.jiang@intel.com>
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*
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* Copyright 2003 Intel Corp.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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#include <linux/kernel.h>
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#include <linux/interrupt.h>
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#include <linux/time.h>
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#include <linux/init.h>
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#include <linux/timex.h>
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#include <asm/hardware.h>
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#include <asm/io.h>
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#include <asm/irq.h>
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#include <asm/uaccess.h>
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#include <asm/mach/irq.h>
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#include <asm/mach/time.h>
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static inline unsigned long get_elapsed(void)
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{
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return LATCH - *IOP331_TU_TCR0;
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}
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static unsigned long iop331_gettimeoffset(void)
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{
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unsigned long elapsed, usec;
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u32 tisr1, tisr2;
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/*
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* If an interrupt was pending before we read the timer,
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* we've already wrapped. Factor this into the time.
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* If an interrupt was pending after we read the timer,
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* it may have wrapped between checking the interrupt
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* status and reading the timer. Re-read the timer to
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* be sure its value is after the wrap.
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*/
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asm volatile("mrc p6, 0, %0, c6, c1, 0" : "=r" (tisr1));
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elapsed = get_elapsed();
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asm volatile("mrc p6, 0, %0, c6, c1, 0" : "=r" (tisr2));
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if(tisr1 & 1)
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elapsed += LATCH;
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else if (tisr2 & 1)
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elapsed = LATCH + get_elapsed();
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/*
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* Now convert them to usec.
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*/
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usec = (unsigned long)(elapsed / (CLOCK_TICK_RATE/1000000));
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return usec;
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}
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static irqreturn_t
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iop331_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
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{
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u32 tisr;
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write_seqlock(&xtime_lock);
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asm volatile("mrc p6, 0, %0, c6, c1, 0" : "=r" (tisr));
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tisr |= 1;
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asm volatile("mcr p6, 0, %0, c6, c1, 0" : : "r" (tisr));
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timer_tick(regs);
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write_sequnlock(&xtime_lock);
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return IRQ_HANDLED;
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}
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static struct irqaction iop331_timer_irq = {
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.name = "IOP331 Timer Tick",
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.handler = iop331_timer_interrupt,
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.flags = IRQF_DISABLED | IRQF_TIMER,
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};
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static void __init iop331_timer_init(void)
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{
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u32 timer_ctl;
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setup_irq(IRQ_IOP331_TIMER0, &iop331_timer_irq);
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timer_ctl = IOP331_TMR_EN | IOP331_TMR_PRIVILEGED | IOP331_TMR_RELOAD |
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IOP331_TMR_RATIO_1_1;
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asm volatile("mcr p6, 0, %0, c4, c1, 0" : : "r" (LATCH));
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asm volatile("mcr p6, 0, %0, c0, c1, 0" : : "r" (timer_ctl));
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}
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struct sys_timer iop331_timer = {
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.init = iop331_timer_init,
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.offset = iop331_gettimeoffset,
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};
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@ -151,10 +151,6 @@
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#define IOP321_FINTSRC (volatile u32 *)IOP321_REG_ADDR(0x000007DC)
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/* Timers */
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#define IOP321_TU_TMR0 (volatile u32 *)IOP321_REG_ADDR(0x000007E0)
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#define IOP321_TU_TMR1 (volatile u32 *)IOP321_REG_ADDR(0x000007E4)
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#ifdef CONFIG_ARCH_IQ80321
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#define IOP321_TICK_RATE 200000000 /* 200 MHz clock */
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#elif defined(CONFIG_ARCH_IQ31244)
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@ -166,23 +162,6 @@
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#define IOP321_TICK_RATE 200000000 /* 33.333333 Mhz crystal */
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#endif
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#define IOP321_TMR_TC 0x01
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#define IOP321_TMR_EN 0x02
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#define IOP321_TMR_RELOAD 0x04
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#define IOP321_TMR_PRIVILEGED 0x09
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#define IOP321_TMR_RATIO_1_1 0x00
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#define IOP321_TMR_RATIO_4_1 0x10
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#define IOP321_TMR_RATIO_8_1 0x20
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#define IOP321_TMR_RATIO_16_1 0x30
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#define IOP321_TU_TCR0 (volatile u32 *)IOP321_REG_ADDR(0x000007E8)
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#define IOP321_TU_TCR1 (volatile u32 *)IOP321_REG_ADDR(0x000007EC)
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#define IOP321_TU_TRR0 (volatile u32 *)IOP321_REG_ADDR(0x000007F0)
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#define IOP321_TU_TRR1 (volatile u32 *)IOP321_REG_ADDR(0x000007F4)
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#define IOP321_TU_TISR (volatile u32 *)IOP321_REG_ADDR(0x000007F8)
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#define IOP321_TU_WDTCR (volatile u32 *)IOP321_REG_ADDR(0x000007FC)
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/* Application accelerator unit 0x00000800 - 0x000008FF */
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#define IOP321_AAU_ACR (volatile u32 *)IOP321_REG_ADDR(0x00000800)
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#define IOP321_AAU_ASR (volatile u32 *)IOP321_REG_ADDR(0x00000804)
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@ -5,4 +5,4 @@
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*/
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#include <asm/hardware.h>
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#define CLOCK_TICK_RATE IOP321_TICK_RATE
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#define CLOCK_TICK_RATE (100 * HZ)
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@ -137,27 +137,6 @@
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/* Timers */
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#define IOP331_TU_TMR0 (volatile u32 *)IOP331_REG_ADDR(0x000007D0)
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#define IOP331_TU_TMR1 (volatile u32 *)IOP331_REG_ADDR(0x000007D4)
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#define IOP331_TMR_TC 0x01
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#define IOP331_TMR_EN 0x02
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#define IOP331_TMR_RELOAD 0x04
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#define IOP331_TMR_PRIVILEGED 0x09
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#define IOP331_TMR_RATIO_1_1 0x00
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#define IOP331_TMR_RATIO_4_1 0x10
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#define IOP331_TMR_RATIO_8_1 0x20
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#define IOP331_TMR_RATIO_16_1 0x30
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#define IOP331_TU_TCR0 (volatile u32 *)IOP331_REG_ADDR(0x000007D8)
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#define IOP331_TU_TCR1 (volatile u32 *)IOP331_REG_ADDR(0x000007DC)
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#define IOP331_TU_TRR0 (volatile u32 *)IOP331_REG_ADDR(0x000007E0)
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#define IOP331_TU_TRR1 (volatile u32 *)IOP331_REG_ADDR(0x000007E4)
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#define IOP331_TU_TISR (volatile u32 *)IOP331_REG_ADDR(0x000007E8)
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#define IOP331_TU_WDTCR (volatile u32 *)IOP331_REG_ADDR(0x000007EC)
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#if defined(CONFIG_ARCH_IOP33X)
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#define IOP331_TICK_RATE 266000000 /* 266 MHz IB clock */
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#endif
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@ -5,4 +5,4 @@
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*/
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#include <asm/hardware.h>
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#define CLOCK_TICK_RATE IOP331_TICK_RATE
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#define CLOCK_TICK_RATE (100 * HZ)
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