Merge branch 'nvme-5.5' of git://git.infradead.org/nvme into for-5.5/drivers-post
Pull NVMe changes from Keith: "- The only new feature is the optional hwmon support for nvme (Guenter and Akinobu) - A universal work-around for controllers reading discard payloads beyond the range boundary (Eduard) - Chaitanya graciously agreed to share the target driver maintenance" * 'nvme-5.5' of git://git.infradead.org/nvme: nvme: hwmon: add quirk to avoid changing temperature threshold nvme: hwmon: provide temperature min and max values for each sensor nvmet: add another maintainer nvme: Discard workaround for non-conformant devices nvme: Add hardware monitoring support
This commit is contained in:
Jens Axboe
Коммит
866ca95da5
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@ -11633,6 +11633,7 @@ F: drivers/nvme/target/fcloop.c
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NVM EXPRESS TARGET DRIVER
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M: Christoph Hellwig <hch@lst.de>
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M: Sagi Grimberg <sagi@grimberg.me>
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M: Chaitanya Kulkarni <chaitanya.kulkarni@wdc.com>
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L: linux-nvme@lists.infradead.org
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T: git://git.infradead.org/nvme.git
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W: http://git.infradead.org/nvme.git
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@ -23,6 +23,16 @@ config NVME_MULTIPATH
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/dev/nvmeXnY device will show up for each NVMe namespaces,
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even if it is accessible through multiple controllers.
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config NVME_HWMON
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bool "NVMe hardware monitoring"
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depends on (NVME_CORE=y && HWMON=y) || (NVME_CORE=m && HWMON)
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help
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This provides support for NVMe hardware monitoring. If enabled,
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a hardware monitoring device will be created for each NVMe drive
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in the system.
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If unsure, say N.
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config NVME_FABRICS
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tristate
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@ -14,6 +14,7 @@ nvme-core-$(CONFIG_TRACING) += trace.o
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nvme-core-$(CONFIG_NVME_MULTIPATH) += multipath.o
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nvme-core-$(CONFIG_NVM) += lightnvm.o
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nvme-core-$(CONFIG_FAULT_INJECTION_DEBUG_FS) += fault_inject.o
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nvme-core-$(CONFIG_NVME_HWMON) += hwmon.o
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nvme-y += pci.o
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@ -574,8 +574,14 @@ static blk_status_t nvme_setup_discard(struct nvme_ns *ns, struct request *req,
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struct nvme_dsm_range *range;
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struct bio *bio;
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range = kmalloc_array(segments, sizeof(*range),
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GFP_ATOMIC | __GFP_NOWARN);
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/*
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* Some devices do not consider the DSM 'Number of Ranges' field when
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* determining how much data to DMA. Always allocate memory for maximum
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* number of segments to prevent device reading beyond end of buffer.
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*/
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static const size_t alloc_size = sizeof(*range) * NVME_DSM_MAX_RANGES;
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range = kzalloc(alloc_size, GFP_ATOMIC | __GFP_NOWARN);
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if (!range) {
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/*
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* If we fail allocation our range, fallback to the controller
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@ -615,7 +621,7 @@ static blk_status_t nvme_setup_discard(struct nvme_ns *ns, struct request *req,
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req->special_vec.bv_page = virt_to_page(range);
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req->special_vec.bv_offset = offset_in_page(range);
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req->special_vec.bv_len = sizeof(*range) * segments;
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req->special_vec.bv_len = alloc_size;
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req->rq_flags |= RQF_SPECIAL_PAYLOAD;
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return BLK_STS_OK;
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@ -2760,6 +2766,9 @@ int nvme_init_identify(struct nvme_ctrl *ctrl)
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ctrl->oncs = le16_to_cpu(id->oncs);
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ctrl->mtfa = le16_to_cpu(id->mtfa);
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ctrl->oaes = le32_to_cpu(id->oaes);
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ctrl->wctemp = le16_to_cpu(id->wctemp);
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ctrl->cctemp = le16_to_cpu(id->cctemp);
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atomic_set(&ctrl->abort_limit, id->acl + 1);
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ctrl->vwc = id->vwc;
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if (id->mdts)
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@ -2859,6 +2868,9 @@ int nvme_init_identify(struct nvme_ctrl *ctrl)
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if (ret < 0)
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return ret;
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if (!ctrl->identified)
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nvme_hwmon_init(ctrl);
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ctrl->identified = true;
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return 0;
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@ -0,0 +1,259 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* NVM Express hardware monitoring support
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* Copyright (c) 2019, Guenter Roeck
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*/
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#include <linux/hwmon.h>
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#include <asm/unaligned.h>
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#include "nvme.h"
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/* These macros should be moved to linux/temperature.h */
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#define MILLICELSIUS_TO_KELVIN(t) DIV_ROUND_CLOSEST((t) + 273150, 1000)
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#define KELVIN_TO_MILLICELSIUS(t) ((t) * 1000L - 273150)
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struct nvme_hwmon_data {
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struct nvme_ctrl *ctrl;
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struct nvme_smart_log log;
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struct mutex read_lock;
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};
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static int nvme_get_temp_thresh(struct nvme_ctrl *ctrl, int sensor, bool under,
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long *temp)
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{
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unsigned int threshold = sensor << NVME_TEMP_THRESH_SELECT_SHIFT;
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u32 status;
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int ret;
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if (under)
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threshold |= NVME_TEMP_THRESH_TYPE_UNDER;
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ret = nvme_get_features(ctrl, NVME_FEAT_TEMP_THRESH, threshold, NULL, 0,
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&status);
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if (ret > 0)
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return -EIO;
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if (ret < 0)
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return ret;
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*temp = KELVIN_TO_MILLICELSIUS(status & NVME_TEMP_THRESH_MASK);
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return 0;
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}
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static int nvme_set_temp_thresh(struct nvme_ctrl *ctrl, int sensor, bool under,
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long temp)
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{
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unsigned int threshold = sensor << NVME_TEMP_THRESH_SELECT_SHIFT;
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int ret;
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temp = MILLICELSIUS_TO_KELVIN(temp);
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threshold |= clamp_val(temp, 0, NVME_TEMP_THRESH_MASK);
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if (under)
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threshold |= NVME_TEMP_THRESH_TYPE_UNDER;
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ret = nvme_set_features(ctrl, NVME_FEAT_TEMP_THRESH, threshold, NULL, 0,
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NULL);
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if (ret > 0)
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return -EIO;
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return ret;
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}
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static int nvme_hwmon_get_smart_log(struct nvme_hwmon_data *data)
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{
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int ret;
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ret = nvme_get_log(data->ctrl, NVME_NSID_ALL, NVME_LOG_SMART, 0,
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&data->log, sizeof(data->log), 0);
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return ret <= 0 ? ret : -EIO;
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}
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static int nvme_hwmon_read(struct device *dev, enum hwmon_sensor_types type,
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u32 attr, int channel, long *val)
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{
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struct nvme_hwmon_data *data = dev_get_drvdata(dev);
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struct nvme_smart_log *log = &data->log;
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int temp;
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int err;
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/*
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* First handle attributes which don't require us to read
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* the smart log.
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*/
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switch (attr) {
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case hwmon_temp_max:
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return nvme_get_temp_thresh(data->ctrl, channel, false, val);
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case hwmon_temp_min:
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return nvme_get_temp_thresh(data->ctrl, channel, true, val);
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case hwmon_temp_crit:
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*val = KELVIN_TO_MILLICELSIUS(data->ctrl->cctemp);
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return 0;
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default:
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break;
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}
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mutex_lock(&data->read_lock);
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err = nvme_hwmon_get_smart_log(data);
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if (err)
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goto unlock;
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switch (attr) {
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case hwmon_temp_input:
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if (!channel)
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temp = get_unaligned_le16(log->temperature);
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else
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temp = le16_to_cpu(log->temp_sensor[channel - 1]);
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*val = KELVIN_TO_MILLICELSIUS(temp);
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break;
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case hwmon_temp_alarm:
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*val = !!(log->critical_warning & NVME_SMART_CRIT_TEMPERATURE);
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break;
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default:
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err = -EOPNOTSUPP;
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break;
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}
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unlock:
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mutex_unlock(&data->read_lock);
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return err;
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}
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static int nvme_hwmon_write(struct device *dev, enum hwmon_sensor_types type,
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u32 attr, int channel, long val)
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{
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struct nvme_hwmon_data *data = dev_get_drvdata(dev);
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switch (attr) {
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case hwmon_temp_max:
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return nvme_set_temp_thresh(data->ctrl, channel, false, val);
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case hwmon_temp_min:
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return nvme_set_temp_thresh(data->ctrl, channel, true, val);
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default:
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break;
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}
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return -EOPNOTSUPP;
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}
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static const char * const nvme_hwmon_sensor_names[] = {
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"Composite",
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"Sensor 1",
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"Sensor 2",
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"Sensor 3",
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"Sensor 4",
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"Sensor 5",
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"Sensor 6",
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"Sensor 7",
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"Sensor 8",
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};
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static int nvme_hwmon_read_string(struct device *dev,
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enum hwmon_sensor_types type, u32 attr,
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int channel, const char **str)
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{
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*str = nvme_hwmon_sensor_names[channel];
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return 0;
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}
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static umode_t nvme_hwmon_is_visible(const void *_data,
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enum hwmon_sensor_types type,
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u32 attr, int channel)
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{
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const struct nvme_hwmon_data *data = _data;
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switch (attr) {
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case hwmon_temp_crit:
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if (!channel && data->ctrl->cctemp)
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return 0444;
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break;
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case hwmon_temp_max:
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case hwmon_temp_min:
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if ((!channel && data->ctrl->wctemp) ||
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(channel && data->log.temp_sensor[channel - 1])) {
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if (data->ctrl->quirks &
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NVME_QUIRK_NO_TEMP_THRESH_CHANGE)
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return 0444;
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return 0644;
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}
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break;
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case hwmon_temp_alarm:
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if (!channel)
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return 0444;
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break;
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case hwmon_temp_input:
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case hwmon_temp_label:
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if (!channel || data->log.temp_sensor[channel - 1])
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return 0444;
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break;
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default:
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break;
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}
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return 0;
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}
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static const struct hwmon_channel_info *nvme_hwmon_info[] = {
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HWMON_CHANNEL_INFO(chip, HWMON_C_REGISTER_TZ),
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HWMON_CHANNEL_INFO(temp,
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HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_MIN |
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HWMON_T_CRIT | HWMON_T_LABEL | HWMON_T_ALARM,
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HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_MIN |
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HWMON_T_LABEL,
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HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_MIN |
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HWMON_T_LABEL,
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HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_MIN |
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HWMON_T_LABEL,
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HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_MIN |
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HWMON_T_LABEL,
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HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_MIN |
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HWMON_T_LABEL,
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HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_MIN |
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HWMON_T_LABEL,
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HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_MIN |
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HWMON_T_LABEL,
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HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_MIN |
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HWMON_T_LABEL),
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NULL
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};
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static const struct hwmon_ops nvme_hwmon_ops = {
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.is_visible = nvme_hwmon_is_visible,
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.read = nvme_hwmon_read,
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.read_string = nvme_hwmon_read_string,
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.write = nvme_hwmon_write,
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};
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static const struct hwmon_chip_info nvme_hwmon_chip_info = {
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.ops = &nvme_hwmon_ops,
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.info = nvme_hwmon_info,
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};
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void nvme_hwmon_init(struct nvme_ctrl *ctrl)
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{
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struct device *dev = ctrl->dev;
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struct nvme_hwmon_data *data;
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struct device *hwmon;
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int err;
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data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL);
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if (!data)
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return;
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data->ctrl = ctrl;
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mutex_init(&data->read_lock);
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err = nvme_hwmon_get_smart_log(data);
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if (err) {
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dev_warn(dev, "Failed to read smart log (error %d)\n", err);
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devm_kfree(dev, data);
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return;
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}
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hwmon = devm_hwmon_device_register_with_info(dev, "nvme", data,
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&nvme_hwmon_chip_info,
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NULL);
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if (IS_ERR(hwmon)) {
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dev_warn(dev, "Failed to instantiate hwmon device\n");
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devm_kfree(dev, data);
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}
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}
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@ -114,6 +114,11 @@ enum nvme_quirks {
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* Prevent tag overlap between queues
|
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*/
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NVME_QUIRK_SHARED_TAGS = (1 << 13),
|
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/*
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* Don't change the value of the temperature threshold feature
|
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*/
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NVME_QUIRK_NO_TEMP_THRESH_CHANGE = (1 << 14),
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};
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/*
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@ -230,6 +235,8 @@ struct nvme_ctrl {
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u16 kas;
|
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u8 npss;
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u8 apsta;
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u16 wctemp;
|
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u16 cctemp;
|
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u32 oaes;
|
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u32 aen_result;
|
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u32 ctratt;
|
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|
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@ -665,4 +672,10 @@ static inline struct nvme_ns *nvme_get_ns_from_dev(struct device *dev)
|
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return dev_to_disk(dev)->private_data;
|
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}
|
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|
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#ifdef CONFIG_NVME_HWMON
|
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void nvme_hwmon_init(struct nvme_ctrl *ctrl);
|
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#else
|
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static inline void nvme_hwmon_init(struct nvme_ctrl *ctrl) { }
|
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#endif
|
||||
|
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#endif /* _NVME_H */
|
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|
|
|
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|
|
@ -3065,7 +3065,8 @@ static const struct pci_device_id nvme_id_table[] = {
|
|||
NVME_QUIRK_DEALLOCATE_ZEROES, },
|
||||
{ PCI_VDEVICE(INTEL, 0xf1a5), /* Intel 600P/P3100 */
|
||||
.driver_data = NVME_QUIRK_NO_DEEPEST_PS |
|
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NVME_QUIRK_MEDIUM_PRIO_SQ },
|
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NVME_QUIRK_MEDIUM_PRIO_SQ |
|
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NVME_QUIRK_NO_TEMP_THRESH_CHANGE },
|
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{ PCI_VDEVICE(INTEL, 0xf1a6), /* Intel 760p/Pro 7600p */
|
||||
.driver_data = NVME_QUIRK_IGNORE_DEV_SUBNQN, },
|
||||
{ PCI_VDEVICE(INTEL, 0x5845), /* Qemu emulated controller */
|
||||
|
|
|
|||
|
|
@ -804,6 +804,12 @@ struct nvme_write_zeroes_cmd {
|
|||
|
||||
/* Features */
|
||||
|
||||
enum {
|
||||
NVME_TEMP_THRESH_MASK = 0xffff,
|
||||
NVME_TEMP_THRESH_SELECT_SHIFT = 16,
|
||||
NVME_TEMP_THRESH_TYPE_UNDER = 0x100000,
|
||||
};
|
||||
|
||||
struct nvme_feat_auto_pst {
|
||||
__le64 entries[32];
|
||||
};
|
||||
|
|
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|||
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