ARM: SoC fixes for v5.7
This time there is one fix for the error path in the mediatek cmdq driver (used by their video driver) and a couple of devicetree fixes, mostly for 32-bit ARM, and fairly harmless: - On OMAP2 there were a few regressions in the ethernet drivers, one of them leading to an external abort trap - One Raspberry Pi version had a misconfigured LED - Interrupts on Broadcom NSP were slightly misconfigured - One i.MX6q board had issues with graphics mode setting - On mmp3 there are some minor fixes that were submitted for v5.8 with a cc:stable tag, so I ended up picking them up here as well - The Mediatek Video Codec needs to run at a higher frequency than configured originally Signed-off-by: Arnd Bergmann <arnd@arndb.de> -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAl7Rin0ACgkQmmx57+YA GNlD7A//ehGZi+AinBWiCupunm26EekqJE2hp8gZMCYAil5jm3Djk4oib6xHFSIB +z6H0gXfi/cqeMNkch3aPW0Rhqm6JhvOpkVmBEzwXSj1W9TQz6Xvhy58Aa3E1h/A 2FyoC4pm9hKOlamaEUkaOLblMhLRla1fpgewmB6qGPNWZx6gNX45cxawqn9t4M7/ tjDa9s+Df8YxeS08thK6PVwZ3zdVQLFfhuZR0/tCpBgikYSuK+e9W9R7IealPPs5 iPTBeFpJVbtapaEaXHyjlyUn+0TdiEq5nrFwv6vMc08kIrZl9Ej9DSel0pq+mEDT b/v5J3FBgcq20kTBfeU2fYw5Sr6bZ7Ojm0ZMnFou60CPX7R18FDbgl8+ISOK8wmV 1m+0V+tNYg7Mxu0IXBTHuZ98oMH3YeFmmYUOUIp5wmxHH/wsAePUxroRQXDZHtBA XEAN4qOztNtNrz1+iKwe03tls50baF0oey0N6AqH+yH6DvBbbIRYZxgAvErdh8YU 67hbKnhYpK7gsGeCJ/f056TKUizsX923pU6e5XapdG9bNXLm5lgC2dSA2iPJjws/ ppcbQjQTef1j2MPs97Al0Q3wbPTiq4dM0na1B//iyBZOAQf3niZPaUdbPngbNCra FZmVhdKkhI7EAIBAS+9haK/v6RKrMJytJd6z6o4GTRL0CElahdw= =E8Pg -----END PGP SIGNATURE----- Merge tag 'armsoc-fixes-v5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull ARM SoC fixes from Arnd Bergmann: "This time there is one fix for the error path in the mediatek cmdq driver (used by their video driver) and a couple of devicetree fixes, mostly for 32-bit ARM, and fairly harmless: - On OMAP2 there were a few regressions in the ethernet drivers, one of them leading to an external abort trap - One Raspberry Pi version had a misconfigured LED - Interrupts on Broadcom NSP were slightly misconfigured - One i.MX6q board had issues with graphics mode setting - On mmp3 there are some minor fixes that were submitted for v5.8 with a cc:stable tag, so I ended up picking them up here as well - The Mediatek Video Codec needs to run at a higher frequency than configured originally" * tag 'armsoc-fixes-v5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: ARM: dts: mmp3: Drop usb-nop-xceiv from HSIC phy ARM: dts: mmp3-dell-ariel: Fix the SPI devices ARM: dts: mmp3: Use the MMP3 compatible string for /clocks ARM: dts: bcm: HR2: Fix PPI interrupt types ARM: dts: bcm2835-rpi-zero-w: Fix led polarity ARM: dts/imx6q-bx50v3: Set display interface clock parents soc: mediatek: cmdq: return send msg error code arm64: dts: mt8173: fix vcodec-enc clock ARM: dts: Fix wrong mdio clock for dm814x ARM: dts: am437x: fix networking on boards with ksz9031 phy ARM: dts: am57xx: fix networking on boards with ksz9031 phy
This commit is contained in:
Коммит
86852175b0
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@ -943,7 +943,7 @@
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&cpsw_emac0 {
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phy-handle = <ðphy0>;
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phy-mode = "rgmii";
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phy-mode = "rgmii-rxid";
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};
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&elm {
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@ -504,7 +504,7 @@
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&cpsw_emac0 {
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phy-handle = <ðphy0>;
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phy-mode = "rgmii";
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phy-mode = "rgmii-rxid";
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};
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&rtc {
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@ -833,13 +833,13 @@
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&cpsw_emac0 {
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phy-handle = <ðphy0>;
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phy-mode = "rgmii";
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phy-mode = "rgmii-rxid";
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dual_emac_res_vlan = <1>;
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};
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&cpsw_emac1 {
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phy-handle = <ðphy1>;
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phy-mode = "rgmii";
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phy-mode = "rgmii-rxid";
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dual_emac_res_vlan = <2>;
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};
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@ -190,13 +190,13 @@
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&cpsw_port1 {
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phy-handle = <ðphy0_sw>;
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phy-mode = "rgmii";
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phy-mode = "rgmii-rxid";
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ti,dual-emac-pvid = <1>;
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};
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&cpsw_port2 {
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phy-handle = <ðphy1_sw>;
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phy-mode = "rgmii";
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phy-mode = "rgmii-rxid";
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ti,dual-emac-pvid = <2>;
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};
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@ -433,13 +433,13 @@
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&cpsw_emac0 {
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phy-handle = <&phy0>;
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phy-mode = "rgmii";
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phy-mode = "rgmii-rxid";
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dual_emac_res_vlan = <1>;
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};
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&cpsw_emac1 {
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phy-handle = <&phy1>;
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phy-mode = "rgmii";
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phy-mode = "rgmii-rxid";
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dual_emac_res_vlan = <2>;
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};
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@ -408,13 +408,13 @@
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&cpsw_emac0 {
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phy-handle = <ðphy0>;
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phy-mode = "rgmii";
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phy-mode = "rgmii-rxid";
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dual_emac_res_vlan = <1>;
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};
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&cpsw_emac1 {
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phy-handle = <ðphy1>;
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phy-mode = "rgmii";
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phy-mode = "rgmii-rxid";
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dual_emac_res_vlan = <2>;
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};
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@ -75,7 +75,7 @@
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timer@20200 {
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compatible = "arm,cortex-a9-global-timer";
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reg = <0x20200 0x100>;
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interrupts = <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>;
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interrupts = <GIC_PPI 11 IRQ_TYPE_EDGE_RISING>;
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clocks = <&periph_clk>;
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};
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@ -83,7 +83,7 @@
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compatible = "arm,cortex-a9-twd-timer";
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reg = <0x20600 0x20>;
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interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(1) |
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IRQ_TYPE_LEVEL_HIGH)>;
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IRQ_TYPE_EDGE_RISING)>;
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clocks = <&periph_clk>;
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};
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@ -91,7 +91,7 @@
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compatible = "arm,cortex-a9-twd-wdt";
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reg = <0x20620 0x20>;
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interrupts = <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(1) |
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IRQ_TYPE_LEVEL_HIGH)>;
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IRQ_TYPE_EDGE_RISING)>;
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clocks = <&periph_clk>;
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};
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@ -24,7 +24,7 @@
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leds {
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act {
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gpios = <&gpio 47 GPIO_ACTIVE_HIGH>;
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gpios = <&gpio 47 GPIO_ACTIVE_LOW>;
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};
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};
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@ -693,7 +693,7 @@
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davinci_mdio: mdio@800 {
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compatible = "ti,cpsw-mdio", "ti,davinci_mdio";
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clocks = <&alwon_ethernet_clkctrl DM814_ETHERNET_CPGMAC0_CLKCTRL 0>;
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clocks = <&cpsw_125mhz_gclk>;
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clock-names = "fck";
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#address-cells = <1>;
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#size-cells = <0>;
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@ -65,13 +65,6 @@
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};
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};
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&clks {
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assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
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<&clks IMX6QDL_CLK_LDB_DI1_SEL>;
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assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
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<&clks IMX6QDL_CLK_PLL3_USB_OTG>;
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};
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&ldb {
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status = "okay";
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@ -65,13 +65,6 @@
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};
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};
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&clks {
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assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
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<&clks IMX6QDL_CLK_LDB_DI1_SEL>;
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assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
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<&clks IMX6QDL_CLK_PLL3_USB_OTG>;
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};
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&ldb {
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status = "okay";
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@ -53,17 +53,6 @@
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};
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};
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&clks {
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assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
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<&clks IMX6QDL_CLK_LDB_DI1_SEL>,
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<&clks IMX6QDL_CLK_IPU1_DI0_PRE_SEL>,
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<&clks IMX6QDL_CLK_IPU2_DI0_PRE_SEL>;
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assigned-clock-parents = <&clks IMX6QDL_CLK_PLL5_VIDEO_DIV>,
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<&clks IMX6QDL_CLK_PLL5_VIDEO_DIV>,
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<&clks IMX6QDL_CLK_PLL2_PFD2_396M>,
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<&clks IMX6QDL_CLK_PLL2_PFD2_396M>;
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};
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&ldb {
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fsl,dual-channel;
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status = "okay";
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@ -377,3 +377,18 @@
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#interrupt-cells = <1>;
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};
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};
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&clks {
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assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
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<&clks IMX6QDL_CLK_LDB_DI1_SEL>,
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<&clks IMX6QDL_CLK_IPU1_DI0_PRE_SEL>,
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<&clks IMX6QDL_CLK_IPU1_DI1_PRE_SEL>,
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<&clks IMX6QDL_CLK_IPU2_DI0_PRE_SEL>,
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<&clks IMX6QDL_CLK_IPU2_DI1_PRE_SEL>;
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assigned-clock-parents = <&clks IMX6QDL_CLK_PLL5_VIDEO_DIV>,
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<&clks IMX6QDL_CLK_PLL5_VIDEO_DIV>,
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<&clks IMX6QDL_CLK_PLL2_PFD0_352M>,
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<&clks IMX6QDL_CLK_PLL2_PFD0_352M>,
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<&clks IMX6QDL_CLK_PLL2_PFD0_352M>,
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<&clks IMX6QDL_CLK_PLL2_PFD0_352M>;
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};
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@ -98,19 +98,19 @@
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status = "okay";
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};
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&ssp3 {
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&ssp1 {
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status = "okay";
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cs-gpios = <&gpio 46 GPIO_ACTIVE_HIGH>;
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cs-gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
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firmware-flash@0 {
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compatible = "st,m25p80", "jedec,spi-nor";
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compatible = "winbond,w25q32", "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <40000000>;
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spi-max-frequency = <104000000>;
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m25p,fast-read;
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};
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};
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&ssp4 {
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cs-gpios = <&gpio 56 GPIO_ACTIVE_HIGH>;
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&ssp2 {
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cs-gpios = <&gpio 56 GPIO_ACTIVE_LOW>;
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status = "okay";
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};
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@ -202,8 +202,7 @@
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};
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hsic_phy0: hsic-phy@f0001800 {
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compatible = "marvell,mmp3-hsic-phy",
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"usb-nop-xceiv";
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compatible = "marvell,mmp3-hsic-phy";
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reg = <0xf0001800 0x40>;
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#phy-cells = <0>;
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status = "disabled";
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};
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hsic_phy1: hsic-phy@f0002800 {
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compatible = "marvell,mmp3-hsic-phy",
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"usb-nop-xceiv";
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compatible = "marvell,mmp3-hsic-phy";
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reg = <0xf0002800 0x40>;
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#phy-cells = <0>;
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status = "disabled";
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};
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soc_clocks: clocks@d4050000 {
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compatible = "marvell,mmp2-clock";
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compatible = "marvell,mmp3-clock";
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reg = <0xd4050000 0x1000>,
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<0xd4282800 0x400>,
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<0xd4015000 0x1000>;
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@ -1402,8 +1402,8 @@
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"venc_lt_sel";
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assigned-clocks = <&topckgen CLK_TOP_VENC_SEL>,
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<&topckgen CLK_TOP_VENC_LT_SEL>;
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assigned-clock-parents = <&topckgen CLK_TOP_VENCPLL_D2>,
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<&topckgen CLK_TOP_UNIVPLL1_D2>;
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assigned-clock-parents = <&topckgen CLK_TOP_VCODECPLL>,
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<&topckgen CLK_TOP_VCODECPLL_370P5>;
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};
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jpegdec: jpegdec@18004000 {
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@ -351,7 +351,9 @@ int cmdq_pkt_flush_async(struct cmdq_pkt *pkt, cmdq_async_flush_cb cb,
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spin_unlock_irqrestore(&client->lock, flags);
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}
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mbox_send_message(client->chan, pkt);
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err = mbox_send_message(client->chan, pkt);
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if (err < 0)
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return err;
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/* We can send next packet immediately, so just call txdone. */
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mbox_client_txdone(client->chan, 0);
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