tgafb: TURBOchannel support
This is support for the TC variations of the TGA boards (properly known as SFB+ or Smart Frame Buffer Plus boards). The 8-plane SFB+ board uses the Bt459 RAMDAC (unlike its PCI TGA counterpart, which uses the Bt485), so bits have been added to support this chip as well. Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org> Cc: "Antonino A. Daplas" <adaplas@pol.net> Cc: James Simmons <jsimmons@infradead.org> Acked-by: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
This commit is contained in:
Родитель
9a268a629b
Коммит
86c6f7d08b
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@ -525,15 +525,25 @@ config FB_HP300
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default y
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config FB_TGA
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tristate "TGA framebuffer support"
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depends on FB && ALPHA
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tristate "TGA/SFB+ framebuffer support"
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depends on FB && (ALPHA || TC)
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select FB_CFB_FILLRECT
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select FB_CFB_COPYAREA
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select FB_CFB_IMAGEBLIT
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select BITREVERSE
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help
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This is the frame buffer device driver for generic TGA graphic
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cards. Say Y if you have one of those.
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---help---
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This is the frame buffer device driver for generic TGA and SFB+
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graphic cards. These include DEC ZLXp-E1, -E2 and -E3 PCI cards,
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also known as PBXGA-A, -B and -C, and DEC ZLX-E1, -E2 and -E3
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TURBOchannel cards, also known as PMAGD-A, -B and -C.
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Due to hardware limitations ZLX-E2 and E3 cards are not supported
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for DECstation 5000/200 systems. Additionally due to firmware
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limitations these cards may cause troubles with booting DECstation
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5000/240 and /260 systems, but are fully supported under Linux if
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you manage to get it going. ;-)
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Say Y if you have one of those.
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config FB_VESA
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bool "VESA VGA graphics support"
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@ -5,27 +5,45 @@
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* Copyright (C) 1997 Geert Uytterhoeven
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* Copyright (C) 1999,2000 Martin Lucina, Tom Zerucha
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* Copyright (C) 2002 Richard Henderson
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* Copyright (C) 2006 Maciej W. Rozycki
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file COPYING in the main directory of this archive for
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* more details.
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*/
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/errno.h>
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#include <linux/string.h>
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#include <linux/mm.h>
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#include <linux/slab.h>
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#include <linux/bitrev.h>
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#include <linux/delay.h>
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#include <linux/init.h>
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#include <linux/device.h>
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#include <linux/errno.h>
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#include <linux/fb.h>
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#include <linux/init.h>
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#include <linux/ioport.h>
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#include <linux/kernel.h>
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#include <linux/mm.h>
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#include <linux/module.h>
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#include <linux/pci.h>
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#include <linux/selection.h>
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#include <linux/bitrev.h>
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#include <linux/slab.h>
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#include <linux/string.h>
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#include <linux/tc.h>
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#include <asm/io.h>
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#include <video/tgafb.h>
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#ifdef CONFIG_PCI
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#define TGA_BUS_PCI(dev) (dev->bus == &pci_bus_type)
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#else
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#define TGA_BUS_PCI(dev) 0
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#endif
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#ifdef CONFIG_TC
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#define TGA_BUS_TC(dev) (dev->bus == &tc_bus_type)
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#else
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#define TGA_BUS_TC(dev) 0
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#endif
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/*
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* Local functions.
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*/
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@ -42,13 +60,17 @@ static void tgafb_imageblit(struct fb_info *, const struct fb_image *);
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static void tgafb_fillrect(struct fb_info *, const struct fb_fillrect *);
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static void tgafb_copyarea(struct fb_info *, const struct fb_copyarea *);
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static int __devinit tgafb_pci_register(struct pci_dev *,
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const struct pci_device_id *);
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static void __devexit tgafb_pci_unregister(struct pci_dev *);
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static int __devinit tgafb_register(struct device *dev);
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static void __devexit tgafb_unregister(struct device *dev);
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static const char *mode_option = "640x480@60";
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static const char *mode_option;
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static const char *mode_option_pci = "640x480@60";
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static const char *mode_option_tc = "1280x1024@72";
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static struct pci_driver tgafb_pci_driver;
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static struct tc_driver tgafb_tc_driver;
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/*
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* Frame buffer operations
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*/
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@ -65,9 +87,13 @@ static struct fb_ops tgafb_ops = {
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};
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#ifdef CONFIG_PCI
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/*
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* PCI registration operations
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*/
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static int __devinit tgafb_pci_register(struct pci_dev *,
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const struct pci_device_id *);
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static void __devexit tgafb_pci_unregister(struct pci_dev *);
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static struct pci_device_id const tgafb_pci_table[] = {
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{ PCI_DEVICE(PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_DEC_TGA) },
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@ -75,13 +101,68 @@ static struct pci_device_id const tgafb_pci_table[] = {
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};
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MODULE_DEVICE_TABLE(pci, tgafb_pci_table);
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static struct pci_driver tgafb_driver = {
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static struct pci_driver tgafb_pci_driver = {
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.name = "tgafb",
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.id_table = tgafb_pci_table,
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.probe = tgafb_pci_register,
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.remove = __devexit_p(tgafb_pci_unregister),
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};
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static int __devinit
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tgafb_pci_register(struct pci_dev *pdev, const struct pci_device_id *ent)
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{
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return tgafb_register(&pdev->dev);
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}
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static void __devexit
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tgafb_pci_unregister(struct pci_dev *pdev)
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{
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tgafb_unregister(&pdev->dev);
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}
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#endif /* CONFIG_PCI */
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#ifdef CONFIG_TC
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/*
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* TC registration operations
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*/
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static int __devinit tgafb_tc_register(struct device *);
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static int __devexit tgafb_tc_unregister(struct device *);
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static struct tc_device_id const tgafb_tc_table[] = {
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{ "DEC ", "PMAGD-AA" },
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{ "DEC ", "PMAGD " },
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{ }
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};
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MODULE_DEVICE_TABLE(tc, tgafb_tc_table);
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static struct tc_driver tgafb_tc_driver = {
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.id_table = tgafb_tc_table,
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.driver = {
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.name = "tgafb",
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.bus = &tc_bus_type,
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.probe = tgafb_tc_register,
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.remove = __devexit_p(tgafb_tc_unregister),
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},
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};
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static int __devinit
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tgafb_tc_register(struct device *dev)
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{
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int status = tgafb_register(dev);
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if (!status)
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get_device(dev);
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return status;
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}
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static int __devexit
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tgafb_tc_unregister(struct device *dev)
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{
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put_device(dev);
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tgafb_unregister(dev);
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return 0;
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}
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#endif /* CONFIG_TC */
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/**
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* tgafb_check_var - Optional function. Validates a var passed in.
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@ -132,10 +213,10 @@ static int
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tgafb_set_par(struct fb_info *info)
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{
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static unsigned int const deep_presets[4] = {
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0x00014000,
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0x0001440d,
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0x00004000,
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0x0000440d,
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0xffffffff,
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0x0001441d
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0x0000441d
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};
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static unsigned int const rasterop_presets[4] = {
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0x00000003,
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@ -157,6 +238,8 @@ tgafb_set_par(struct fb_info *info)
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};
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struct tga_par *par = (struct tga_par *) info->par;
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int tga_bus_pci = TGA_BUS_PCI(par->dev);
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int tga_bus_tc = TGA_BUS_TC(par->dev);
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u32 htimings, vtimings, pll_freq;
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u8 tga_type;
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int i;
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@ -221,7 +304,7 @@ tgafb_set_par(struct fb_info *info)
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TGA_WRITE_REG(par, vtimings, TGA_VERT_REG);
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/* Initalise RAMDAC. */
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if (tga_type == TGA_TYPE_8PLANE) {
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if (tga_type == TGA_TYPE_8PLANE && tga_bus_pci) {
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/* Init BT485 RAMDAC registers. */
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BT485_WRITE(par, 0xa2 | (par->sync_on_green ? 0x8 : 0x0),
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@ -261,6 +344,38 @@ tgafb_set_par(struct fb_info *info)
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TGA_RAMDAC_REG);
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}
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} else if (tga_type == TGA_TYPE_8PLANE && tga_bus_tc) {
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/* Init BT459 RAMDAC registers. */
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BT459_WRITE(par, BT459_REG_ACC, BT459_CMD_REG_0, 0x40);
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BT459_WRITE(par, BT459_REG_ACC, BT459_CMD_REG_1, 0x00);
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BT459_WRITE(par, BT459_REG_ACC, BT459_CMD_REG_2,
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(par->sync_on_green ? 0xc0 : 0x40));
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BT459_WRITE(par, BT459_REG_ACC, BT459_CUR_CMD_REG, 0x00);
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/* Fill the palette. */
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BT459_LOAD_ADDR(par, 0x0000);
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TGA_WRITE_REG(par, BT459_PALETTE << 2, TGA_RAMDAC_SETUP_REG);
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#ifdef CONFIG_HW_CONSOLE
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for (i = 0; i < 16; i++) {
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int j = color_table[i];
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TGA_WRITE_REG(par, default_red[j], TGA_RAMDAC_REG);
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TGA_WRITE_REG(par, default_grn[j], TGA_RAMDAC_REG);
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TGA_WRITE_REG(par, default_blu[j], TGA_RAMDAC_REG);
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}
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for (i = 0; i < 240 * 3; i += 4) {
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#else
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for (i = 0; i < 256 * 3; i += 4) {
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#endif
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TGA_WRITE_REG(par, 0x55, TGA_RAMDAC_REG);
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TGA_WRITE_REG(par, 0x00, TGA_RAMDAC_REG);
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TGA_WRITE_REG(par, 0x00, TGA_RAMDAC_REG);
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TGA_WRITE_REG(par, 0x00, TGA_RAMDAC_REG);
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}
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} else { /* 24-plane or 24plusZ */
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/* Init BT463 RAMDAC registers. */
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@ -431,6 +546,8 @@ tgafb_setcolreg(unsigned regno, unsigned red, unsigned green, unsigned blue,
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unsigned transp, struct fb_info *info)
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{
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struct tga_par *par = (struct tga_par *) info->par;
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int tga_bus_pci = TGA_BUS_PCI(par->dev);
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int tga_bus_tc = TGA_BUS_TC(par->dev);
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if (regno > 255)
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return 1;
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@ -438,12 +555,18 @@ tgafb_setcolreg(unsigned regno, unsigned red, unsigned green, unsigned blue,
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green >>= 8;
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blue >>= 8;
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if (par->tga_type == TGA_TYPE_8PLANE) {
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if (par->tga_type == TGA_TYPE_8PLANE && tga_bus_pci) {
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BT485_WRITE(par, regno, BT485_ADDR_PAL_WRITE);
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TGA_WRITE_REG(par, BT485_DATA_PAL, TGA_RAMDAC_SETUP_REG);
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TGA_WRITE_REG(par, red|(BT485_DATA_PAL<<8),TGA_RAMDAC_REG);
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TGA_WRITE_REG(par, green|(BT485_DATA_PAL<<8),TGA_RAMDAC_REG);
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TGA_WRITE_REG(par, blue|(BT485_DATA_PAL<<8),TGA_RAMDAC_REG);
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} else if (par->tga_type == TGA_TYPE_8PLANE && tga_bus_tc) {
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BT459_LOAD_ADDR(par, regno);
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TGA_WRITE_REG(par, BT459_PALETTE << 2, TGA_RAMDAC_SETUP_REG);
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TGA_WRITE_REG(par, red, TGA_RAMDAC_REG);
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TGA_WRITE_REG(par, green, TGA_RAMDAC_REG);
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TGA_WRITE_REG(par, blue, TGA_RAMDAC_REG);
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} else {
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if (regno < 16) {
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u32 value = (regno << 16) | (regno << 8) | regno;
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@ -1309,18 +1432,29 @@ static void
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tgafb_init_fix(struct fb_info *info)
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{
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struct tga_par *par = (struct tga_par *)info->par;
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int tga_bus_pci = TGA_BUS_PCI(par->dev);
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int tga_bus_tc = TGA_BUS_TC(par->dev);
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u8 tga_type = par->tga_type;
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const char *tga_type_name;
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const char *tga_type_name = NULL;
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switch (tga_type) {
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case TGA_TYPE_8PLANE:
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tga_type_name = "Digital ZLXp-E1";
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if (tga_bus_pci)
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tga_type_name = "Digital ZLXp-E1";
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if (tga_bus_tc)
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tga_type_name = "Digital ZLX-E1";
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break;
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case TGA_TYPE_24PLANE:
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tga_type_name = "Digital ZLXp-E2";
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if (tga_bus_pci)
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tga_type_name = "Digital ZLXp-E2";
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if (tga_bus_tc)
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tga_type_name = "Digital ZLX-E2";
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break;
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case TGA_TYPE_24PLUSZ:
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tga_type_name = "Digital ZLXp-E3";
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if (tga_bus_pci)
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tga_type_name = "Digital ZLXp-E3";
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if (tga_bus_tc)
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tga_type_name = "Digital ZLX-E3";
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break;
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default:
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tga_type_name = "Unknown";
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@ -1348,9 +1482,15 @@ tgafb_init_fix(struct fb_info *info)
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info->fix.accel = FB_ACCEL_DEC_TGA;
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}
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static __devinit int
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tgafb_pci_register(struct pci_dev *pdev, const struct pci_device_id *ent)
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static int __devinit
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tgafb_register(struct device *dev)
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{
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static const struct fb_videomode modedb_tc = {
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/* 1280x1024 @ 72 Hz, 76.8 kHz hsync */
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"1280x1024@72", 0, 1280, 1024, 7645, 224, 28, 33, 3, 160, 3,
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FB_SYNC_ON_GREEN, FB_VMODE_NONINTERLACED
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};
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static unsigned int const fb_offset_presets[4] = {
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TGA_8PLANE_FB_OFFSET,
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TGA_24PLANE_FB_OFFSET,
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@ -1358,40 +1498,51 @@ tgafb_pci_register(struct pci_dev *pdev, const struct pci_device_id *ent)
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TGA_24PLUSZ_FB_OFFSET
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};
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const struct fb_videomode *modedb_tga = NULL;
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resource_size_t bar0_start = 0, bar0_len = 0;
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const char *mode_option_tga = NULL;
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int tga_bus_pci = TGA_BUS_PCI(dev);
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int tga_bus_tc = TGA_BUS_TC(dev);
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unsigned int modedbsize_tga = 0;
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void __iomem *mem_base;
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unsigned long bar0_start, bar0_len;
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struct fb_info *info;
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struct tga_par *par;
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u8 tga_type;
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int ret;
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int ret = 0;
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/* Enable device in PCI config. */
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if (pci_enable_device(pdev)) {
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if (tga_bus_pci && pci_enable_device(to_pci_dev(dev))) {
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printk(KERN_ERR "tgafb: Cannot enable PCI device\n");
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return -ENODEV;
|
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}
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|
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/* Allocate the fb and par structures. */
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info = framebuffer_alloc(sizeof(struct tga_par), &pdev->dev);
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info = framebuffer_alloc(sizeof(struct tga_par), dev);
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if (!info) {
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printk(KERN_ERR "tgafb: Cannot allocate memory\n");
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return -ENOMEM;
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}
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par = info->par;
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pci_set_drvdata(pdev, info);
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dev_set_drvdata(dev, info);
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/* Request the mem regions. */
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bar0_start = pci_resource_start(pdev, 0);
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bar0_len = pci_resource_len(pdev, 0);
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ret = -ENODEV;
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if (tga_bus_pci) {
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bar0_start = pci_resource_start(to_pci_dev(dev), 0);
|
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bar0_len = pci_resource_len(to_pci_dev(dev), 0);
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}
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if (tga_bus_tc) {
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bar0_start = to_tc_dev(dev)->resource.start;
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bar0_len = to_tc_dev(dev)->resource.end - bar0_start + 1;
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}
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if (!request_mem_region (bar0_start, bar0_len, "tgafb")) {
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printk(KERN_ERR "tgafb: cannot reserve FB region\n");
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goto err0;
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}
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/* Map the framebuffer. */
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mem_base = ioremap(bar0_start, bar0_len);
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mem_base = ioremap_nocache(bar0_start, bar0_len);
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if (!mem_base) {
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printk(KERN_ERR "tgafb: Cannot map MMIO\n");
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goto err1;
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|
@ -1399,12 +1550,16 @@ tgafb_pci_register(struct pci_dev *pdev, const struct pci_device_id *ent)
|
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/* Grab info about the card. */
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tga_type = (readl(mem_base) >> 12) & 0x0f;
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par->pdev = pdev;
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par->dev = dev;
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par->tga_mem_base = mem_base;
|
||||
par->tga_fb_base = mem_base + fb_offset_presets[tga_type];
|
||||
par->tga_regs_base = mem_base + TGA_REGS_OFFSET;
|
||||
par->tga_type = tga_type;
|
||||
pci_read_config_byte(pdev, PCI_REVISION_ID, &par->tga_chip_rev);
|
||||
if (tga_bus_pci)
|
||||
pci_read_config_byte(to_pci_dev(dev), PCI_REVISION_ID,
|
||||
&par->tga_chip_rev);
|
||||
if (tga_bus_tc)
|
||||
par->tga_chip_rev = TGA_READ_REG(par, TGA_START_REG) & 0xff;
|
||||
|
||||
/* Setup framebuffer. */
|
||||
info->flags = FBINFO_DEFAULT | FBINFO_HWACCEL_COPYAREA |
|
||||
|
@ -1414,8 +1569,17 @@ tgafb_pci_register(struct pci_dev *pdev, const struct pci_device_id *ent)
|
|||
info->pseudo_palette = (void *)(par + 1);
|
||||
|
||||
/* This should give a reasonable default video mode. */
|
||||
|
||||
ret = fb_find_mode(&info->var, info, mode_option, NULL, 0, NULL,
|
||||
if (tga_bus_pci) {
|
||||
mode_option_tga = mode_option_pci;
|
||||
}
|
||||
if (tga_bus_tc) {
|
||||
mode_option_tga = mode_option_tc;
|
||||
modedb_tga = &modedb_tc;
|
||||
modedbsize_tga = 1;
|
||||
}
|
||||
ret = fb_find_mode(&info->var, info,
|
||||
mode_option ? mode_option : mode_option_tga,
|
||||
modedb_tga, modedbsize_tga, NULL,
|
||||
tga_type == TGA_TYPE_8PLANE ? 8 : 32);
|
||||
if (ret == 0 || ret == 4) {
|
||||
printk(KERN_ERR "tgafb: Could not find valid video mode\n");
|
||||
|
@ -1438,13 +1602,19 @@ tgafb_pci_register(struct pci_dev *pdev, const struct pci_device_id *ent)
|
|||
goto err1;
|
||||
}
|
||||
|
||||
printk(KERN_INFO "tgafb: DC21030 [TGA] detected, rev=0x%02x\n",
|
||||
par->tga_chip_rev);
|
||||
printk(KERN_INFO "tgafb: at PCI bus %d, device %d, function %d\n",
|
||||
pdev->bus->number, PCI_SLOT(pdev->devfn),
|
||||
PCI_FUNC(pdev->devfn));
|
||||
printk(KERN_INFO "fb%d: %s frame buffer device at 0x%lx\n",
|
||||
info->node, info->fix.id, bar0_start);
|
||||
if (tga_bus_pci) {
|
||||
pr_info("tgafb: DC21030 [TGA] detected, rev=0x%02x\n",
|
||||
par->tga_chip_rev);
|
||||
pr_info("tgafb: at PCI bus %d, device %d, function %d\n",
|
||||
to_pci_dev(dev)->bus->number,
|
||||
PCI_SLOT(to_pci_dev(dev)->devfn),
|
||||
PCI_FUNC(to_pci_dev(dev)->devfn));
|
||||
}
|
||||
if (tga_bus_tc)
|
||||
pr_info("tgafb: SFB+ detected, rev=0x%02x\n",
|
||||
par->tga_chip_rev);
|
||||
pr_info("fb%d: %s frame buffer device at 0x%lx\n",
|
||||
info->node, info->fix.id, (long)bar0_start);
|
||||
|
||||
return 0;
|
||||
|
||||
|
@ -1458,25 +1628,39 @@ tgafb_pci_register(struct pci_dev *pdev, const struct pci_device_id *ent)
|
|||
}
|
||||
|
||||
static void __devexit
|
||||
tgafb_pci_unregister(struct pci_dev *pdev)
|
||||
tgafb_unregister(struct device *dev)
|
||||
{
|
||||
struct fb_info *info = pci_get_drvdata(pdev);
|
||||
struct tga_par *par = info->par;
|
||||
resource_size_t bar0_start = 0, bar0_len = 0;
|
||||
int tga_bus_pci = TGA_BUS_PCI(dev);
|
||||
int tga_bus_tc = TGA_BUS_TC(dev);
|
||||
struct fb_info *info = NULL;
|
||||
struct tga_par *par;
|
||||
|
||||
info = dev_get_drvdata(dev);
|
||||
if (!info)
|
||||
return;
|
||||
|
||||
par = info->par;
|
||||
unregister_framebuffer(info);
|
||||
fb_dealloc_cmap(&info->cmap);
|
||||
iounmap(par->tga_mem_base);
|
||||
release_mem_region(pci_resource_start(pdev, 0),
|
||||
pci_resource_len(pdev, 0));
|
||||
if (tga_bus_pci) {
|
||||
bar0_start = pci_resource_start(to_pci_dev(dev), 0);
|
||||
bar0_len = pci_resource_len(to_pci_dev(dev), 0);
|
||||
}
|
||||
if (tga_bus_tc) {
|
||||
bar0_start = to_tc_dev(dev)->resource.start;
|
||||
bar0_len = to_tc_dev(dev)->resource.end - bar0_start + 1;
|
||||
}
|
||||
release_mem_region(bar0_start, bar0_len);
|
||||
framebuffer_release(info);
|
||||
}
|
||||
|
||||
static void __devexit
|
||||
tgafb_exit(void)
|
||||
{
|
||||
pci_unregister_driver(&tgafb_driver);
|
||||
tc_unregister_driver(&tgafb_tc_driver);
|
||||
pci_unregister_driver(&tgafb_pci_driver);
|
||||
}
|
||||
|
||||
#ifndef MODULE
|
||||
|
@ -1505,6 +1689,7 @@ tgafb_setup(char *arg)
|
|||
static int __devinit
|
||||
tgafb_init(void)
|
||||
{
|
||||
int status;
|
||||
#ifndef MODULE
|
||||
char *option = NULL;
|
||||
|
||||
|
@ -1512,7 +1697,10 @@ tgafb_init(void)
|
|||
return -ENODEV;
|
||||
tgafb_setup(option);
|
||||
#endif
|
||||
return pci_register_driver(&tgafb_driver);
|
||||
status = pci_register_driver(&tgafb_pci_driver);
|
||||
if (!status)
|
||||
status = tc_register_driver(&tgafb_tc_driver);
|
||||
return status;
|
||||
}
|
||||
|
||||
/*
|
||||
|
@ -1522,5 +1710,5 @@ tgafb_init(void)
|
|||
module_init(tgafb_init);
|
||||
module_exit(tgafb_exit);
|
||||
|
||||
MODULE_DESCRIPTION("framebuffer driver for TGA chipset");
|
||||
MODULE_DESCRIPTION("Framebuffer driver for TGA/SFB+ chipset");
|
||||
MODULE_LICENSE("GPL");
|
||||
|
|
|
@ -39,6 +39,7 @@
|
|||
#define TGA_RASTEROP_REG 0x0034
|
||||
#define TGA_PIXELSHIFT_REG 0x0038
|
||||
#define TGA_DEEP_REG 0x0050
|
||||
#define TGA_START_REG 0x0054
|
||||
#define TGA_PIXELMASK_REG 0x005c
|
||||
#define TGA_CURSOR_BASE_REG 0x0060
|
||||
#define TGA_HORIZ_REG 0x0064
|
||||
|
@ -140,7 +141,7 @@
|
|||
|
||||
|
||||
/*
|
||||
* Useful defines for managing the BT463 on the 24-plane TGAs
|
||||
* Useful defines for managing the BT463 on the 24-plane TGAs/SFB+s
|
||||
*/
|
||||
|
||||
#define BT463_ADDR_LO 0x0
|
||||
|
@ -167,13 +168,36 @@
|
|||
|
||||
#define BT463_WINDOW_TYPE_BASE 0x0300
|
||||
|
||||
/*
|
||||
* Useful defines for managing the BT459 on the 8-plane SFB+s
|
||||
*/
|
||||
|
||||
#define BT459_ADDR_LO 0x0
|
||||
#define BT459_ADDR_HI 0x1
|
||||
#define BT459_REG_ACC 0x2
|
||||
#define BT459_PALETTE 0x3
|
||||
|
||||
#define BT459_CUR_CLR_1 0x0181
|
||||
#define BT459_CUR_CLR_2 0x0182
|
||||
#define BT459_CUR_CLR_3 0x0183
|
||||
|
||||
#define BT459_CMD_REG_0 0x0201
|
||||
#define BT459_CMD_REG_1 0x0202
|
||||
#define BT459_CMD_REG_2 0x0203
|
||||
|
||||
#define BT459_READ_MASK 0x0204
|
||||
|
||||
#define BT459_BLINK_MASK 0x0206
|
||||
|
||||
#define BT459_CUR_CMD_REG 0x0300
|
||||
|
||||
/*
|
||||
* The framebuffer driver private data.
|
||||
*/
|
||||
|
||||
struct tga_par {
|
||||
/* PCI device. */
|
||||
struct pci_dev *pdev;
|
||||
/* PCI/TC device. */
|
||||
struct device *dev;
|
||||
|
||||
/* Device dependent information. */
|
||||
void __iomem *tga_mem_base;
|
||||
|
@ -235,4 +259,21 @@ BT463_WRITE(struct tga_par *par, u32 m, u16 a, u8 v)
|
|||
TGA_WRITE_REG(par, m << 10 | v, TGA_RAMDAC_REG);
|
||||
}
|
||||
|
||||
static inline void
|
||||
BT459_LOAD_ADDR(struct tga_par *par, u16 a)
|
||||
{
|
||||
TGA_WRITE_REG(par, BT459_ADDR_LO << 2, TGA_RAMDAC_SETUP_REG);
|
||||
TGA_WRITE_REG(par, a & 0xff, TGA_RAMDAC_REG);
|
||||
TGA_WRITE_REG(par, BT459_ADDR_HI << 2, TGA_RAMDAC_SETUP_REG);
|
||||
TGA_WRITE_REG(par, a >> 8, TGA_RAMDAC_REG);
|
||||
}
|
||||
|
||||
static inline void
|
||||
BT459_WRITE(struct tga_par *par, u32 m, u16 a, u8 v)
|
||||
{
|
||||
BT459_LOAD_ADDR(par, a);
|
||||
TGA_WRITE_REG(par, m << 2, TGA_RAMDAC_SETUP_REG);
|
||||
TGA_WRITE_REG(par, v, TGA_RAMDAC_REG);
|
||||
}
|
||||
|
||||
#endif /* TGAFB_H */
|
||||
|
|
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