scsi: ufs-qcom: Add reset control support for host controller
Add reset control for host controller so that host controller can be reset as required in its power up sequence. Link: https://lore.kernel.org/r/1573798172-20534-3-git-send-email-cang@codeaurora.org Reviewed-by: Avri Altman <avri.altman@wdc.com> Signed-off-by: Can Guo <cang@codeaurora.org> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
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870b1279c7
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@ -246,6 +246,44 @@ static void ufs_qcom_select_unipro_mode(struct ufs_qcom_host *host)
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mb();
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mb();
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}
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}
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/**
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* ufs_qcom_host_reset - reset host controller and PHY
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*/
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static int ufs_qcom_host_reset(struct ufs_hba *hba)
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{
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int ret = 0;
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struct ufs_qcom_host *host = ufshcd_get_variant(hba);
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if (!host->core_reset) {
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dev_warn(hba->dev, "%s: reset control not set\n", __func__);
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goto out;
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}
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ret = reset_control_assert(host->core_reset);
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if (ret) {
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dev_err(hba->dev, "%s: core_reset assert failed, err = %d\n",
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__func__, ret);
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goto out;
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}
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/*
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* The hardware requirement for delay between assert/deassert
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* is at least 3-4 sleep clock (32.7KHz) cycles, which comes to
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* ~125us (4/32768). To be on the safe side add 200us delay.
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*/
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usleep_range(200, 210);
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ret = reset_control_deassert(host->core_reset);
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if (ret)
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dev_err(hba->dev, "%s: core_reset deassert failed, err = %d\n",
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__func__, ret);
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usleep_range(1000, 1100);
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out:
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return ret;
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}
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static int ufs_qcom_power_up_sequence(struct ufs_hba *hba)
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static int ufs_qcom_power_up_sequence(struct ufs_hba *hba)
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{
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{
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struct ufs_qcom_host *host = ufshcd_get_variant(hba);
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struct ufs_qcom_host *host = ufshcd_get_variant(hba);
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@ -254,6 +292,12 @@ static int ufs_qcom_power_up_sequence(struct ufs_hba *hba)
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bool is_rate_B = (UFS_QCOM_LIMIT_HS_RATE == PA_HS_MODE_B)
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bool is_rate_B = (UFS_QCOM_LIMIT_HS_RATE == PA_HS_MODE_B)
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? true : false;
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? true : false;
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/* Reset UFS Host Controller and PHY */
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ret = ufs_qcom_host_reset(hba);
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if (ret)
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dev_warn(hba->dev, "%s: host reset returned %d\n",
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__func__, ret);
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if (is_rate_B)
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if (is_rate_B)
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phy_set_mode(phy, PHY_MODE_UFS_HS_B);
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phy_set_mode(phy, PHY_MODE_UFS_HS_B);
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@ -1101,6 +1145,15 @@ static int ufs_qcom_init(struct ufs_hba *hba)
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host->hba = hba;
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host->hba = hba;
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ufshcd_set_variant(hba, host);
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ufshcd_set_variant(hba, host);
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/* Setup the reset control of HCI */
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host->core_reset = devm_reset_control_get(hba->dev, "rst");
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if (IS_ERR(host->core_reset)) {
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err = PTR_ERR(host->core_reset);
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dev_warn(dev, "Failed to get reset control %d\n", err);
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host->core_reset = NULL;
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err = 0;
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}
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/* Fire up the reset controller. Failure here is non-fatal. */
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/* Fire up the reset controller. Failure here is non-fatal. */
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host->rcdev.of_node = dev->of_node;
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host->rcdev.of_node = dev->of_node;
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host->rcdev.ops = &ufs_qcom_reset_ops;
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host->rcdev.ops = &ufs_qcom_reset_ops;
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@ -6,6 +6,7 @@
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#define UFS_QCOM_H_
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#define UFS_QCOM_H_
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#include <linux/reset-controller.h>
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#include <linux/reset-controller.h>
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#include <linux/reset.h>
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#define MAX_UFS_QCOM_HOSTS 1
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#define MAX_UFS_QCOM_HOSTS 1
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#define MAX_U32 (~(u32)0)
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#define MAX_U32 (~(u32)0)
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@ -233,6 +234,8 @@ struct ufs_qcom_host {
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u32 dbg_print_en;
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u32 dbg_print_en;
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struct ufs_qcom_testbus testbus;
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struct ufs_qcom_testbus testbus;
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/* Reset control of HCI */
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struct reset_control *core_reset;
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struct reset_controller_dev rcdev;
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struct reset_controller_dev rcdev;
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struct gpio_desc *device_reset;
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struct gpio_desc *device_reset;
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