mxs soc changes for 3.9
- A couple of optimization on timer - Some updates on mxs_defconfig -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) iQEcBAABAgAGBQJREJ4lAAoJEFBXWFqHsHzO5bwIAJkZC1IZ+GEh3n9ogbl/JwfE B0k7xsTrx7TgsXvdX1oxrivu75rxWfhwVgZdp9dO3zEnyeOjFRitnlyfaliKx1JM 8ZHHsVP/VxOTvw5HarirmFejyWr9x+xx1H2p9swDHT+kccUA6aazEykEx4HFAADg 9c7Z3QWVLugwo950ayMgWk6QeRJb6pZj02OlszMiW4t/qphDhoF4qiqR9QiVL1aP Td655hZzuoCuHrjyrRxUTgTwp70ntzxvwEDCaEqwGhmzN7tqJbi/wXTCcTg8A11A 2u3P8UvqeYKbATeqMP8vl/Ne6E1kAy8sGVTsAFoaooUUtZoN2YMdsIIXiw+JKy4= =Veye -----END PGP SIGNATURE----- Merge tag 'mxs-soc-3.9' of git://git.linaro.org/people/shawnguo/linux-2.6 into next/soc From Shawn Guo: mxs soc changes for 3.9 - A couple of optimization on timer - Some updates on mxs_defconfig * tag 'mxs-soc-3.9' of git://git.linaro.org/people/shawnguo/linux-2.6: ARM: mxs_defconfig: Select CONFIG_DEVTMPFS_MOUNT ARM: mxs: decrease mxs_clockevent_device.min_delta_ns to 2 clock cycles ARM: mxs: use apbx bus clock to drive the timers on timrotv2 ARM: mxs: Update mxs_defconfig
This commit is contained in:
Коммит
877cd95316
|
@ -1,5 +1,7 @@
|
|||
CONFIG_EXPERIMENTAL=y
|
||||
CONFIG_SYSVIPC=y
|
||||
CONFIG_NO_HZ=y
|
||||
CONFIG_HIGH_RES_TIMERS=y
|
||||
CONFIG_TASKSTATS=y
|
||||
CONFIG_TASK_DELAY_ACCT=y
|
||||
CONFIG_TASK_XACCT=y
|
||||
|
@ -8,7 +10,6 @@ CONFIG_IKCONFIG=y
|
|||
CONFIG_IKCONFIG_PROC=y
|
||||
# CONFIG_UTS_NS is not set
|
||||
# CONFIG_IPC_NS is not set
|
||||
# CONFIG_USER_NS is not set
|
||||
# CONFIG_PID_NS is not set
|
||||
# CONFIG_NET_NS is not set
|
||||
CONFIG_PERF_EVENTS=y
|
||||
|
@ -24,8 +25,6 @@ CONFIG_BLK_DEV_INTEGRITY=y
|
|||
CONFIG_ARCH_MXS=y
|
||||
CONFIG_MACH_MXS_DT=y
|
||||
# CONFIG_ARM_THUMB is not set
|
||||
CONFIG_NO_HZ=y
|
||||
CONFIG_HIGH_RES_TIMERS=y
|
||||
CONFIG_PREEMPT_VOLUNTARY=y
|
||||
CONFIG_AEABI=y
|
||||
CONFIG_AUTO_ZRELADDR=y
|
||||
|
@ -46,25 +45,34 @@ CONFIG_SYN_COOKIES=y
|
|||
CONFIG_CAN=m
|
||||
CONFIG_CAN_RAW=m
|
||||
CONFIG_CAN_BCM=m
|
||||
CONFIG_CAN_DEV=m
|
||||
CONFIG_CAN_FLEXCAN=m
|
||||
# CONFIG_WIRELESS is not set
|
||||
CONFIG_DEVTMPFS=y
|
||||
CONFIG_DEVTMPFS_MOUNT=y
|
||||
# CONFIG_FIRMWARE_IN_KERNEL is not set
|
||||
# CONFIG_BLK_DEV is not set
|
||||
CONFIG_MTD=y
|
||||
CONFIG_MTD_CMDLINE_PARTS=y
|
||||
CONFIG_MTD_CHAR=y
|
||||
CONFIG_MTD_BLOCK=y
|
||||
CONFIG_MTD_DATAFLASH=y
|
||||
CONFIG_MTD_M25P80
|
||||
CONFIG_MTD_M25P80=y
|
||||
# CONFIG_M25PXX_USE_FAST_READ is not set
|
||||
CONFIG_MTD_SST25L=y
|
||||
CONFIG_MTD_NAND=y
|
||||
CONFIG_MTD_NAND_GPMI_NAND=y
|
||||
CONFIG_MTD_UBI=y
|
||||
# CONFIG_BLK_DEV is not set
|
||||
CONFIG_EEPROM_AT24=y
|
||||
CONFIG_SCSI=y
|
||||
CONFIG_BLK_DEV_SD=y
|
||||
CONFIG_NETDEVICES=y
|
||||
CONFIG_NET_ETHERNET=y
|
||||
CONFIG_ENC28J60=y
|
||||
CONFIG_USB_USBNET=y
|
||||
CONFIG_USB_NET_SMSC95XX=y
|
||||
# CONFIG_NETDEV_1000 is not set
|
||||
# CONFIG_NETDEV_10000 is not set
|
||||
CONFIG_SMSC_PHY=y
|
||||
CONFIG_ICPLUS_PHY=y
|
||||
CONFIG_REALTEK_PHY=y
|
||||
CONFIG_MICREL_PHY=y
|
||||
# CONFIG_WLAN is not set
|
||||
# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
|
||||
CONFIG_INPUT_EVDEV=m
|
||||
|
@ -91,21 +99,6 @@ CONFIG_SPI_MXS=y
|
|||
CONFIG_DEBUG_GPIO=y
|
||||
CONFIG_GPIO_SYSFS=y
|
||||
# CONFIG_HWMON is not set
|
||||
# CONFIG_MFD_SUPPORT is not set
|
||||
CONFIG_DISPLAY_SUPPORT=m
|
||||
# CONFIG_HID_SUPPORT is not set
|
||||
CONFIG_SOUND=y
|
||||
CONFIG_SND=y
|
||||
CONFIG_SND_TIMER=y
|
||||
CONFIG_SND_PCM=y
|
||||
CONFIG_SND_JACK=y
|
||||
CONFIG_SND_DRIVERS=y
|
||||
CONFIG_SND_ARM=y
|
||||
CONFIG_SND_SOC=y
|
||||
CONFIG_SND_MXS_SOC=y
|
||||
CONFIG_SND_SOC_MXS_SGTL5000=y
|
||||
CONFIG_SND_SOC_I2C_AND_SPI=y
|
||||
CONFIG_SND_SOC_SGTL5000=y
|
||||
CONFIG_REGULATOR=y
|
||||
CONFIG_REGULATOR_FIXED_VOLTAGE=y
|
||||
CONFIG_FB=y
|
||||
|
@ -117,13 +110,16 @@ CONFIG_BACKLIGHT_PWM=y
|
|||
CONFIG_FRAMEBUFFER_CONSOLE=y
|
||||
CONFIG_FONTS=y
|
||||
CONFIG_LOGO=y
|
||||
CONFIG_SOUND=y
|
||||
CONFIG_SND=y
|
||||
CONFIG_SND_SOC=y
|
||||
CONFIG_SND_MXS_SOC=y
|
||||
CONFIG_SND_SOC_MXS_SGTL5000=y
|
||||
CONFIG_USB=y
|
||||
CONFIG_USB_CHIPIDEA=y
|
||||
CONFIG_USB_CHIPIDEA_HOST=y
|
||||
CONFIG_USB_STORAGE=y
|
||||
CONFIG_USB_MXS_PHY=y
|
||||
CONFIG_SCSI=y
|
||||
CONFIG_BLK_DEV_SD=y
|
||||
CONFIG_MMC=y
|
||||
CONFIG_MMC_MXS=y
|
||||
CONFIG_NEW_LEDS=y
|
||||
|
@ -147,16 +143,23 @@ CONFIG_COMMON_CLK_DEBUG=y
|
|||
CONFIG_IIO=y
|
||||
CONFIG_PWM=y
|
||||
CONFIG_PWM_MXS=y
|
||||
CONFIG_EXT2_FS=y
|
||||
CONFIG_EXT2_FS_XATTR=y
|
||||
CONFIG_EXT3_FS=y
|
||||
CONFIG_EXT4_FS=y
|
||||
# CONFIG_DNOTIFY is not set
|
||||
CONFIG_FSCACHE=m
|
||||
CONFIG_FSCACHE_STATS=y
|
||||
CONFIG_CACHEFILES=m
|
||||
CONFIG_TMPFS=y
|
||||
CONFIG_TMPFS_POSIX_ACL=y
|
||||
# CONFIG_MISC_FILESYSTEMS is not set
|
||||
CONFIG_JFFS2_FS=y
|
||||
CONFIG_JFFS2_COMPRESSION_OPTIONS=y
|
||||
CONFIG_JFFS2_LZO=y
|
||||
CONFIG_JFFS2_RUBIN=y
|
||||
CONFIG_UBIFS_FS=y
|
||||
CONFIG_UBIFS_FS_ADVANCED_COMPR=y
|
||||
CONFIG_NFS_FS=y
|
||||
CONFIG_NFS_V3=y
|
||||
CONFIG_NFS_V3_ACL=y
|
||||
CONFIG_NFS_V4=y
|
||||
CONFIG_ROOT_NFS=y
|
||||
|
@ -170,17 +173,12 @@ CONFIG_MAGIC_SYSRQ=y
|
|||
CONFIG_UNUSED_SYMBOLS=y
|
||||
CONFIG_DEBUG_KERNEL=y
|
||||
CONFIG_LOCKUP_DETECTOR=y
|
||||
CONFIG_DETECT_HUNG_TASK=y
|
||||
CONFIG_TIMER_STATS=y
|
||||
CONFIG_PROVE_LOCKING=y
|
||||
CONFIG_DEBUG_SPINLOCK_SLEEP=y
|
||||
CONFIG_DEBUG_INFO=y
|
||||
CONFIG_SYSCTL_SYSCALL_CHECK=y
|
||||
CONFIG_BLK_DEV_IO_TRACE=y
|
||||
CONFIG_STRICT_DEVMEM=y
|
||||
CONFIG_DEBUG_USER=y
|
||||
CONFIG_CRYPTO=y
|
||||
CONFIG_CRYPTO_CRC32C=m
|
||||
# CONFIG_CRYPTO_ANSI_CPRNG is not set
|
||||
# CONFIG_CRYPTO_HW is not set
|
||||
CONFIG_CRC_ITU_T=m
|
||||
|
|
|
@ -72,8 +72,9 @@
|
|||
#define BM_TIMROT_TIMCTRLn_IRQ_EN (1 << 14)
|
||||
#define BM_TIMROT_TIMCTRLn_IRQ (1 << 15)
|
||||
#define BP_TIMROT_TIMCTRLn_SELECT 0
|
||||
#define BV_TIMROTv1_TIMCTRLn_SELECT__32KHZ_XTAL 0x8
|
||||
#define BV_TIMROTv2_TIMCTRLn_SELECT__32KHZ_XTAL 0xb
|
||||
#define BV_TIMROTv1_TIMCTRLn_SELECT__32KHZ_XTAL 0x8
|
||||
#define BV_TIMROTv2_TIMCTRLn_SELECT__32KHZ_XTAL 0xb
|
||||
#define BV_TIMROTv2_TIMCTRLn_SELECT__TICK_ALWAYS 0xf
|
||||
|
||||
static struct clock_event_device mxs_clockevent_device;
|
||||
static enum clock_event_mode mxs_clockevent_mode = CLOCK_EVT_MODE_UNUSED;
|
||||
|
@ -206,7 +207,8 @@ static int __init mxs_clockevent_init(struct clk *timer_clk)
|
|||
mxs_clockevent_device.set_next_event = timrotv1_set_next_event;
|
||||
mxs_clockevent_device.cpumask = cpumask_of(0);
|
||||
clockevents_config_and_register(&mxs_clockevent_device,
|
||||
clk_get_rate(timer_clk), 0xf,
|
||||
clk_get_rate(timer_clk),
|
||||
timrot_is_v1() ? 0xf : 0x2,
|
||||
timrot_is_v1() ? 0xfffe : 0xfffffffe);
|
||||
|
||||
return 0;
|
||||
|
@ -274,7 +276,7 @@ void __init mxs_timer_init(void)
|
|||
/* one for clock_event */
|
||||
__raw_writel((timrot_is_v1() ?
|
||||
BV_TIMROTv1_TIMCTRLn_SELECT__32KHZ_XTAL :
|
||||
BV_TIMROTv2_TIMCTRLn_SELECT__32KHZ_XTAL) |
|
||||
BV_TIMROTv2_TIMCTRLn_SELECT__TICK_ALWAYS) |
|
||||
BM_TIMROT_TIMCTRLn_UPDATE |
|
||||
BM_TIMROT_TIMCTRLn_IRQ_EN,
|
||||
mxs_timrot_base + HW_TIMROT_TIMCTRLn(0));
|
||||
|
@ -282,7 +284,7 @@ void __init mxs_timer_init(void)
|
|||
/* another for clocksource */
|
||||
__raw_writel((timrot_is_v1() ?
|
||||
BV_TIMROTv1_TIMCTRLn_SELECT__32KHZ_XTAL :
|
||||
BV_TIMROTv2_TIMCTRLn_SELECT__32KHZ_XTAL) |
|
||||
BV_TIMROTv2_TIMCTRLn_SELECT__TICK_ALWAYS) |
|
||||
BM_TIMROT_TIMCTRLn_RELOAD,
|
||||
mxs_timrot_base + HW_TIMROT_TIMCTRLn(1));
|
||||
|
||||
|
|
|
@ -238,7 +238,7 @@ int __init mx28_clocks_init(void)
|
|||
of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data);
|
||||
}
|
||||
|
||||
clk_register_clkdev(clks[clk32k], NULL, "timrot");
|
||||
clk_register_clkdev(clks[xbus], NULL, "timrot");
|
||||
clk_register_clkdev(clks[enet_out], NULL, "enet_out");
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(clks_init_on); i++)
|
||||
|
|
Загрузка…
Ссылка в новой задаче