mISDN: Add different different timer settings for hfc-pci
- Poll-timer can now be set from 8 to 256 samples, depending on your kernel.
- If default or 128 is used, the normal controller's clock is used as before.
Usage: modprobe hfcpci poll=XXX
- Added some debug code for dsp buffer size. (CMX_DELAY_DEBUG)
Signed-off-by: Andreas Eversberg <andreas@eversberg.eu>
Signed-off-by: Karsten Keil <kkeil@suse.de>
This commit is contained in:
Andreas Eversberg
Karsten Keil
Родитель
1b36c78f26
Коммит
87c5fa1bb4
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@ -26,7 +26,6 @@
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* change mask and threshold simultaneously
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*/
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#define HFCPCI_BTRANS_THRESHOLD 128
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#define HFCPCI_BTRANS_MAX 256
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#define HFCPCI_FILLEMPTY 64
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#define HFCPCI_BTRANS_THRESMASK 0x00
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@ -23,6 +23,25 @@
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*
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* Module options:
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*
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* debug:
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* NOTE: only one poll value must be given for all cards
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* See hfc_pci.h for debug flags.
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*
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* poll:
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* NOTE: only one poll value must be given for all cards
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* Give the number of samples for each fifo process.
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* By default 128 is used. Decrease to reduce delay, increase to
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* reduce cpu load. If unsure, don't mess with it!
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* A value of 128 will use controller's interrupt. Other values will
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* use kernel timer, because the controller will not allow lower values
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* than 128.
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* Also note that the value depends on the kernel timer frequency.
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* If kernel uses a frequency of 1000 Hz, steps of 8 samples are possible.
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* If the kernel uses 100 Hz, steps of 80 samples are possible.
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* If the kernel uses 300 Hz, steps of about 26 samples are possible.
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*
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*/
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#include <linux/module.h>
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@ -36,10 +55,14 @@ static const char *hfcpci_revision = "2.0";
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static int HFC_cnt;
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static uint debug;
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static uint poll, tics;
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struct timer_list hfc_tl;
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u32 hfc_jiffies;
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MODULE_AUTHOR("Karsten Keil");
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MODULE_LICENSE("GPL");
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module_param(debug, uint, 0);
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module_param(poll, uint, S_IRUGO | S_IWUSR);
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static LIST_HEAD(HFClist);
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static DEFINE_RWLOCK(HFClock);
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@ -519,9 +542,9 @@ receive_dmsg(struct hfc_pci *hc)
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}
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/*
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* check for transparent receive data and read max one threshold size if avail
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* check for transparent receive data and read max one 'poll' size if avail
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*/
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static int
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static void
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hfcpci_empty_fifo_trans(struct bchannel *bch, struct bzfifo *bz, u_char *bdata)
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{
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__le16 *z1r, *z2r;
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@ -533,17 +556,19 @@ hfcpci_empty_fifo_trans(struct bchannel *bch, struct bzfifo *bz, u_char *bdata)
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fcnt = le16_to_cpu(*z1r) - le16_to_cpu(*z2r);
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if (!fcnt)
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return 0; /* no data avail */
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return; /* no data avail */
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if (fcnt <= 0)
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fcnt += B_FIFO_SIZE; /* bytes actually buffered */
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if (fcnt > HFCPCI_BTRANS_THRESHOLD)
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fcnt = HFCPCI_BTRANS_THRESHOLD; /* limit size */
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new_z2 = le16_to_cpu(*z2r) + fcnt; /* new position in fifo */
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if (new_z2 >= (B_FIFO_SIZE + B_SUB_VAL))
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new_z2 -= B_FIFO_SIZE; /* buffer wrap */
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if (fcnt > MAX_DATA_SIZE) { /* flush, if oversized */
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*z2r = cpu_to_le16(new_z2); /* new position */
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return;
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}
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bch->rx_skb = mI_alloc_skb(fcnt, GFP_ATOMIC);
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if (bch->rx_skb) {
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ptr = skb_put(bch->rx_skb, fcnt);
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@ -568,7 +593,6 @@ hfcpci_empty_fifo_trans(struct bchannel *bch, struct bzfifo *bz, u_char *bdata)
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printk(KERN_WARNING "HFCPCI: receive out of memory\n");
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*z2r = cpu_to_le16(new_z2); /* new position */
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return 1;
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}
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/*
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@ -579,12 +603,11 @@ main_rec_hfcpci(struct bchannel *bch)
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{
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struct hfc_pci *hc = bch->hw;
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int rcnt, real_fifo;
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int receive, count = 5;
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int receive = 0, count = 5;
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struct bzfifo *bz;
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u_char *bdata;
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struct zt *zp;
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if ((bch->nr & 2) && (!hc->hw.bswapped)) {
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bz = &((union fifo_area *)(hc->hw.fifos))->b_chans.rxbz_b2;
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bdata = ((union fifo_area *)(hc->hw.fifos))->b_chans.rxdat_b2;
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@ -624,9 +647,10 @@ Begin:
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receive = 1;
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else
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receive = 0;
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} else if (test_bit(FLG_TRANSPARENT, &bch->Flags))
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receive = hfcpci_empty_fifo_trans(bch, bz, bdata);
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else
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} else if (test_bit(FLG_TRANSPARENT, &bch->Flags)) {
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hfcpci_empty_fifo_trans(bch, bz, bdata);
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return;
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} else
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receive = 0;
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if (count && receive)
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goto Begin;
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@ -782,9 +806,9 @@ hfcpci_fill_fifo(struct bchannel *bch)
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next_t_frame:
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count = bch->tx_skb->len - bch->tx_idx;
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/* maximum fill shall be HFCPCI_BTRANS_MAX */
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if (count > HFCPCI_BTRANS_MAX - fcnt)
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count = HFCPCI_BTRANS_MAX - fcnt;
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/* maximum fill shall be poll*2 */
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if (count > (poll << 1) - fcnt)
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count = (poll << 1) - fcnt;
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if (count <= 0)
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return;
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/* data is suitable for fifo */
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@ -1164,37 +1188,37 @@ hfcpci_int(int intno, void *dev_id)
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val &= ~0x80;
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Write_hfc(hc, HFCPCI_CTMT, hc->hw.ctmt | HFCPCI_CLTIMER);
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}
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if (val & 0x08) {
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if (val & 0x08) { /* B1 rx */
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bch = Sel_BCS(hc, hc->hw.bswapped ? 2 : 1);
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if (bch)
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main_rec_hfcpci(bch);
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else if (hc->dch.debug)
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printk(KERN_DEBUG "hfcpci spurious 0x08 IRQ\n");
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}
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if (val & 0x10) {
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if (val & 0x10) { /* B2 rx */
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bch = Sel_BCS(hc, 2);
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if (bch)
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main_rec_hfcpci(bch);
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else if (hc->dch.debug)
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printk(KERN_DEBUG "hfcpci spurious 0x10 IRQ\n");
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}
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if (val & 0x01) {
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if (val & 0x01) { /* B1 tx */
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bch = Sel_BCS(hc, hc->hw.bswapped ? 2 : 1);
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if (bch)
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tx_birq(bch);
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else if (hc->dch.debug)
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printk(KERN_DEBUG "hfcpci spurious 0x01 IRQ\n");
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}
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if (val & 0x02) {
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if (val & 0x02) { /* B2 tx */
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bch = Sel_BCS(hc, 2);
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if (bch)
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tx_birq(bch);
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else if (hc->dch.debug)
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printk(KERN_DEBUG "hfcpci spurious 0x02 IRQ\n");
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}
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if (val & 0x20)
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if (val & 0x20) /* D rx */
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receive_dmsg(hc);
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if (val & 0x04) { /* dframe transmitted */
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if (val & 0x04) { /* D tx */
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if (test_and_clear_bit(FLG_BUSY_TIMER, &hc->dch.Flags))
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del_timer(&hc->dch.timer);
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tx_dirq(&hc->dch);
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@ -1203,6 +1227,41 @@ hfcpci_int(int intno, void *dev_id)
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return IRQ_HANDLED;
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}
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static void
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hfcpci_softirq(void *arg)
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{
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u_long flags;
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struct bchannel *bch;
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struct hfc_pci *hc;
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write_lock_irqsave(&HFClock, flags);
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list_for_each_entry(hc, &HFClist, list) {
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if (hc->hw.int_m2 & HFCPCI_IRQ_ENABLE) {
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spin_lock(&hc->lock);
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bch = Sel_BCS(hc, hc->hw.bswapped ? 2 : 1);
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if (bch && bch->state == ISDN_P_B_RAW) { /* B1 rx&tx */
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main_rec_hfcpci(bch);
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tx_birq(bch);
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}
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bch = Sel_BCS(hc, hc->hw.bswapped ? 1 : 2);
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if (bch && bch->state == ISDN_P_B_RAW) { /* B2 rx&tx */
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main_rec_hfcpci(bch);
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tx_birq(bch);
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}
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spin_unlock(&hc->lock);
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}
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}
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write_unlock_irqrestore(&HFClock, flags);
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/* if next event would be in the past ... */
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if ((s32)(hfc_jiffies + tics - jiffies) <= 0)
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hfc_jiffies = jiffies + 1;
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else
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hfc_jiffies += tics;
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hfc_tl.expires = hfc_jiffies;
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add_timer(&hfc_tl);
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}
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/*
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* timer callback for D-chan busy resolution. Currently no function
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*/
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@ -1312,12 +1371,14 @@ mode_hfcpci(struct bchannel *bch, int bc, int protocol)
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}
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if (fifo2 & 2) {
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hc->hw.fifo_en |= HFCPCI_FIFOEN_B2;
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if (!tics)
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hc->hw.int_m1 |= (HFCPCI_INTS_B2TRANS +
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HFCPCI_INTS_B2REC);
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hc->hw.ctmt |= 2;
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hc->hw.conn &= ~0x18;
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} else {
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hc->hw.fifo_en |= HFCPCI_FIFOEN_B1;
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if (!tics)
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hc->hw.int_m1 |= (HFCPCI_INTS_B1TRANS +
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HFCPCI_INTS_B1REC);
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hc->hw.ctmt |= 1;
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@ -1427,6 +1488,7 @@ set_hfcpci_rxtest(struct bchannel *bch, int protocol, int chan)
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if (chan & 2) {
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hc->hw.sctrl_r |= SCTRL_B2_ENA;
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hc->hw.fifo_en |= HFCPCI_FIFOEN_B2RX;
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if (!tics)
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hc->hw.int_m1 |= HFCPCI_INTS_B2REC;
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hc->hw.ctmt |= 2;
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hc->hw.conn &= ~0x18;
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@ -1436,6 +1498,7 @@ set_hfcpci_rxtest(struct bchannel *bch, int protocol, int chan)
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} else {
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hc->hw.sctrl_r |= SCTRL_B1_ENA;
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hc->hw.fifo_en |= HFCPCI_FIFOEN_B1RX;
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if (!tics)
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hc->hw.int_m1 |= HFCPCI_INTS_B1REC;
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hc->hw.ctmt |= 1;
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hc->hw.conn &= ~0x03;
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@ -2273,7 +2336,39 @@ HFC_init(void)
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{
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int err;
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if (!poll)
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poll = HFCPCI_BTRANS_THRESHOLD;
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if (poll != HFCPCI_BTRANS_THRESHOLD) {
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tics = poll * HZ / 8000;
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if (tics < 1)
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tics = 1;
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poll = tics * 8000 / HZ;
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if (poll > 256 || poll < 8) {
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printk(KERN_ERR "%s: Wrong poll value %d not in range "
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"of 8..256.\n", __func__, poll);
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err = -EINVAL;
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return err;
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}
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}
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if (poll != HFCPCI_BTRANS_THRESHOLD) {
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printk(KERN_INFO "%s: Using alternative poll value of %d\n",
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__func__, poll);
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hfc_tl.function = (void *)hfcpci_softirq;
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hfc_tl.data = 0;
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init_timer(&hfc_tl);
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hfc_tl.expires = jiffies + tics;
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hfc_jiffies = hfc_tl.expires;
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add_timer(&hfc_tl);
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} else
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tics = 0; /* indicate the use of controller's timer */
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err = pci_register_driver(&hfc_driver);
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if (err) {
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if (timer_pending(&hfc_tl))
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del_timer(&hfc_tl);
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}
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return err;
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}
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@ -2282,6 +2377,9 @@ HFC_cleanup(void)
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{
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struct hfc_pci *card, *next;
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if (timer_pending(&hfc_tl))
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del_timer(&hfc_tl);
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list_for_each_entry_safe(card, next, &HFClist, list) {
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release_card(card);
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}
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@ -137,6 +137,7 @@
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/* #define CMX_CONF_DEBUG */
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/*#define CMX_DEBUG * massive read/write pointer output */
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/*#define CMX_DELAY_DEBUG * gives rx-buffer delay overview */
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/*#define CMX_TX_DEBUG * massive read/write on tx-buffer with content */
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static inline int
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@ -1135,6 +1136,25 @@ dsp_cmx_conf(struct dsp *dsp, u32 conf_id)
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return 0;
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}
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#ifdef CMX_DELAY_DEBUG
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int delaycount;
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static void
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showdelay(struct dsp *dsp, int samples, int delay)
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{
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char bar[] = "--------------------------------------------------|";
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int sdelay;
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delaycount += samples;
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if (delaycount < 8000)
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return;
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delaycount = 0;
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sdelay = delay * 50 / (dsp_poll << 2);
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printk(KERN_DEBUG "DELAY (%s) %3d >%s\n", dsp->name, delay,
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sdelay > 50 ? "..." : bar + 50 - sdelay);
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}
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#endif
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/*
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* audio data is received from card
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@ -1256,6 +1276,9 @@ dsp_cmx_receive(struct dsp *dsp, struct sk_buff *skb)
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/* increase write-pointer */
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dsp->rx_W = ((dsp->rx_W+len) & CMX_BUFF_MASK);
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#ifdef CMX_DELAY_DEBUG
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showdelay(dsp, len, (dsp->rx_W-dsp->rx_R) & CMX_BUFF_MASK);
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#endif
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}
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