[BNX2]: Print bus information for PCIE devices.
Fix the code to print PCI or PCIE bus information for all devices. Signed-off-by: Michael Chan <mchan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Michael Chan
David S. Miller
Родитель
8e6a72c435
Коммит
883e515118
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@ -6040,6 +6040,58 @@ bnx2_get_5709_media(struct bnx2 *bp)
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}
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}
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static void __devinit
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bnx2_get_pci_speed(struct bnx2 *bp)
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{
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u32 reg;
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reg = REG_RD(bp, BNX2_PCICFG_MISC_STATUS);
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if (reg & BNX2_PCICFG_MISC_STATUS_PCIX_DET) {
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u32 clkreg;
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bp->flags |= PCIX_FLAG;
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clkreg = REG_RD(bp, BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS);
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clkreg &= BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET;
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switch (clkreg) {
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case BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_133MHZ:
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bp->bus_speed_mhz = 133;
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break;
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case BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_95MHZ:
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bp->bus_speed_mhz = 100;
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break;
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case BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_66MHZ:
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case BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_80MHZ:
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bp->bus_speed_mhz = 66;
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break;
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case BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_48MHZ:
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case BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_55MHZ:
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bp->bus_speed_mhz = 50;
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break;
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case BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_LOW:
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case BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_32MHZ:
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case BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_38MHZ:
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bp->bus_speed_mhz = 33;
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break;
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}
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}
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else {
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if (reg & BNX2_PCICFG_MISC_STATUS_M66EN)
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bp->bus_speed_mhz = 66;
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else
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bp->bus_speed_mhz = 33;
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}
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if (reg & BNX2_PCICFG_MISC_STATUS_32BIT_DET)
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bp->flags |= PCI_32BIT_FLAG;
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}
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static int __devinit
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bnx2_init_board(struct pci_dev *pdev, struct net_device *dev)
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{
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@ -6118,7 +6170,15 @@ bnx2_init_board(struct pci_dev *pdev, struct net_device *dev)
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bp->chip_id = REG_RD(bp, BNX2_MISC_ID);
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if (CHIP_NUM(bp) != CHIP_NUM_5709) {
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if (CHIP_NUM(bp) == CHIP_NUM_5709) {
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if (pci_find_capability(pdev, PCI_CAP_ID_EXP) == 0) {
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dev_err(&pdev->dev,
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"Cannot find PCIE capability, aborting.\n");
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rc = -EIO;
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goto err_out_unmap;
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}
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bp->flags |= PCIE_FLAG;
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} else {
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bp->pcix_cap = pci_find_capability(pdev, PCI_CAP_ID_PCIX);
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if (bp->pcix_cap == 0) {
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dev_err(&pdev->dev,
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@ -6153,51 +6213,8 @@ bnx2_init_board(struct pci_dev *pdev, struct net_device *dev)
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goto err_out_unmap;
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}
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/* Get bus information. */
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reg = REG_RD(bp, BNX2_PCICFG_MISC_STATUS);
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if (reg & BNX2_PCICFG_MISC_STATUS_PCIX_DET) {
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u32 clkreg;
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bp->flags |= PCIX_FLAG;
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clkreg = REG_RD(bp, BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS);
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clkreg &= BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET;
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switch (clkreg) {
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case BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_133MHZ:
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bp->bus_speed_mhz = 133;
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break;
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case BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_95MHZ:
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bp->bus_speed_mhz = 100;
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break;
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case BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_66MHZ:
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case BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_80MHZ:
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bp->bus_speed_mhz = 66;
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break;
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case BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_48MHZ:
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case BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_55MHZ:
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bp->bus_speed_mhz = 50;
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break;
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case BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_LOW:
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case BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_32MHZ:
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case BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_38MHZ:
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bp->bus_speed_mhz = 33;
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break;
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}
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}
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else {
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if (reg & BNX2_PCICFG_MISC_STATUS_M66EN)
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bp->bus_speed_mhz = 66;
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else
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bp->bus_speed_mhz = 33;
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}
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if (reg & BNX2_PCICFG_MISC_STATUS_32BIT_DET)
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bp->flags |= PCI_32BIT_FLAG;
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if (!(bp->flags & PCIE_FLAG))
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bnx2_get_pci_speed(bp);
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/* 5706A0 may falsely detect SERR and PERR. */
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if (CHIP_ID(bp) == CHIP_ID_5706_A0) {
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@ -6381,6 +6398,26 @@ err_out:
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return rc;
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}
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static char * __devinit
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bnx2_bus_string(struct bnx2 *bp, char *str)
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{
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char *s = str;
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if (bp->flags & PCIE_FLAG) {
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s += sprintf(s, "PCI Express");
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} else {
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s += sprintf(s, "PCI");
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if (bp->flags & PCIX_FLAG)
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s += sprintf(s, "-X");
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if (bp->flags & PCI_32BIT_FLAG)
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s += sprintf(s, " 32-bit");
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else
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s += sprintf(s, " 64-bit");
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s += sprintf(s, " %dMHz", bp->bus_speed_mhz);
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}
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return str;
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}
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static int __devinit
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bnx2_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
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{
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@ -6388,6 +6425,7 @@ bnx2_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
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struct net_device *dev = NULL;
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struct bnx2 *bp;
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int rc, i;
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char str[40];
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if (version_printed++ == 0)
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printk(KERN_INFO "%s", version);
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@ -6456,15 +6494,13 @@ bnx2_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
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return rc;
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}
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printk(KERN_INFO "%s: %s (%c%d) PCI%s %s %dMHz found at mem %lx, "
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printk(KERN_INFO "%s: %s (%c%d) %s found at mem %lx, "
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"IRQ %d, ",
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dev->name,
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bp->name,
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((CHIP_ID(bp) & 0xf000) >> 12) + 'A',
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((CHIP_ID(bp) & 0x0ff0) >> 4),
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((bp->flags & PCIX_FLAG) ? "-X" : ""),
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((bp->flags & PCI_32BIT_FLAG) ? "32-bit" : "64-bit"),
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bp->bus_speed_mhz,
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bnx2_bus_string(bp, str),
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dev->base_addr,
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bp->pdev->irq);
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@ -6476,6 +6476,7 @@ struct bnx2 {
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#define ASF_ENABLE_FLAG 0x00000040
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#define MSI_CAP_FLAG 0x00000080
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#define ONE_SHOT_MSI_FLAG 0x00000100
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#define PCIE_FLAG 0x00000200
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/* Put tx producer and consumer fields in separate cache lines. */
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