ARM: OMAP: mcbsp: Make tranceiver configuration control register access generic
McBSP transmit and receive configuration control registers must be set up for OMAP2430 and later. Replace is_omap tests in generic code with a new feature flag has_ccr in platform data so that there is no need to change code for any upcoming OMAP version. Signed-off-by: Jarkko Nikula <jarkko.nikula@bitmer.com> Acked-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Tested-by: Janusz Krzysztofik <jkrzyszt@tis.icnet.pl> Signed-off-by: Tony Lindgren <tony@atomide.com>
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1a6458847d
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88408230d2
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@ -127,10 +127,12 @@ static int omap_init_mcbsp(struct omap_hwmod *oh, void *unused)
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}
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pdata->reg_step = 4;
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if (oh->class->rev < MCBSP_CONFIG_TYPE2)
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if (oh->class->rev < MCBSP_CONFIG_TYPE2) {
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pdata->reg_size = 2;
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else
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} else {
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pdata->reg_size = 4;
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pdata->has_ccr = true;
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}
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if (oh->class->rev == MCBSP_CONFIG_TYPE3) {
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if (id == 2)
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@ -320,6 +320,7 @@ struct omap_mcbsp_platform_data {
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/* McBSP platform and instance specific features */
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bool has_wakeup; /* Wakeup capability */
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bool has_ccr; /* Transceiver has configuration control registers */
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};
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struct omap_mcbsp_st_data {
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@ -184,7 +184,7 @@ void omap_mcbsp_config(unsigned int id, const struct omap_mcbsp_reg_cfg *config)
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MCBSP_WRITE(mcbsp, MCR2, config->mcr2);
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MCBSP_WRITE(mcbsp, MCR1, config->mcr1);
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MCBSP_WRITE(mcbsp, PCR0, config->pcr0);
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if (cpu_is_omap2430() || cpu_is_omap34xx() || cpu_is_omap44xx()) {
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if (mcbsp->pdata->has_ccr) {
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MCBSP_WRITE(mcbsp, XCCR, config->xccr);
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MCBSP_WRITE(mcbsp, RCCR, config->rccr);
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}
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@ -848,7 +848,7 @@ void omap_mcbsp_start(unsigned int id, int tx, int rx)
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MCBSP_WRITE(mcbsp, SPCR2, w | (1 << 7));
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}
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if (cpu_is_omap2430() || cpu_is_omap34xx() || cpu_is_omap44xx()) {
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if (mcbsp->pdata->has_ccr) {
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/* Release the transmitter and receiver */
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w = MCBSP_READ_CACHE(mcbsp, XCCR);
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w &= ~(tx ? XDISABLE : 0);
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@ -878,7 +878,7 @@ void omap_mcbsp_stop(unsigned int id, int tx, int rx)
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/* Reset transmitter */
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tx &= 1;
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if (cpu_is_omap2430() || cpu_is_omap34xx() || cpu_is_omap44xx()) {
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if (mcbsp->pdata->has_ccr) {
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w = MCBSP_READ_CACHE(mcbsp, XCCR);
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w |= (tx ? XDISABLE : 0);
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MCBSP_WRITE(mcbsp, XCCR, w);
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@ -888,7 +888,7 @@ void omap_mcbsp_stop(unsigned int id, int tx, int rx)
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/* Reset receiver */
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rx &= 1;
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if (cpu_is_omap2430() || cpu_is_omap34xx() || cpu_is_omap44xx()) {
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if (mcbsp->pdata->has_ccr) {
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w = MCBSP_READ_CACHE(mcbsp, RCCR);
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w |= (rx ? RDISABLE : 0);
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MCBSP_WRITE(mcbsp, RCCR, w);
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