starfire: trivial endianness annotations
Note: we still have several fishy areas - mcast filter and vlan handling. Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Jeff Garzik <jeff@garzik.org>
This commit is contained in:
Al Viro
David S. Miller
Родитель
37e1370b70
Коммит
88b1943bd3
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@ -155,7 +155,7 @@ static int full_duplex[MAX_UNITS] = {0, };
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#if (defined(__i386__) && defined(CONFIG_HIGHMEM64G)) || defined(__x86_64__) || defined (__ia64__) || defined(__alpha__) || defined(__mips64__) || (defined(__mips__) && defined(CONFIG_HIGHMEM) && defined(CONFIG_64BIT_PHYS_ADDR))
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/* 64-bit dma_addr_t */
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#define ADDR_64BITS /* This chip uses 64 bit addresses. */
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#define netdrv_addr_t u64
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#define netdrv_addr_t __le64
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#define cpu_to_dma(x) cpu_to_le64(x)
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#define dma_to_cpu(x) le64_to_cpu(x)
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#define RX_DESC_Q_ADDR_SIZE RxDescQAddr64bit
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@ -164,7 +164,7 @@ static int full_duplex[MAX_UNITS] = {0, };
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#define TX_COMPL_Q_ADDR_SIZE TxComplQAddr64bit
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#define RX_DESC_ADDR_SIZE RxDescAddr64bit
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#else /* 32-bit dma_addr_t */
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#define netdrv_addr_t u32
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#define netdrv_addr_t __le32
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#define cpu_to_dma(x) cpu_to_le32(x)
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#define dma_to_cpu(x) le32_to_cpu(x)
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#define RX_DESC_Q_ADDR_SIZE RxDescQAddr32bit
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@ -494,7 +494,7 @@ enum intr_ctrl_bits {
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/* The Rx and Tx buffer descriptors. */
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struct starfire_rx_desc {
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dma_addr_t rxaddr;
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netdrv_addr_t rxaddr;
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};
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enum rx_desc_bits {
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RxDescValid=1, RxDescEndRing=2,
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@ -502,25 +502,25 @@ enum rx_desc_bits {
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/* Completion queue entry. */
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struct short_rx_done_desc {
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u32 status; /* Low 16 bits is length. */
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__le32 status; /* Low 16 bits is length. */
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};
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struct basic_rx_done_desc {
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u32 status; /* Low 16 bits is length. */
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u16 vlanid;
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u16 status2;
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__le32 status; /* Low 16 bits is length. */
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__le16 vlanid;
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__le16 status2;
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};
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struct csum_rx_done_desc {
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u32 status; /* Low 16 bits is length. */
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u16 csum; /* Partial checksum */
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u16 status2;
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__le32 status; /* Low 16 bits is length. */
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__le16 csum; /* Partial checksum */
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__le16 status2;
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};
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struct full_rx_done_desc {
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u32 status; /* Low 16 bits is length. */
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u16 status3;
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u16 status2;
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u16 vlanid;
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u16 csum; /* partial checksum */
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u32 timestamp;
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__le32 status; /* Low 16 bits is length. */
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__le16 status3;
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__le16 status2;
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__le16 vlanid;
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__le16 csum; /* partial checksum */
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__le32 timestamp;
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};
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/* XXX: this is ugly and I'm not sure it's worth the trouble -Ion */
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#ifdef VLAN_SUPPORT
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@ -537,15 +537,15 @@ enum rx_done_bits {
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/* Type 1 Tx descriptor. */
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struct starfire_tx_desc_1 {
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u32 status; /* Upper bits are status, lower 16 length. */
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u32 addr;
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__le32 status; /* Upper bits are status, lower 16 length. */
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__le32 addr;
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};
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/* Type 2 Tx descriptor. */
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struct starfire_tx_desc_2 {
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u32 status; /* Upper bits are status, lower 16 length. */
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u32 reserved;
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u64 addr;
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__le32 status; /* Upper bits are status, lower 16 length. */
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__le32 reserved;
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__le64 addr;
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};
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#ifdef ADDR_64BITS
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@ -563,9 +563,9 @@ enum tx_desc_bits {
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TxRingWrap=0x04000000, TxCalTCP=0x02000000,
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};
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struct tx_done_desc {
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u32 status; /* timestamp, index. */
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__le32 status; /* timestamp, index. */
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#if 0
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u32 intrstatus; /* interrupt status */
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__le32 intrstatus; /* interrupt status */
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#endif
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};
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@ -963,7 +963,7 @@ static int netdev_open(struct net_device *dev)
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dev->name, dev->irq);
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/* Allocate the various queues. */
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if (np->queue_mem == 0) {
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if (!np->queue_mem) {
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tx_done_q_size = ((sizeof(struct tx_done_desc) * DONE_Q_SIZE + QUEUE_ALIGN - 1) / QUEUE_ALIGN) * QUEUE_ALIGN;
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rx_done_q_size = ((sizeof(rx_done_desc) * DONE_Q_SIZE + QUEUE_ALIGN - 1) / QUEUE_ALIGN) * QUEUE_ALIGN;
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tx_ring_size = ((sizeof(starfire_tx_desc) * TX_RING_SIZE + QUEUE_ALIGN - 1) / QUEUE_ALIGN) * QUEUE_ALIGN;
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@ -1036,11 +1036,11 @@ static int netdev_open(struct net_device *dev)
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writew(0, ioaddr + PerfFilterTable + 4);
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writew(0, ioaddr + PerfFilterTable + 8);
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for (i = 1; i < 16; i++) {
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u16 *eaddrs = (u16 *)dev->dev_addr;
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__be16 *eaddrs = (__be16 *)dev->dev_addr;
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void __iomem *setup_frm = ioaddr + PerfFilterTable + i * 16;
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writew(cpu_to_be16(eaddrs[2]), setup_frm); setup_frm += 4;
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writew(cpu_to_be16(eaddrs[1]), setup_frm); setup_frm += 4;
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writew(cpu_to_be16(eaddrs[0]), setup_frm); setup_frm += 8;
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writew(be16_to_cpu(eaddrs[2]), setup_frm); setup_frm += 4;
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writew(be16_to_cpu(eaddrs[1]), setup_frm); setup_frm += 4;
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writew(be16_to_cpu(eaddrs[0]), setup_frm); setup_frm += 8;
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}
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/* Initialize other registers. */
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@ -1767,26 +1767,26 @@ static void set_rx_mode(struct net_device *dev)
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} else if (dev->mc_count <= 14) {
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/* Use the 16 element perfect filter, skip first two entries. */
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void __iomem *filter_addr = ioaddr + PerfFilterTable + 2 * 16;
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u16 *eaddrs;
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__be16 *eaddrs;
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for (i = 2, mclist = dev->mc_list; mclist && i < dev->mc_count + 2;
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i++, mclist = mclist->next) {
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eaddrs = (u16 *)mclist->dmi_addr;
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writew(cpu_to_be16(eaddrs[2]), filter_addr); filter_addr += 4;
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writew(cpu_to_be16(eaddrs[1]), filter_addr); filter_addr += 4;
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writew(cpu_to_be16(eaddrs[0]), filter_addr); filter_addr += 8;
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eaddrs = (__be16 *)mclist->dmi_addr;
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writew(be16_to_cpu(eaddrs[2]), filter_addr); filter_addr += 4;
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writew(be16_to_cpu(eaddrs[1]), filter_addr); filter_addr += 4;
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writew(be16_to_cpu(eaddrs[0]), filter_addr); filter_addr += 8;
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}
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eaddrs = (u16 *)dev->dev_addr;
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eaddrs = (__be16 *)dev->dev_addr;
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while (i++ < 16) {
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writew(cpu_to_be16(eaddrs[0]), filter_addr); filter_addr += 4;
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writew(cpu_to_be16(eaddrs[1]), filter_addr); filter_addr += 4;
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writew(cpu_to_be16(eaddrs[2]), filter_addr); filter_addr += 8;
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writew(be16_to_cpu(eaddrs[0]), filter_addr); filter_addr += 4;
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writew(be16_to_cpu(eaddrs[1]), filter_addr); filter_addr += 4;
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writew(be16_to_cpu(eaddrs[2]), filter_addr); filter_addr += 8;
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}
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rx_mode |= AcceptBroadcast|PerfectFilter;
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} else {
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/* Must use a multicast hash table. */
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void __iomem *filter_addr;
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u16 *eaddrs;
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u16 mc_filter[32] __attribute__ ((aligned(sizeof(long)))); /* Multicast hash filter */
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__be16 *eaddrs;
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__le16 mc_filter[32] __attribute__ ((aligned(sizeof(long)))); /* Multicast hash filter */
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memset(mc_filter, 0, sizeof(mc_filter));
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for (i = 0, mclist = dev->mc_list; mclist && i < dev->mc_count;
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@ -1794,17 +1794,17 @@ static void set_rx_mode(struct net_device *dev)
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/* The chip uses the upper 9 CRC bits
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as index into the hash table */
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int bit_nr = ether_crc_le(ETH_ALEN, mclist->dmi_addr) >> 23;
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__u32 *fptr = (__u32 *) &mc_filter[(bit_nr >> 4) & ~1];
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__le32 *fptr = (__le32 *) &mc_filter[(bit_nr >> 4) & ~1];
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*fptr |= cpu_to_le32(1 << (bit_nr & 31));
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}
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/* Clear the perfect filter list, skip first two entries. */
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filter_addr = ioaddr + PerfFilterTable + 2 * 16;
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eaddrs = (u16 *)dev->dev_addr;
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eaddrs = (__be16 *)dev->dev_addr;
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for (i = 2; i < 16; i++) {
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writew(cpu_to_be16(eaddrs[0]), filter_addr); filter_addr += 4;
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writew(cpu_to_be16(eaddrs[1]), filter_addr); filter_addr += 4;
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writew(cpu_to_be16(eaddrs[2]), filter_addr); filter_addr += 8;
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writew(be16_to_cpu(eaddrs[0]), filter_addr); filter_addr += 4;
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writew(be16_to_cpu(eaddrs[1]), filter_addr); filter_addr += 4;
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writew(be16_to_cpu(eaddrs[2]), filter_addr); filter_addr += 8;
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}
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for (filter_addr = ioaddr + HashTable, i = 0; i < 32; filter_addr+= 16, i++)
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writew(mc_filter[i], filter_addr);
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