ide: set/clear drive->waiting_for_dma flag in the core code
Set/clear drive->waiting_for_dma flag in the core code instead of in ->dma_setup and ->dma_end methods. There should be no functional changes caused by this patch. Acked-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
This commit is contained in:
Родитель
11998b3161
Коммит
88b4132e10
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@ -290,7 +290,6 @@ static int auide_dma_setup(ide_drive_t *drive, struct ide_cmd *cmd)
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if (auide_build_dmatable(drive, cmd) == 0)
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return 1;
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drive->waiting_for_dma = 1;
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return 0;
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}
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@ -315,16 +314,11 @@ static void auide_dma_host_set(ide_drive_t *drive, int on)
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static void auide_ddma_tx_callback(int irq, void *param)
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{
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_auide_hwif *ahwif = (_auide_hwif*)param;
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ahwif->drive->waiting_for_dma = 0;
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}
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static void auide_ddma_rx_callback(int irq, void *param)
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{
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_auide_hwif *ahwif = (_auide_hwif*)param;
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ahwif->drive->waiting_for_dma = 0;
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}
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#endif /* end CONFIG_BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA */
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static void auide_init_dbdma_dev(dbdev_tab_t *dev, u32 dev_id, u32 tsize, u32 devwidth, u32 flags)
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@ -318,7 +318,6 @@ static int cmd646_1_dma_end(ide_drive_t *drive)
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ide_hwif_t *hwif = drive->hwif;
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u8 dma_stat = 0, dma_cmd = 0;
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drive->waiting_for_dma = 0;
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/* get DMA status */
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dma_stat = inb(hwif->dma_base + ATA_DMA_STATUS);
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/* read DMA command state */
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@ -287,8 +287,6 @@ static int icside_dma_end(ide_drive_t *drive)
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ide_hwif_t *hwif = drive->hwif;
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struct expansion_card *ec = ECARD_DEV(hwif->dev);
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drive->waiting_for_dma = 0;
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disable_dma(ec->dma);
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return get_dma_residue(ec->dma) != 0;
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@ -343,8 +341,6 @@ static int icside_dma_setup(ide_drive_t *drive, struct ide_cmd *cmd)
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set_dma_sg(ec->dma, hwif->sg_table, cmd->sg_nents);
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set_dma_mode(ec->dma, dma_mode);
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drive->waiting_for_dma = 1;
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return 0;
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}
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@ -342,8 +342,10 @@ static ide_startstop_t ide_pc_intr(ide_drive_t *drive)
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stat = tp_ops->read_status(hwif);
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if (pc->flags & PC_FLAG_DMA_IN_PROGRESS) {
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int rc = hwif->dma_ops->dma_end(drive);
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int rc;
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drive->waiting_for_dma = 0;
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rc = hwif->dma_ops->dma_end(drive);
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ide_destroy_dmatable(drive);
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if (rc || (drive->media == ide_tape && (stat & ATA_ERR))) {
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@ -638,6 +638,7 @@ static ide_startstop_t cdrom_newpc_intr(ide_drive_t *drive)
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dma = drive->dma;
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if (dma) {
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drive->dma = 0;
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drive->waiting_for_dma = 0;
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dma_error = hwif->dma_ops->dma_end(drive);
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ide_destroy_dmatable(drive);
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if (dma_error) {
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@ -216,7 +216,6 @@ int ide_dma_setup(ide_drive_t *drive, struct ide_cmd *cmd)
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/* clear INTR & ERROR flags */
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ide_dma_sff_write_status(hwif, dma_stat | ATA_DMA_ERR | ATA_DMA_INTR);
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drive->waiting_for_dma = 1;
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return 0;
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}
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EXPORT_SYMBOL_GPL(ide_dma_setup);
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@ -290,8 +289,6 @@ int ide_dma_end(ide_drive_t *drive)
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ide_hwif_t *hwif = drive->hwif;
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u8 dma_stat = 0, dma_cmd = 0, mask;
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drive->waiting_for_dma = 0;
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/* stop DMA */
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if (hwif->host_flags & IDE_HFLAG_MMIO) {
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dma_cmd = readb((void __iomem *)(hwif->dma_base + ATA_DMA_CMD));
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@ -91,6 +91,7 @@ ide_startstop_t ide_dma_intr(ide_drive_t *drive)
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ide_hwif_t *hwif = drive->hwif;
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u8 stat = 0, dma_stat = 0;
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drive->waiting_for_dma = 0;
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dma_stat = hwif->dma_ops->dma_end(drive);
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ide_destroy_dmatable(drive);
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stat = hwif->tp_ops->read_status(hwif);
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@ -479,6 +480,7 @@ ide_startstop_t ide_dma_timeout_retry(ide_drive_t *drive, int error)
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if (error < 0) {
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printk(KERN_WARNING "%s: DMA timeout error\n", drive->name);
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drive->waiting_for_dma = 0;
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(void)dma_ops->dma_end(drive);
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ide_destroy_dmatable(drive);
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ret = ide_error(drive, "dma timeout error",
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@ -491,6 +493,7 @@ ide_startstop_t ide_dma_timeout_retry(ide_drive_t *drive, int error)
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if (dma_ops->dma_test_irq(drive) == 0) {
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ide_dump_status(drive, "DMA timeout",
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hwif->tp_ops->read_status(hwif));
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drive->waiting_for_dma = 0;
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(void)dma_ops->dma_end(drive);
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ide_destroy_dmatable(drive);
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}
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@ -577,5 +580,6 @@ int ide_dma_prepare(ide_drive_t *drive, struct ide_cmd *cmd)
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ide_map_sg(drive, cmd);
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return 1;
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}
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drive->waiting_for_dma = 1;
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return 0;
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}
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@ -207,7 +207,6 @@ static int ns87415_dma_end(ide_drive_t *drive)
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ide_hwif_t *hwif = drive->hwif;
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u8 dma_stat = 0, dma_cmd = 0;
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drive->waiting_for_dma = 0;
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dma_stat = hwif->dma_ops->dma_sff_read_status(hwif);
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/* get DMA command mode */
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dma_cmd = inb(hwif->dma_base + ATA_DMA_CMD);
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@ -1517,8 +1517,6 @@ static int pmac_ide_dma_setup(ide_drive_t *drive, struct ide_cmd *cmd)
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(void)readl(PMAC_IDE_REG(IDE_TIMING_CONFIG));
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}
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drive->waiting_for_dma = 1;
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return 0;
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}
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@ -1553,7 +1551,6 @@ pmac_ide_dma_end (ide_drive_t *drive)
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volatile struct dbdma_regs __iomem *dma = pmif->dma_regs;
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u32 dstat;
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drive->waiting_for_dma = 0;
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dstat = readl(&dma->status);
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writel(((RUN|WAKE|DEAD) << 16), &dma->control);
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@ -183,8 +183,6 @@ static int sc1200_dma_end(ide_drive_t *drive)
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outb(dma_stat|0x1b, dma_base+2); /* clear the INTR & ERROR bits */
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outb(inb(dma_base)&~1, dma_base); /* !! DO THIS HERE !! stop DMA */
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drive->waiting_for_dma = 0;
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return (dma_stat & 7) != 4; /* verify good DMA status */
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}
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@ -335,7 +335,7 @@ static int scc_dma_setup(ide_drive_t *drive, struct ide_cmd *cmd)
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/* clear INTR & ERROR flags */
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out_be32((void __iomem *)(hwif->dma_base + 4), dma_stat | 6);
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drive->waiting_for_dma = 1;
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return 0;
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}
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@ -354,7 +354,6 @@ static int __scc_dma_end(ide_drive_t *drive)
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ide_hwif_t *hwif = drive->hwif;
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u8 dma_stat, dma_cmd;
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drive->waiting_for_dma = 0;
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/* get DMA command mode */
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dma_cmd = scc_ide_inb(hwif->dma_base);
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/* stop DMA */
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@ -258,8 +258,6 @@ static int sgiioc4_dma_end(ide_drive_t *drive)
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}
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}
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drive->waiting_for_dma = 0;
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return dma_stat;
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}
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@ -412,7 +410,6 @@ sgiioc4_configure_for_dma(int dma_direction, ide_drive_t * drive)
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writel(ending_dma_addr, (void __iomem *)(dma_base + IOC4_DMA_END_ADDR * 4));
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writel(dma_direction, (void __iomem *)ioc4_dma_addr);
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drive->waiting_for_dma = 1;
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}
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/* IOC4 Scatter Gather list Format */
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@ -198,9 +198,9 @@ static int trm290_dma_setup(ide_drive_t *drive, struct ide_cmd *cmd)
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return 1;
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outl(hwif->dmatable_dma | rw, hwif->dma_base);
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drive->waiting_for_dma = 1;
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/* start DMA */
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outw(count * 2 - 1, hwif->dma_base + 2);
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return 0;
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}
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@ -211,11 +211,7 @@ static void trm290_dma_start(ide_drive_t *drive)
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static int trm290_dma_end(ide_drive_t *drive)
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{
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u16 status;
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drive->waiting_for_dma = 0;
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status = inw(drive->hwif->dma_base + 2);
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u16 status = inw(drive->hwif->dma_base + 2);
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trm290_prepare_drive(drive, 0);
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@ -304,8 +304,6 @@ static int tx4939ide_dma_setup(ide_drive_t *drive, struct ide_cmd *cmd)
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/* clear INTR & ERROR flags */
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tx4939ide_clear_dma_status(base);
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drive->waiting_for_dma = 1;
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tx4939ide_writew(SECTOR_SIZE / 2, base, drive->dn ?
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TX4939IDE_Xfer_Cnt_2 : TX4939IDE_Xfer_Cnt_1);
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@ -321,8 +319,6 @@ static int tx4939ide_dma_end(ide_drive_t *drive)
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void __iomem *base = TX4939IDE_BASE(hwif);
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u16 ctl = tx4939ide_readw(base, TX4939IDE_Int_Ctl);
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drive->waiting_for_dma = 0;
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/* get DMA command mode */
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dma_cmd = tx4939ide_readb(base, TX4939IDE_DMA_Cmd);
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/* stop DMA */
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