[SCSI] qla2xxx: Consolidate ISP24xx chip reset logic.
Consolidate ISP24xx chip reset logic. Consolidate near-duplicate RISC reset logic from qla24xx_reset_chip() and qla24xx_chip_diag(). Also, after initiating a soft-reset, insure the firmware has completed all NVRAM accesses before continuing. Signed-off-by: Andrew Vasquez <andrew.vasquez@qlogic.com> Signed-off-by: James Bottomley <James.Bottomley@SteelEye.com>
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88c2666351
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@ -1526,6 +1526,17 @@ qla24xx_fw_dump(scsi_qla_host_t *ha, int hardware_locked)
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WRT_REG_DWORD(®->ctrl_status,
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CSRX_ISP_SOFT_RESET|CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
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RD_REG_DWORD(®->ctrl_status);
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/* Wait for firmware to complete NVRAM accesses. */
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udelay(5);
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mb[0] = (uint32_t) RD_REG_WORD(®->mailbox0);
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for (cnt = 10000 ; cnt && mb[0]; cnt--) {
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udelay(5);
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mb[0] = (uint32_t) RD_REG_WORD(®->mailbox0);
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barrier();
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}
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udelay(20);
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for (cnt = 0; cnt < 30000; cnt++) {
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if ((RD_REG_DWORD(®->ctrl_status) &
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@ -564,20 +564,18 @@ qla2x00_reset_chip(scsi_qla_host_t *ha)
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}
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/**
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* qla24xx_reset_chip() - Reset ISP24xx chip.
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* qla24xx_reset_risc() - Perform full reset of ISP24xx RISC.
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* @ha: HA context
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*
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* Returns 0 on success.
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*/
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void
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qla24xx_reset_chip(scsi_qla_host_t *ha)
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static inline void
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qla24xx_reset_risc(scsi_qla_host_t *ha)
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{
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unsigned long flags = 0;
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struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
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uint32_t cnt, d2;
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ha->isp_ops.disable_intrs(ha);
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spin_lock_irqsave(&ha->hardware_lock, flags);
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/* Reset RISC. */
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@ -591,6 +589,17 @@ qla24xx_reset_chip(scsi_qla_host_t *ha)
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WRT_REG_DWORD(®->ctrl_status,
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CSRX_ISP_SOFT_RESET|CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
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RD_REG_DWORD(®->ctrl_status);
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/* Wait for firmware to complete NVRAM accesses. */
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udelay(5);
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d2 = (uint32_t) RD_REG_WORD(®->mailbox0);
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for (cnt = 10000 ; cnt && d2; cnt--) {
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udelay(5);
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d2 = (uint32_t) RD_REG_WORD(®->mailbox0);
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barrier();
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}
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udelay(20);
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d2 = RD_REG_DWORD(®->ctrl_status);
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for (cnt = 6000000 ; cnt && (d2 & CSRX_ISP_SOFT_RESET); cnt--) {
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@ -618,6 +627,21 @@ qla24xx_reset_chip(scsi_qla_host_t *ha)
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spin_unlock_irqrestore(&ha->hardware_lock, flags);
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}
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/**
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* qla24xx_reset_chip() - Reset ISP24xx chip.
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* @ha: HA context
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*
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* Returns 0 on success.
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*/
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void
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qla24xx_reset_chip(scsi_qla_host_t *ha)
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{
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ha->isp_ops.disable_intrs(ha);
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/* Perform RISC reset. */
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qla24xx_reset_risc(ha);
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}
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/**
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* qla2x00_chip_diag() - Test chip for proper operation.
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* @ha: HA context
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@ -753,49 +777,9 @@ int
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qla24xx_chip_diag(scsi_qla_host_t *ha)
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{
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int rval;
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struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
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unsigned long flags = 0;
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uint32_t cnt, d2;
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spin_lock_irqsave(&ha->hardware_lock, flags);
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/* Reset RISC. */
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WRT_REG_DWORD(®->ctrl_status, CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
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for (cnt = 0; cnt < 30000; cnt++) {
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if ((RD_REG_DWORD(®->ctrl_status) &
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CSRX_DMA_ACTIVE) == 0)
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break;
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udelay(10);
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}
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WRT_REG_DWORD(®->ctrl_status,
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CSRX_ISP_SOFT_RESET|CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
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udelay(20);
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d2 = RD_REG_DWORD(®->ctrl_status);
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for (cnt = 6000000 ; cnt && (d2 & CSRX_ISP_SOFT_RESET); cnt--) {
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udelay(5);
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d2 = RD_REG_DWORD(®->ctrl_status);
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barrier();
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}
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WRT_REG_DWORD(®->hccr, HCCRX_SET_RISC_RESET);
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RD_REG_DWORD(®->hccr);
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WRT_REG_DWORD(®->hccr, HCCRX_REL_RISC_PAUSE);
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RD_REG_DWORD(®->hccr);
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WRT_REG_DWORD(®->hccr, HCCRX_CLR_RISC_RESET);
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RD_REG_DWORD(®->hccr);
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d2 = (uint32_t) RD_REG_WORD(®->mailbox0);
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for (cnt = 6000000 ; cnt && d2; cnt--) {
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udelay(5);
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d2 = (uint32_t) RD_REG_WORD(®->mailbox0);
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barrier();
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}
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spin_unlock_irqrestore(&ha->hardware_lock, flags);
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/* Perform RISC reset. */
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qla24xx_reset_risc(ha);
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ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 1024;
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