ath9k: introduce bus specific cache size routine

The PCI specific bus_read_cachesize routine won't work on the AHB bus,
we have to replace it with a suitable one later.

Changes-licensed-under: ISC

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Signed-off-by: Imre Kaloz <kaloz@openwrt.org>
Tested-by: Pavel Roskin <proski@gnu.org>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
This commit is contained in:
Gabor Juhos 2009-01-14 20:17:04 +01:00 коммит произвёл John W. Linville
Родитель 7da3c55ce8
Коммит 88d1570764
2 изменённых файлов: 17 добавлений и 2 удалений

Просмотреть файл

@ -693,6 +693,10 @@ enum PROT_MODE {
#define SC_OP_RFKILL_SW_BLOCKED BIT(12) #define SC_OP_RFKILL_SW_BLOCKED BIT(12)
#define SC_OP_RFKILL_HW_BLOCKED BIT(13) #define SC_OP_RFKILL_HW_BLOCKED BIT(13)
struct ath_bus_ops {
void (*read_cachesize)(struct ath_softc *sc, int *csz);
};
struct ath_softc { struct ath_softc {
struct ieee80211_hw *hw; struct ieee80211_hw *hw;
struct device *dev; struct device *dev;
@ -743,6 +747,7 @@ struct ath_softc {
#ifdef CONFIG_ATH9K_DEBUG #ifdef CONFIG_ATH9K_DEBUG
struct ath9k_debug sc_debug; struct ath9k_debug sc_debug;
#endif #endif
struct ath_bus_ops *bus_ops;
}; };
int ath_reset(struct ath_softc *sc, bool retry_tx); int ath_reset(struct ath_softc *sc, bool retry_tx);
@ -750,4 +755,9 @@ int ath_get_hal_qnum(u16 queue, struct ath_softc *sc);
int ath_get_mac80211_qnum(u32 queue, struct ath_softc *sc); int ath_get_mac80211_qnum(u32 queue, struct ath_softc *sc);
int ath_cabq_update(struct ath_softc *); int ath_cabq_update(struct ath_softc *);
static inline void ath_read_cachesize(struct ath_softc *sc, int *csz)
{
sc->bus_ops->read_cachesize(sc, csz);
}
#endif /* CORE_H */ #endif /* CORE_H */

Просмотреть файл

@ -42,7 +42,7 @@ static void ath_detach(struct ath_softc *sc);
/* return bus cachesize in 4B word units */ /* return bus cachesize in 4B word units */
static void bus_read_cachesize(struct ath_softc *sc, int *csz) static void ath_pci_read_cachesize(struct ath_softc *sc, int *csz)
{ {
u8 u8tmp; u8 u8tmp;
@ -1338,7 +1338,7 @@ static int ath_init(u16 devid, struct ath_softc *sc)
* Cache line size is used to size and align various * Cache line size is used to size and align various
* structures used to communicate with the hardware. * structures used to communicate with the hardware.
*/ */
bus_read_cachesize(sc, &csz); ath_read_cachesize(sc, &csz);
/* XXX assert csz is non-zero */ /* XXX assert csz is non-zero */
sc->sc_cachelsz = csz << 2; /* convert to bytes */ sc->sc_cachelsz = csz << 2; /* convert to bytes */
@ -2534,6 +2534,10 @@ ath_rf_name(u16 rf_version)
return "????"; return "????";
} }
static struct ath_bus_ops ath_pci_bus_ops = {
.read_cachesize = ath_pci_read_cachesize,
};
static int ath_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) static int ath_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
{ {
void __iomem *mem; void __iomem *mem;
@ -2622,6 +2626,7 @@ static int ath_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
sc->hw = hw; sc->hw = hw;
sc->dev = &pdev->dev; sc->dev = &pdev->dev;
sc->mem = mem; sc->mem = mem;
sc->bus_ops = &ath_pci_bus_ops;
if (ath_attach(id->device, sc) != 0) { if (ath_attach(id->device, sc) != 0) {
ret = -ENODEV; ret = -ENODEV;