iwlwifi: yoyo: support for new DBGI_SRAM region
new region handling is added for dump collection. Signed-off-by: Mukesh Sisodiya <mukesh.sisodiya@intel.com> Signed-off-by: Luca Coelho <luciano.coelho@intel.com> Link: https://lore.kernel.org/r/iwlwifi.20210819183728.af9a24b82396.I53c5f82bd2d0f56fd699e3841c922082d99f1c90@changeid Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
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Родитель
4e110e799c
Коммит
89639e06d0
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@ -129,6 +129,7 @@ struct iwl_fw_ini_region_internal_buffer {
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* &IWL_FW_INI_REGION_PERIPHERY_PHY, &IWL_FW_INI_REGION_PERIPHERY_AUX,
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* &IWL_FW_INI_REGION_PERIPHERY_PHY, &IWL_FW_INI_REGION_PERIPHERY_AUX,
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* &IWL_FW_INI_REGION_PAGING, &IWL_FW_INI_REGION_CSR,
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* &IWL_FW_INI_REGION_PAGING, &IWL_FW_INI_REGION_CSR,
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* &IWL_FW_INI_REGION_DRAM_IMR and &IWL_FW_INI_REGION_PCI_IOSF_CONFIG
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* &IWL_FW_INI_REGION_DRAM_IMR and &IWL_FW_INI_REGION_PCI_IOSF_CONFIG
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* &IWL_FW_INI_REGION_DBGI_SRAM, &FW_TLV_DEBUG_REGION_TYPE_DBGI_SRAM,
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* @fifos: fifos configuration. Used by &IWL_FW_INI_REGION_TXF and
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* @fifos: fifos configuration. Used by &IWL_FW_INI_REGION_TXF and
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* &IWL_FW_INI_REGION_RXF
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* &IWL_FW_INI_REGION_RXF
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* @err_table: error table configuration. Used by
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* @err_table: error table configuration. Used by
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@ -295,6 +296,7 @@ enum iwl_fw_ini_buffer_location {
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* @IWL_FW_INI_REGION_DRAM_IMR: IMR memory
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* @IWL_FW_INI_REGION_DRAM_IMR: IMR memory
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* @IWL_FW_INI_REGION_PCI_IOSF_CONFIG: PCI/IOSF config
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* @IWL_FW_INI_REGION_PCI_IOSF_CONFIG: PCI/IOSF config
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* @IWL_FW_INI_REGION_SPECIAL_DEVICE_MEMORY: special device memory
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* @IWL_FW_INI_REGION_SPECIAL_DEVICE_MEMORY: special device memory
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* @IWL_FW_INI_REGION_DBGI_SRAM: periphery registers of DBGI SRAM
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* @IWL_FW_INI_REGION_NUM: number of region types
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* @IWL_FW_INI_REGION_NUM: number of region types
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*/
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*/
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enum iwl_fw_ini_region_type {
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enum iwl_fw_ini_region_type {
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@ -316,6 +318,7 @@ enum iwl_fw_ini_region_type {
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IWL_FW_INI_REGION_DRAM_IMR,
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IWL_FW_INI_REGION_DRAM_IMR,
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IWL_FW_INI_REGION_PCI_IOSF_CONFIG,
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IWL_FW_INI_REGION_PCI_IOSF_CONFIG,
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IWL_FW_INI_REGION_SPECIAL_DEVICE_MEMORY,
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IWL_FW_INI_REGION_SPECIAL_DEVICE_MEMORY,
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IWL_FW_INI_REGION_DBGI_SRAM,
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IWL_FW_INI_REGION_NUM
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IWL_FW_INI_REGION_NUM
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}; /* FW_TLV_DEBUG_REGION_TYPE_API_E */
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}; /* FW_TLV_DEBUG_REGION_TYPE_API_E */
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@ -1517,6 +1517,37 @@ iwl_dump_ini_special_mem_iter(struct iwl_fw_runtime *fwrt,
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return sizeof(*range) + le32_to_cpu(range->range_data_size);
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return sizeof(*range) + le32_to_cpu(range->range_data_size);
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}
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}
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static int
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iwl_dump_ini_dbgi_sram_iter(struct iwl_fw_runtime *fwrt,
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struct iwl_dump_ini_region_data *reg_data,
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void *range_ptr, int idx)
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{
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struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data;
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struct iwl_fw_ini_error_dump_range *range = range_ptr;
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__le32 *val = range->data;
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u32 prph_data;
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int i;
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if (!iwl_trans_grab_nic_access(fwrt->trans))
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return -EBUSY;
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range->range_data_size = reg->dev_addr.size;
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iwl_write_prph_no_grab(fwrt->trans, DBGI_SRAM_TARGET_ACCESS_CFG,
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DBGI_SRAM_TARGET_ACCESS_CFG_RESET_ADDRESS_MSK);
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for (i = 0; i < (le32_to_cpu(reg->dev_addr.size) / 4); i++) {
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prph_data = iwl_read_prph(fwrt->trans, (i % 2) ?
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DBGI_SRAM_TARGET_ACCESS_RDATA_MSB :
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DBGI_SRAM_TARGET_ACCESS_RDATA_LSB);
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if (prph_data == 0x5a5a5a5a) {
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iwl_trans_release_nic_access(fwrt->trans);
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return -EBUSY;
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}
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*val++ = cpu_to_le32(prph_data);
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}
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iwl_trans_release_nic_access(fwrt->trans);
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return sizeof(*range) + le32_to_cpu(range->range_data_size);
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}
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static int iwl_dump_ini_fw_pkt_iter(struct iwl_fw_runtime *fwrt,
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static int iwl_dump_ini_fw_pkt_iter(struct iwl_fw_runtime *fwrt,
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struct iwl_dump_ini_region_data *reg_data,
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struct iwl_dump_ini_region_data *reg_data,
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void *range_ptr, int idx)
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void *range_ptr, int idx)
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@ -2189,6 +2220,12 @@ static const struct iwl_dump_ini_mem_ops iwl_dump_ini_region_ops[] = {
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.fill_mem_hdr = iwl_dump_ini_special_mem_fill_header,
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.fill_mem_hdr = iwl_dump_ini_special_mem_fill_header,
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.fill_range = iwl_dump_ini_special_mem_iter,
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.fill_range = iwl_dump_ini_special_mem_iter,
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},
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},
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[IWL_FW_INI_REGION_DBGI_SRAM] = {
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.get_num_of_ranges = iwl_dump_ini_mem_ranges,
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.get_size = iwl_dump_ini_mem_get_size,
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.fill_mem_hdr = iwl_dump_ini_mem_fill_header,
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.fill_range = iwl_dump_ini_dbgi_sram_iter,
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},
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};
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};
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static u32 iwl_dump_ini_trigger(struct iwl_fw_runtime *fwrt,
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static u32 iwl_dump_ini_trigger(struct iwl_fw_runtime *fwrt,
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@ -348,6 +348,13 @@
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#define RFIC_REG_RD 0xAD0470
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#define RFIC_REG_RD 0xAD0470
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#define WFPM_CTRL_REG 0xA03030
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#define WFPM_CTRL_REG 0xA03030
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#define WFPM_GP2 0xA030B4
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#define WFPM_GP2 0xA030B4
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/* DBGI SRAM Register details */
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#define DBGI_SRAM_TARGET_ACCESS_CFG 0x00A2E14C
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#define DBGI_SRAM_TARGET_ACCESS_CFG_RESET_ADDRESS_MSK 0x10000
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#define DBGI_SRAM_TARGET_ACCESS_RDATA_LSB 0x00A2E154
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#define DBGI_SRAM_TARGET_ACCESS_RDATA_MSB 0x00A2E158
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enum {
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enum {
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ENABLE_WFPM = BIT(31),
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ENABLE_WFPM = BIT(31),
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WFPM_AUX_CTL_AUX_IF_MAC_OWNER_MSK = 0x80000000,
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WFPM_AUX_CTL_AUX_IF_MAC_OWNER_MSK = 0x80000000,
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