hwmon: (max31790) Report correct current pwm duty cycles
The MAX31790 has two sets of registers for pwm duty cycles, one to request a duty cycle and one to read the actual current duty cycle. Both do not have to be the same. When reporting the pwm duty cycle to the user, the actual pwm duty cycle from pwm duty cycle registers needs to be reported. When setting it, the pwm target duty cycle needs to be written. Since we don't know the actual pwm duty cycle after a target pwm duty cycle has been written, set the valid flag to false to indicate that actual pwm duty cycle should be read from the chip instead of using cached values. Cc: Jan Kundrát <jan.kundrat@cesnet.cz> Cc: Václav Kubernát <kubernat@cesnet.cz> Signed-off-by: Guenter Roeck <linux@roeck-us.net> Tested-by: Václav Kubernát <kubernat@ceesnet.cz> Reviewed-by: Jan Kundrát <jan.kundrat@cesnet.cz> Link: https://lore.kernel.org/r/20210526154022.3223012-3-linux@roeck-us.net
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@ -39,5 +39,6 @@ fan[1-12]_input RO fan tachometer speed in RPM
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fan[1-12]_fault RO fan experienced fault
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fan[1-6]_target RW desired fan speed in RPM
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pwm[1-6]_enable RW regulator mode, 0=disabled, 1=manual mode, 2=rpm mode
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pwm[1-6] RW fan target duty cycle (0-255)
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pwm[1-6] RW read: current pwm duty cycle,
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write: target pwm duty cycle (0-255)
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================== === =======================================================
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@ -104,7 +104,7 @@ static struct max31790_data *max31790_update_device(struct device *dev)
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data->tach[NR_CHANNEL + i] = rv;
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} else {
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rv = i2c_smbus_read_word_swapped(client,
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MAX31790_REG_PWMOUT(i));
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MAX31790_REG_PWM_DUTY_CYCLE(i));
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if (rv < 0)
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goto abort;
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data->pwm[i] = rv;
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@ -299,10 +299,10 @@ static int max31790_write_pwm(struct device *dev, u32 attr, int channel,
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err = -EINVAL;
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break;
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}
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data->pwm[channel] = val << 8;
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data->valid = false;
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err = i2c_smbus_write_word_swapped(client,
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MAX31790_REG_PWMOUT(channel),
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data->pwm[channel]);
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val << 8);
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break;
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case hwmon_pwm_enable:
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fan_config = data->fan_config[channel];
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