mfd: Correct ro and cd implemantion on DM355
This patch corrects the support for MMCSD card detection and read only feature for SoC DM355. EVMDM355_ECP_VA4.pdf, from Spectrum digital, suggests that Bit 2 and 4 should be checked for card detection. However on the EVM, bits 1 and 3 gives this status, for MMC/SD instance 0 and 1 respectively. The pdf also suggests that Bit 1 and 3 should be checked for write protection. However on the EVM bits 2 and 4 gives this status. This document can be downloaded from http://c6000.spectrumdigital.com/evmdm355/reve/files/EVMDM355_ECP_VA4.pdf Signed-off-by: Vipin Bhandari <vipin.bhandari@ti.com> Acked-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
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@ -107,8 +107,16 @@ static const u8 msp_gpios[] = {
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MSP_GPIO(2, SWITCH1), MSP_GPIO(3, SWITCH1),
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MSP_GPIO(4, SWITCH1),
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/* switches on MMC/SD sockets */
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MSP_GPIO(1, SDMMC), MSP_GPIO(2, SDMMC), /* mmc0 WP, nCD */
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MSP_GPIO(3, SDMMC), MSP_GPIO(4, SDMMC), /* mmc1 WP, nCD */
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/*
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* Note: EVMDM355_ECP_VA4.pdf suggests that Bit 2 and 4 should be
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* checked for card detection. However on the EVM bit 1 and 3 gives
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* this status, for 0 and 1 instance respectively. The pdf also
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* suggests that Bit 1 and 3 should be checked for write protection.
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* However on the EVM bit 2 and 4 gives this status,for 0 and 1
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* instance respectively.
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*/
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MSP_GPIO(2, SDMMC), MSP_GPIO(1, SDMMC), /* mmc0 WP, nCD */
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MSP_GPIO(4, SDMMC), MSP_GPIO(3, SDMMC), /* mmc1 WP, nCD */
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};
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#define MSP_GPIO_REG(offset) (msp_gpios[(offset)] >> 3)
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