ARM: dts: exynos: Fix invalid GIC interrupt flags in exynos3250
Interrupt of type IRQ_TYPE_NONE is not allowed for GIC interrupts and generates an error: genirq: Setting trigger mode 0 for irq 16 failed (gic_set_type+0x0/0x68) The GIC requires shared interrupts to be edge rising or level high. Platform declares support for both. Arbitrarily choose level high everywhere hoping it will work on each platform. Reported-by: Marek Szyprowski <m.szyprowski@samsung.com> Reported-by: Alban Browaeys <alban.browaeys@gmail.com> Cc: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
This commit is contained in:
Krzysztof Kozlowski
Родитель
11ebc47cde
Коммит
89be851108
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@ -362,8 +362,14 @@
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interrupt-controller;
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interrupt-parent = <&gic>;
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interrupts = <0 32 0>, <0 33 0>, <0 34 0>, <0 35 0>,
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<0 36 0>, <0 37 0>, <0 38 0>, <0 39 0>;
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interrupts = <0 32 IRQ_TYPE_LEVEL_HIGH>,
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<0 33 IRQ_TYPE_LEVEL_HIGH>,
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<0 34 IRQ_TYPE_LEVEL_HIGH>,
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<0 35 IRQ_TYPE_LEVEL_HIGH>,
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<0 36 IRQ_TYPE_LEVEL_HIGH>,
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<0 37 IRQ_TYPE_LEVEL_HIGH>,
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<0 38 IRQ_TYPE_LEVEL_HIGH>,
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<0 39 IRQ_TYPE_LEVEL_HIGH>;
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#interrupt-cells = <2>;
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};
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@ -373,8 +379,14 @@
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interrupt-controller;
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interrupt-parent = <&gic>;
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interrupts = <0 40 0>, <0 41 0>, <0 42 0>, <0 43 0>,
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<0 44 0>, <0 45 0>, <0 46 0>, <0 47 0>;
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interrupts = <0 40 IRQ_TYPE_LEVEL_HIGH>,
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<0 41 IRQ_TYPE_LEVEL_HIGH>,
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<0 42 IRQ_TYPE_LEVEL_HIGH>,
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<0 43 IRQ_TYPE_LEVEL_HIGH>,
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<0 44 IRQ_TYPE_LEVEL_HIGH>,
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<0 45 IRQ_TYPE_LEVEL_HIGH>,
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<0 46 IRQ_TYPE_LEVEL_HIGH>,
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<0 47 IRQ_TYPE_LEVEL_HIGH>;
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#interrupt-cells = <2>;
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};
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@ -20,6 +20,7 @@
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#include "exynos4-cpu-thermal.dtsi"
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#include "exynos-syscon-restart.dtsi"
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#include <dt-bindings/clock/exynos3250.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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/ {
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compatible = "samsung,exynos3250";
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@ -211,7 +212,8 @@
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rtc: rtc@10070000 {
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compatible = "samsung,s3c6410-rtc";
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reg = <0x10070000 0x100>;
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interrupts = <0 73 0>, <0 74 0>;
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interrupts = <0 73 IRQ_TYPE_LEVEL_HIGH>,
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<0 74 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-parent = <&pmu_system_controller>;
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status = "disabled";
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};
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@ -219,7 +221,7 @@
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tmu: tmu@100C0000 {
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compatible = "samsung,exynos3250-tmu";
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reg = <0x100C0000 0x100>;
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interrupts = <0 216 0>;
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interrupts = <0 216 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cmu CLK_TMU_APBIF>;
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clock-names = "tmu_apbif";
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#include "exynos4412-tmu-sensor-conf.dtsi"
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@ -240,8 +242,14 @@
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mct@10050000 {
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compatible = "samsung,exynos4210-mct";
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reg = <0x10050000 0x800>;
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interrupts = <0 218 0>, <0 219 0>, <0 220 0>, <0 221 0>,
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<0 223 0>, <0 226 0>, <0 227 0>, <0 228 0>;
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interrupts = <0 218 IRQ_TYPE_LEVEL_HIGH>,
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<0 219 IRQ_TYPE_LEVEL_HIGH>,
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<0 220 IRQ_TYPE_LEVEL_HIGH>,
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<0 221 IRQ_TYPE_LEVEL_HIGH>,
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<0 223 IRQ_TYPE_LEVEL_HIGH>,
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<0 226 IRQ_TYPE_LEVEL_HIGH>,
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<0 227 IRQ_TYPE_LEVEL_HIGH>,
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<0 228 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cmu CLK_FIN_PLL>, <&cmu CLK_MCT>;
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clock-names = "fin_pll", "mct";
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};
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@ -249,24 +257,24 @@
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pinctrl_1: pinctrl@11000000 {
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compatible = "samsung,exynos3250-pinctrl";
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reg = <0x11000000 0x1000>;
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interrupts = <0 225 0>;
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interrupts = <0 225 IRQ_TYPE_LEVEL_HIGH>;
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wakeup-interrupt-controller {
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compatible = "samsung,exynos4210-wakeup-eint";
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interrupts = <0 48 0>;
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interrupts = <0 48 IRQ_TYPE_LEVEL_HIGH>;
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};
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};
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pinctrl_0: pinctrl@11400000 {
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compatible = "samsung,exynos3250-pinctrl";
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reg = <0x11400000 0x1000>;
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interrupts = <0 240 0>;
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interrupts = <0 240 IRQ_TYPE_LEVEL_HIGH>;
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};
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jpeg: codec@11830000 {
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compatible = "samsung,exynos3250-jpeg";
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reg = <0x11830000 0x1000>;
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interrupts = <0 171 0>;
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interrupts = <0 171 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cmu CLK_JPEG>, <&cmu CLK_SCLK_JPEG>;
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clock-names = "jpeg", "sclk";
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power-domains = <&pd_cam>;
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@ -280,7 +288,8 @@
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sysmmu_jpeg: sysmmu@11A60000 {
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compatible = "samsung,exynos-sysmmu";
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reg = <0x11a60000 0x1000>;
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interrupts = <0 156 0>, <0 161 0>;
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interrupts = <0 156 IRQ_TYPE_LEVEL_HIGH>,
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<0 161 IRQ_TYPE_LEVEL_HIGH>;
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clock-names = "sysmmu", "master";
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clocks = <&cmu CLK_SMMUJPEG>, <&cmu CLK_JPEG>;
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power-domains = <&pd_cam>;
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@ -291,7 +300,9 @@
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compatible = "samsung,exynos3250-fimd";
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reg = <0x11c00000 0x30000>;
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interrupt-names = "fifo", "vsync", "lcd_sys";
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interrupts = <0 84 0>, <0 85 0>, <0 86 0>;
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interrupts = <0 84 IRQ_TYPE_LEVEL_HIGH>,
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<0 85 IRQ_TYPE_LEVEL_HIGH>,
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<0 86 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cmu CLK_SCLK_FIMD0>, <&cmu CLK_FIMD0>;
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clock-names = "sclk_fimd", "fimd";
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power-domains = <&pd_lcd0>;
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@ -303,7 +314,7 @@
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dsi_0: dsi@11C80000 {
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compatible = "samsung,exynos3250-mipi-dsi";
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reg = <0x11C80000 0x10000>;
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interrupts = <0 83 0>;
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interrupts = <0 83 IRQ_TYPE_LEVEL_HIGH>;
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samsung,phy-type = <0>;
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power-domains = <&pd_lcd0>;
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phys = <&mipi_phy 1>;
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@ -318,7 +329,8 @@
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sysmmu_fimd0: sysmmu@11E20000 {
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compatible = "samsung,exynos-sysmmu";
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reg = <0x11e20000 0x1000>;
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interrupts = <0 80 0>, <0 81 0>;
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interrupts = <0 80 IRQ_TYPE_LEVEL_HIGH>,
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<0 81 IRQ_TYPE_LEVEL_HIGH>;
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clock-names = "sysmmu", "master";
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clocks = <&cmu CLK_SMMUFIMD0>, <&cmu CLK_FIMD0>;
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power-domains = <&pd_lcd0>;
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@ -328,7 +340,7 @@
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hsotg: hsotg@12480000 {
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compatible = "snps,dwc2";
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reg = <0x12480000 0x20000>;
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interrupts = <0 141 0>;
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interrupts = <0 141 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cmu CLK_USBOTG>;
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clock-names = "otg";
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phys = <&exynos_usbphy 0>;
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@ -339,7 +351,7 @@
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mshc_0: mshc@12510000 {
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compatible = "samsung,exynos5420-dw-mshc";
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reg = <0x12510000 0x1000>;
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interrupts = <0 142 0>;
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interrupts = <0 142 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cmu CLK_SDMMC0>, <&cmu CLK_SCLK_MMC0>;
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clock-names = "biu", "ciu";
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fifo-depth = <0x80>;
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@ -351,7 +363,7 @@
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mshc_1: mshc@12520000 {
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compatible = "samsung,exynos5420-dw-mshc";
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reg = <0x12520000 0x1000>;
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interrupts = <0 143 0>;
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interrupts = <0 143 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cmu CLK_SDMMC1>, <&cmu CLK_SCLK_MMC1>;
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clock-names = "biu", "ciu";
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fifo-depth = <0x80>;
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@ -363,7 +375,7 @@
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mshc_2: mshc@12530000 {
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compatible = "samsung,exynos5250-dw-mshc";
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reg = <0x12530000 0x1000>;
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interrupts = <0 144 0>;
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interrupts = <0 144 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cmu CLK_SDMMC2>, <&cmu CLK_SCLK_MMC2>;
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clock-names = "biu", "ciu";
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fifo-depth = <0x80>;
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@ -391,7 +403,7 @@
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pdma0: pdma@12680000 {
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compatible = "arm,pl330", "arm,primecell";
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reg = <0x12680000 0x1000>;
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interrupts = <0 138 0>;
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interrupts = <0 138 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cmu CLK_PDMA0>;
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clock-names = "apb_pclk";
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#dma-cells = <1>;
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@ -402,7 +414,7 @@
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pdma1: pdma@12690000 {
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compatible = "arm,pl330", "arm,primecell";
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reg = <0x12690000 0x1000>;
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interrupts = <0 139 0>;
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interrupts = <0 139 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cmu CLK_PDMA1>;
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clock-names = "apb_pclk";
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#dma-cells = <1>;
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@ -415,7 +427,7 @@
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compatible = "samsung,exynos3250-adc",
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"samsung,exynos-adc-v2";
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reg = <0x126C0000 0x100>;
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interrupts = <0 137 0>;
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interrupts = <0 137 IRQ_TYPE_LEVEL_HIGH>;
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clock-names = "adc", "sclk";
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clocks = <&cmu CLK_TSADC>, <&cmu CLK_SCLK_TSADC>;
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#io-channel-cells = <1>;
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@ -427,7 +439,7 @@
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mfc: codec@13400000 {
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compatible = "samsung,mfc-v7";
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reg = <0x13400000 0x10000>;
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interrupts = <0 102 0>;
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interrupts = <0 102 IRQ_TYPE_LEVEL_HIGH>;
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clock-names = "mfc", "sclk_mfc";
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clocks = <&cmu CLK_MFC>, <&cmu CLK_SCLK_MFC>;
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power-domains = <&pd_mfc>;
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@ -437,7 +449,8 @@
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sysmmu_mfc: sysmmu@13620000 {
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compatible = "samsung,exynos-sysmmu";
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reg = <0x13620000 0x1000>;
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interrupts = <0 96 0>, <0 98 0>;
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interrupts = <0 96 IRQ_TYPE_LEVEL_HIGH>,
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<0 98 IRQ_TYPE_LEVEL_HIGH>;
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clock-names = "sysmmu", "master";
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clocks = <&cmu CLK_SMMUMFC_L>, <&cmu CLK_MFC>;
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power-domains = <&pd_mfc>;
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@ -447,7 +460,7 @@
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serial_0: serial@13800000 {
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compatible = "samsung,exynos4210-uart";
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reg = <0x13800000 0x100>;
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interrupts = <0 109 0>;
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interrupts = <0 109 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cmu CLK_UART0>, <&cmu CLK_SCLK_UART0>;
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clock-names = "uart", "clk_uart_baud0";
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pinctrl-names = "default";
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@ -458,7 +471,7 @@
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serial_1: serial@13810000 {
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compatible = "samsung,exynos4210-uart";
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reg = <0x13810000 0x100>;
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interrupts = <0 110 0>;
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interrupts = <0 110 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cmu CLK_UART1>, <&cmu CLK_SCLK_UART1>;
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clock-names = "uart", "clk_uart_baud0";
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pinctrl-names = "default";
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@ -469,7 +482,7 @@
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serial_2: serial@13820000 {
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compatible = "samsung,exynos4210-uart";
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reg = <0x13820000 0x100>;
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interrupts = <0 111 0>;
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interrupts = <0 111 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cmu CLK_UART2>, <&cmu CLK_SCLK_UART2>;
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clock-names = "uart", "clk_uart_baud0";
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pinctrl-names = "default";
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@ -482,7 +495,7 @@
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#size-cells = <0>;
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compatible = "samsung,s3c2440-i2c";
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reg = <0x13860000 0x100>;
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interrupts = <0 113 0>;
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interrupts = <0 113 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cmu CLK_I2C0>;
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clock-names = "i2c";
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pinctrl-names = "default";
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@ -495,7 +508,7 @@
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#size-cells = <0>;
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compatible = "samsung,s3c2440-i2c";
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reg = <0x13870000 0x100>;
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interrupts = <0 114 0>;
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interrupts = <0 114 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cmu CLK_I2C1>;
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clock-names = "i2c";
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pinctrl-names = "default";
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@ -508,7 +521,7 @@
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#size-cells = <0>;
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compatible = "samsung,s3c2440-i2c";
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reg = <0x13880000 0x100>;
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interrupts = <0 115 0>;
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interrupts = <0 115 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cmu CLK_I2C2>;
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clock-names = "i2c";
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pinctrl-names = "default";
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@ -521,7 +534,7 @@
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#size-cells = <0>;
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compatible = "samsung,s3c2440-i2c";
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reg = <0x13890000 0x100>;
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interrupts = <0 116 0>;
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interrupts = <0 116 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cmu CLK_I2C3>;
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clock-names = "i2c";
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pinctrl-names = "default";
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@ -534,7 +547,7 @@
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#size-cells = <0>;
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compatible = "samsung,s3c2440-i2c";
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reg = <0x138A0000 0x100>;
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interrupts = <0 117 0>;
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interrupts = <0 117 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cmu CLK_I2C4>;
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clock-names = "i2c";
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pinctrl-names = "default";
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@ -547,7 +560,7 @@
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#size-cells = <0>;
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compatible = "samsung,s3c2440-i2c";
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reg = <0x138B0000 0x100>;
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interrupts = <0 118 0>;
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interrupts = <0 118 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cmu CLK_I2C5>;
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clock-names = "i2c";
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pinctrl-names = "default";
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@ -560,7 +573,7 @@
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#size-cells = <0>;
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compatible = "samsung,s3c2440-i2c";
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reg = <0x138C0000 0x100>;
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interrupts = <0 119 0>;
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interrupts = <0 119 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cmu CLK_I2C6>;
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clock-names = "i2c";
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pinctrl-names = "default";
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@ -573,7 +586,7 @@
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#size-cells = <0>;
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compatible = "samsung,s3c2440-i2c";
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reg = <0x138D0000 0x100>;
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interrupts = <0 120 0>;
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interrupts = <0 120 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cmu CLK_I2C7>;
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clock-names = "i2c";
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pinctrl-names = "default";
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@ -584,7 +597,7 @@
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spi_0: spi@13920000 {
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compatible = "samsung,exynos4210-spi";
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reg = <0x13920000 0x100>;
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interrupts = <0 121 0>;
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interrupts = <0 121 IRQ_TYPE_LEVEL_HIGH>;
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dmas = <&pdma0 7>, <&pdma0 6>;
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dma-names = "tx", "rx";
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#address-cells = <1>;
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@ -600,7 +613,7 @@
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spi_1: spi@13930000 {
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compatible = "samsung,exynos4210-spi";
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reg = <0x13930000 0x100>;
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interrupts = <0 122 0>;
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interrupts = <0 122 IRQ_TYPE_LEVEL_HIGH>;
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dmas = <&pdma1 7>, <&pdma1 6>;
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dma-names = "tx", "rx";
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#address-cells = <1>;
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@ -616,7 +629,7 @@
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i2s2: i2s@13970000 {
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compatible = "samsung,s3c6410-i2s";
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reg = <0x13970000 0x100>;
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interrupts = <0 126 0>;
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interrupts = <0 126 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cmu CLK_I2S>, <&cmu CLK_SCLK_I2S>;
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clock-names = "iis", "i2s_opclk0";
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dmas = <&pdma0 14>, <&pdma0 13>;
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@ -629,15 +642,19 @@
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pwm: pwm@139D0000 {
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compatible = "samsung,exynos4210-pwm";
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reg = <0x139D0000 0x1000>;
|
||||
interrupts = <0 104 0>, <0 105 0>, <0 106 0>,
|
||||
<0 107 0>, <0 108 0>;
|
||||
interrupts = <0 104 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 105 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 106 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 107 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 108 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#pwm-cells = <3>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pmu {
|
||||
compatible = "arm,cortex-a7-pmu";
|
||||
interrupts = <0 18 0>, <0 19 0>;
|
||||
interrupts = <0 18 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 19 IRQ_TYPE_LEVEL_HIGH>;
|
||||
};
|
||||
|
||||
ppmu_dmc0: ppmu_dmc0@106a0000 {
|
||||
|
|
|
|||
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Ссылка в новой задаче