spi: McSPI saves CHCONFx too
Previous restore was lazy and only restored CHxCONF when it was needed by a specific chip select. This could cause occasional errors on an SPI bus where multiple chip selects are in use. Signed-off-by: Tero Kristo <tero.kristo@nokia.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com> Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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@ -134,6 +134,7 @@ struct omap2_mcspi_cs {
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void __iomem *base;
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void __iomem *base;
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unsigned long phys;
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unsigned long phys;
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int word_len;
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int word_len;
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struct list_head node;
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/* Context save and restore shadow register */
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/* Context save and restore shadow register */
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u32 chconf0;
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u32 chconf0;
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};
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};
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@ -145,6 +146,7 @@ struct omap2_mcspi_regs {
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u32 sysconfig;
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u32 sysconfig;
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u32 modulctrl;
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u32 modulctrl;
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u32 wakeupenable;
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u32 wakeupenable;
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struct list_head cs;
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};
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};
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static struct omap2_mcspi_regs omap2_mcspi_ctx[OMAP2_MCSPI_MAX_CTRL];
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static struct omap2_mcspi_regs omap2_mcspi_ctx[OMAP2_MCSPI_MAX_CTRL];
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@ -255,6 +257,7 @@ static void omap2_mcspi_set_master_mode(struct spi_master *master)
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static void omap2_mcspi_restore_ctx(struct omap2_mcspi *mcspi)
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static void omap2_mcspi_restore_ctx(struct omap2_mcspi *mcspi)
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{
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{
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struct spi_master *spi_cntrl;
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struct spi_master *spi_cntrl;
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struct omap2_mcspi_cs *cs;
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spi_cntrl = mcspi->master;
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spi_cntrl = mcspi->master;
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/* McSPI: context restore */
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/* McSPI: context restore */
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@ -266,6 +269,10 @@ static void omap2_mcspi_restore_ctx(struct omap2_mcspi *mcspi)
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mcspi_write_reg(spi_cntrl, OMAP2_MCSPI_WAKEUPENABLE,
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mcspi_write_reg(spi_cntrl, OMAP2_MCSPI_WAKEUPENABLE,
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omap2_mcspi_ctx[spi_cntrl->bus_num - 1].wakeupenable);
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omap2_mcspi_ctx[spi_cntrl->bus_num - 1].wakeupenable);
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list_for_each_entry(cs, &omap2_mcspi_ctx[spi_cntrl->bus_num - 1].cs,
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node)
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__raw_writel(cs->chconf0, cs->base + OMAP2_MCSPI_CHCONF0);
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}
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}
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static void omap2_mcspi_disable_clocks(struct omap2_mcspi *mcspi)
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static void omap2_mcspi_disable_clocks(struct omap2_mcspi *mcspi)
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{
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{
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@ -714,6 +721,9 @@ static int omap2_mcspi_setup(struct spi_device *spi)
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cs->phys = mcspi->phys + spi->chip_select * 0x14;
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cs->phys = mcspi->phys + spi->chip_select * 0x14;
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cs->chconf0 = 0;
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cs->chconf0 = 0;
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spi->controller_state = cs;
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spi->controller_state = cs;
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/* Link this to context save list */
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list_add_tail(&cs->node,
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&omap2_mcspi_ctx[mcspi->master->bus_num - 1].cs);
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}
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}
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if (mcspi_dma->dma_rx_channel == -1
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if (mcspi_dma->dma_rx_channel == -1
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@ -736,10 +746,15 @@ static void omap2_mcspi_cleanup(struct spi_device *spi)
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{
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{
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struct omap2_mcspi *mcspi;
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struct omap2_mcspi *mcspi;
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struct omap2_mcspi_dma *mcspi_dma;
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struct omap2_mcspi_dma *mcspi_dma;
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struct omap2_mcspi_cs *cs;
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mcspi = spi_master_get_devdata(spi->master);
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mcspi = spi_master_get_devdata(spi->master);
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mcspi_dma = &mcspi->dma_channels[spi->chip_select];
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mcspi_dma = &mcspi->dma_channels[spi->chip_select];
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/* Unlink controller state from context save list */
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cs = spi->controller_state;
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list_del(&cs->node);
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kfree(spi->controller_state);
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kfree(spi->controller_state);
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if (mcspi_dma->dma_rx_channel != -1) {
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if (mcspi_dma->dma_rx_channel != -1) {
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@ -1104,6 +1119,7 @@ static int __init omap2_mcspi_probe(struct platform_device *pdev)
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spin_lock_init(&mcspi->lock);
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spin_lock_init(&mcspi->lock);
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INIT_LIST_HEAD(&mcspi->msg_queue);
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INIT_LIST_HEAD(&mcspi->msg_queue);
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INIT_LIST_HEAD(&omap2_mcspi_ctx[master->bus_num - 1].cs);
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mcspi->ick = clk_get(&pdev->dev, "ick");
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mcspi->ick = clk_get(&pdev->dev, "ick");
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if (IS_ERR(mcspi->ick)) {
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if (IS_ERR(mcspi->ick)) {
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