net: mscc: ocelot: deal with problematic MAC_ETYPE VCAP IS2 rules
By default, the VCAP IS2 will produce a single match for each frame, on the most specific classification. Example: a ping packet (ICMP over IPv4 over Ethernet) sent from an IP address of 10.0.0.1 and a MAC address of 96:18:82:00:04:01 will match this rule: tc filter add dev swp0 ingress protocol ipv4 \ flower skip_sw src_ip 10.0.0.1 action drop but not this one: tc filter add dev swp0 ingress \ flower skip_sw src_mac 96:18:82:00:04:01 action drop Currently the driver does not really warn the user in any way about this, and the behavior is rather strange anyway. The current patch is a workaround to force matches on MAC_ETYPE keys (DMAC and SMAC) for all packets irrespective of higher layer protocol. The setting is made at the port level. Of course this breaks all other non-src_mac and non-dst_mac matches, so rule exclusivity checks have been added to the driver, in order to never have rules of both types on any ingress port. The bits that discard higher-level protocol information are set only once a MAC_ETYPE rule is added to a filter block, and only for the ports that are bound to that filter block. Then all further non-MAC_ETYPE rules added to that filter block should be denied by the ports bound to it. Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -706,13 +706,114 @@ ocelot_ace_rule_get_rule_index(struct ocelot_acl_block *block, int index)
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return NULL;
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}
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/* If @on=false, then SNAP, ARP, IP and OAM frames will not match on keys based
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* on destination and source MAC addresses, but only on higher-level protocol
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* information. The only frame types to match on keys containing MAC addresses
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* in this case are non-SNAP, non-ARP, non-IP and non-OAM frames.
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*
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* If @on=true, then the above frame types (SNAP, ARP, IP and OAM) will match
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* on MAC_ETYPE keys such as destination and source MAC on this ingress port.
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* However the setting has the side effect of making these frames not matching
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* on any _other_ keys than MAC_ETYPE ones.
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*/
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static void ocelot_match_all_as_mac_etype(struct ocelot *ocelot, int port,
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bool on)
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{
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u32 val = 0;
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if (on)
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val = ANA_PORT_VCAP_S2_CFG_S2_SNAP_DIS(3) |
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ANA_PORT_VCAP_S2_CFG_S2_ARP_DIS(3) |
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ANA_PORT_VCAP_S2_CFG_S2_IP_TCPUDP_DIS(3) |
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ANA_PORT_VCAP_S2_CFG_S2_IP_OTHER_DIS(3) |
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ANA_PORT_VCAP_S2_CFG_S2_OAM_DIS(3);
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ocelot_rmw_gix(ocelot, val,
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ANA_PORT_VCAP_S2_CFG_S2_SNAP_DIS_M |
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ANA_PORT_VCAP_S2_CFG_S2_ARP_DIS_M |
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ANA_PORT_VCAP_S2_CFG_S2_IP_TCPUDP_DIS_M |
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ANA_PORT_VCAP_S2_CFG_S2_IP_OTHER_DIS_M |
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ANA_PORT_VCAP_S2_CFG_S2_OAM_DIS_M,
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ANA_PORT_VCAP_S2_CFG, port);
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}
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static bool ocelot_ace_is_problematic_mac_etype(struct ocelot_ace_rule *ace)
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{
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if (ace->type != OCELOT_ACE_TYPE_ETYPE)
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return false;
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if (ether_addr_to_u64(ace->frame.etype.dmac.value) &
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ether_addr_to_u64(ace->frame.etype.dmac.mask))
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return true;
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if (ether_addr_to_u64(ace->frame.etype.smac.value) &
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ether_addr_to_u64(ace->frame.etype.smac.mask))
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return true;
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return false;
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}
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static bool ocelot_ace_is_problematic_non_mac_etype(struct ocelot_ace_rule *ace)
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{
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if (ace->type == OCELOT_ACE_TYPE_SNAP)
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return true;
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if (ace->type == OCELOT_ACE_TYPE_ARP)
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return true;
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if (ace->type == OCELOT_ACE_TYPE_IPV4)
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return true;
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if (ace->type == OCELOT_ACE_TYPE_IPV6)
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return true;
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return false;
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}
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static bool ocelot_exclusive_mac_etype_ace_rules(struct ocelot *ocelot,
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struct ocelot_ace_rule *ace)
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{
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struct ocelot_acl_block *block = &ocelot->acl_block;
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struct ocelot_ace_rule *tmp;
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unsigned long port;
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int i;
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if (ocelot_ace_is_problematic_mac_etype(ace)) {
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/* Search for any non-MAC_ETYPE rules on the port */
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for (i = 0; i < block->count; i++) {
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tmp = ocelot_ace_rule_get_rule_index(block, i);
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if (tmp->ingress_port_mask & ace->ingress_port_mask &&
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ocelot_ace_is_problematic_non_mac_etype(tmp))
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return false;
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}
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for_each_set_bit(port, &ace->ingress_port_mask,
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ocelot->num_phys_ports)
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ocelot_match_all_as_mac_etype(ocelot, port, true);
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} else if (ocelot_ace_is_problematic_non_mac_etype(ace)) {
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/* Search for any MAC_ETYPE rules on the port */
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for (i = 0; i < block->count; i++) {
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tmp = ocelot_ace_rule_get_rule_index(block, i);
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if (tmp->ingress_port_mask & ace->ingress_port_mask &&
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ocelot_ace_is_problematic_mac_etype(tmp))
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return false;
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}
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for_each_set_bit(port, &ace->ingress_port_mask,
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ocelot->num_phys_ports)
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ocelot_match_all_as_mac_etype(ocelot, port, false);
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}
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return true;
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}
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int ocelot_ace_rule_offload_add(struct ocelot *ocelot,
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struct ocelot_ace_rule *rule)
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struct ocelot_ace_rule *rule,
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struct netlink_ext_ack *extack)
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{
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struct ocelot_acl_block *block = &ocelot->acl_block;
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struct ocelot_ace_rule *ace;
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int i, index;
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if (!ocelot_exclusive_mac_etype_ace_rules(ocelot, rule)) {
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NL_SET_ERR_MSG_MOD(extack,
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"Cannot mix MAC_ETYPE with non-MAC_ETYPE rules");
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return -EBUSY;
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}
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/* Add rule to the linked list */
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ocelot_ace_rule_add(ocelot, block, rule);
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@ -194,7 +194,7 @@ struct ocelot_ace_rule {
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enum ocelot_ace_action action;
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struct ocelot_ace_stats stats;
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u16 ingress_port_mask;
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unsigned long ingress_port_mask;
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enum ocelot_vcap_bit dmac_mc;
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enum ocelot_vcap_bit dmac_bc;
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@ -215,7 +215,8 @@ struct ocelot_ace_rule {
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};
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int ocelot_ace_rule_offload_add(struct ocelot *ocelot,
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struct ocelot_ace_rule *rule);
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struct ocelot_ace_rule *rule,
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struct netlink_ext_ack *extack);
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int ocelot_ace_rule_offload_del(struct ocelot *ocelot,
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struct ocelot_ace_rule *rule);
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int ocelot_ace_rule_stats_update(struct ocelot *ocelot,
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@ -205,7 +205,7 @@ int ocelot_cls_flower_replace(struct ocelot *ocelot, int port,
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return ret;
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}
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return ocelot_ace_rule_offload_add(ocelot, ace);
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return ocelot_ace_rule_offload_add(ocelot, ace, f->common.extack);
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}
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EXPORT_SYMBOL_GPL(ocelot_cls_flower_replace);
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