Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Коммит
8a2cf062b2
2
Makefile
2
Makefile
|
@ -1,7 +1,7 @@
|
|||
VERSION = 3
|
||||
PATCHLEVEL = 7
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||||
SUBLEVEL = 0
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EXTRAVERSION = -rc6
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EXTRAVERSION = -rc7
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NAME = Terrified Chipmunk
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|
||||
# *DOCUMENTATION*
|
||||
|
|
|
@ -652,6 +652,15 @@ __setup_mmu: sub r3, r4, #16384 @ Page directory size
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mov pc, lr
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ENDPROC(__setup_mmu)
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@ Enable unaligned access on v6, to allow better code generation
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@ for the decompressor C code:
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__armv6_mmu_cache_on:
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mrc p15, 0, r0, c1, c0, 0 @ read SCTLR
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bic r0, r0, #2 @ A (no unaligned access fault)
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orr r0, r0, #1 << 22 @ U (v6 unaligned access model)
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mcr p15, 0, r0, c1, c0, 0 @ write SCTLR
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b __armv4_mmu_cache_on
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__arm926ejs_mmu_cache_on:
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#ifdef CONFIG_CPU_DCACHE_WRITETHROUGH
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mov r0, #4 @ put dcache in WT mode
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|
@ -694,6 +703,9 @@ __armv7_mmu_cache_on:
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bic r0, r0, #1 << 28 @ clear SCTLR.TRE
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orr r0, r0, #0x5000 @ I-cache enable, RR cache replacement
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orr r0, r0, #0x003c @ write buffer
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bic r0, r0, #2 @ A (no unaligned access fault)
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orr r0, r0, #1 << 22 @ U (v6 unaligned access model)
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@ (needed for ARM1176)
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#ifdef CONFIG_MMU
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#ifdef CONFIG_CPU_ENDIAN_BE8
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orr r0, r0, #1 << 25 @ big-endian page tables
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|
@ -914,7 +926,7 @@ proc_types:
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.word 0x0007b000 @ ARMv6
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.word 0x000ff000
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W(b) __armv4_mmu_cache_on
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W(b) __armv6_mmu_cache_on
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W(b) __armv4_mmu_cache_off
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W(b) __armv6_mmu_cache_flush
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|
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|
|
|
@ -89,7 +89,7 @@ ENTRY(cpu_v6_dcache_clean_area)
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mov pc, lr
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/*
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* cpu_arm926_switch_mm(pgd_phys, tsk)
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* cpu_v6_switch_mm(pgd_phys, tsk)
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*
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* Set the translation table base pointer to be pgd_phys
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*
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|
|
|
@ -79,7 +79,7 @@ static struct resource data_resource = { .name = "Kernel data", };
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void __init add_memory_region(phys_t start, phys_t size, long type)
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{
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int x = boot_mem_map.nr_map;
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struct boot_mem_map_entry *prev = boot_mem_map.map + x - 1;
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int i;
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|
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/* Sanity check */
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if (start + size < start) {
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|
@ -88,15 +88,29 @@ void __init add_memory_region(phys_t start, phys_t size, long type)
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}
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/*
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* Try to merge with previous entry if any. This is far less than
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* perfect but is sufficient for most real world cases.
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* Try to merge with existing entry, if any.
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*/
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if (x && prev->addr + prev->size == start && prev->type == type) {
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prev->size += size;
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for (i = 0; i < boot_mem_map.nr_map; i++) {
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struct boot_mem_map_entry *entry = boot_mem_map.map + i;
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unsigned long top;
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|
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if (entry->type != type)
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continue;
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if (start + size < entry->addr)
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continue; /* no overlap */
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|
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if (entry->addr + entry->size < start)
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continue; /* no overlap */
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|
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top = max(entry->addr + entry->size, start + size);
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entry->addr = min(entry->addr, start);
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entry->size = top - entry->addr;
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return;
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}
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|
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if (x == BOOT_MEM_MAP_MAX) {
|
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if (boot_mem_map.nr_map == BOOT_MEM_MAP_MAX) {
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pr_err("Ooops! Too many entries in the memory map!\n");
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return;
|
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}
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|
|
|
@ -56,7 +56,7 @@ __asm__(
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|||
" .set pop \n"
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" .endm \n");
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|
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void arch_local_irq_disable(void)
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notrace void arch_local_irq_disable(void)
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{
|
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preempt_disable();
|
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__asm__ __volatile__(
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|
@ -93,7 +93,7 @@ __asm__(
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" .set pop \n"
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" .endm \n");
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|
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unsigned long arch_local_irq_save(void)
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notrace unsigned long arch_local_irq_save(void)
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{
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unsigned long flags;
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preempt_disable();
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|
@ -135,7 +135,7 @@ __asm__(
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" .set pop \n"
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" .endm \n");
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void arch_local_irq_restore(unsigned long flags)
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notrace void arch_local_irq_restore(unsigned long flags)
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{
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unsigned long __tmp1;
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|
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|
@ -159,7 +159,7 @@ void arch_local_irq_restore(unsigned long flags)
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EXPORT_SYMBOL(arch_local_irq_restore);
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|
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|
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void __arch_local_irq_restore(unsigned long flags)
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notrace void __arch_local_irq_restore(unsigned long flags)
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||||
{
|
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unsigned long __tmp1;
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||||
|
||||
|
|
|
@ -449,7 +449,7 @@ int eeh_rmv_from_parent_pe(struct eeh_dev *edev, int purge_pe)
|
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if (list_empty(&pe->edevs)) {
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cnt = 0;
|
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list_for_each_entry(child, &pe->child_list, child) {
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if (!(pe->type & EEH_PE_INVALID)) {
|
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if (!(child->type & EEH_PE_INVALID)) {
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cnt++;
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break;
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}
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|
|
|
@ -220,7 +220,8 @@ static struct device_node *find_pe_dn(struct pci_dev *dev, int *total)
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|
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/* Get the top level device in the PE */
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edev = of_node_to_eeh_dev(dn);
|
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edev = list_first_entry(&edev->pe->edevs, struct eeh_dev, list);
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if (edev->pe)
|
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edev = list_first_entry(&edev->pe->edevs, struct eeh_dev, list);
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dn = eeh_dev_to_of_node(edev);
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if (!dn)
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return NULL;
|
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|
|
|
@ -1961,6 +1961,7 @@ static int __devinit ucode_init (loader_block * lb, amb_dev * dev) {
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res = loader_verify(lb, dev, rec);
|
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if (res)
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break;
|
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rec = ihex_next_binrec(rec);
|
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}
|
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release_firmware(fw);
|
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if (!res)
|
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|
|
|
@ -300,15 +300,15 @@ static enum fe_stv0900_error stv0900_set_mclk(struct stv0900_internal *intp, u32
|
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{
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u32 m_div, clk_sel;
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|
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dprintk("%s: Mclk set to %d, Quartz = %d\n", __func__, mclk,
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intp->quartz);
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|
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if (intp == NULL)
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return STV0900_INVALID_HANDLE;
|
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|
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if (intp->errs)
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return STV0900_I2C_ERROR;
|
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|
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dprintk("%s: Mclk set to %d, Quartz = %d\n", __func__, mclk,
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intp->quartz);
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clk_sel = ((stv0900_get_bits(intp, F0900_SELX1RATIO) == 1) ? 4 : 6);
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m_div = ((clk_sel * mclk) / intp->quartz) - 1;
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stv0900_write_bits(intp, F0900_M_DIV, m_div);
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|
|
|
@ -53,8 +53,7 @@ MODULE_LICENSE("GPL");
|
|||
/* ADV7604 system clock frequency */
|
||||
#define ADV7604_fsc (28636360)
|
||||
|
||||
#define DIGITAL_INPUT ((state->prim_mode == ADV7604_PRIM_MODE_HDMI_COMP) || \
|
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(state->prim_mode == ADV7604_PRIM_MODE_HDMI_GR))
|
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#define DIGITAL_INPUT (state->mode == ADV7604_MODE_HDMI)
|
||||
|
||||
/*
|
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**********************************************************************
|
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|
@ -68,7 +67,7 @@ struct adv7604_state {
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struct v4l2_subdev sd;
|
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struct media_pad pad;
|
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struct v4l2_ctrl_handler hdl;
|
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enum adv7604_prim_mode prim_mode;
|
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enum adv7604_mode mode;
|
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struct v4l2_dv_timings timings;
|
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u8 edid[256];
|
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unsigned edid_blocks;
|
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|
@ -77,6 +76,7 @@ struct adv7604_state {
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struct workqueue_struct *work_queues;
|
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struct delayed_work delayed_work_enable_hotplug;
|
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bool connector_hdmi;
|
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bool restart_stdi_once;
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/* i2c clients */
|
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struct i2c_client *i2c_avlink;
|
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|
@ -106,7 +106,6 @@ static const struct v4l2_dv_timings adv7604_timings[] = {
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V4L2_DV_BT_CEA_720X576P50,
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V4L2_DV_BT_CEA_1280X720P24,
|
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V4L2_DV_BT_CEA_1280X720P25,
|
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V4L2_DV_BT_CEA_1280X720P30,
|
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V4L2_DV_BT_CEA_1280X720P50,
|
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V4L2_DV_BT_CEA_1280X720P60,
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V4L2_DV_BT_CEA_1920X1080P24,
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|
@ -115,6 +114,7 @@ static const struct v4l2_dv_timings adv7604_timings[] = {
|
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V4L2_DV_BT_CEA_1920X1080P50,
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V4L2_DV_BT_CEA_1920X1080P60,
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|
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/* sorted by DMT ID */
|
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V4L2_DV_BT_DMT_640X350P85,
|
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V4L2_DV_BT_DMT_640X400P85,
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V4L2_DV_BT_DMT_720X400P85,
|
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|
@ -164,6 +164,89 @@ static const struct v4l2_dv_timings adv7604_timings[] = {
|
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{ },
|
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};
|
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|
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struct adv7604_video_standards {
|
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struct v4l2_dv_timings timings;
|
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u8 vid_std;
|
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u8 v_freq;
|
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};
|
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|
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/* sorted by number of lines */
|
||||
static const struct adv7604_video_standards adv7604_prim_mode_comp[] = {
|
||||
/* { V4L2_DV_BT_CEA_720X480P59_94, 0x0a, 0x00 }, TODO flickering */
|
||||
{ V4L2_DV_BT_CEA_720X576P50, 0x0b, 0x00 },
|
||||
{ V4L2_DV_BT_CEA_1280X720P50, 0x19, 0x01 },
|
||||
{ V4L2_DV_BT_CEA_1280X720P60, 0x19, 0x00 },
|
||||
{ V4L2_DV_BT_CEA_1920X1080P24, 0x1e, 0x04 },
|
||||
{ V4L2_DV_BT_CEA_1920X1080P25, 0x1e, 0x03 },
|
||||
{ V4L2_DV_BT_CEA_1920X1080P30, 0x1e, 0x02 },
|
||||
{ V4L2_DV_BT_CEA_1920X1080P50, 0x1e, 0x01 },
|
||||
{ V4L2_DV_BT_CEA_1920X1080P60, 0x1e, 0x00 },
|
||||
/* TODO add 1920x1080P60_RB (CVT timing) */
|
||||
{ },
|
||||
};
|
||||
|
||||
/* sorted by number of lines */
|
||||
static const struct adv7604_video_standards adv7604_prim_mode_gr[] = {
|
||||
{ V4L2_DV_BT_DMT_640X480P60, 0x08, 0x00 },
|
||||
{ V4L2_DV_BT_DMT_640X480P72, 0x09, 0x00 },
|
||||
{ V4L2_DV_BT_DMT_640X480P75, 0x0a, 0x00 },
|
||||
{ V4L2_DV_BT_DMT_640X480P85, 0x0b, 0x00 },
|
||||
{ V4L2_DV_BT_DMT_800X600P56, 0x00, 0x00 },
|
||||
{ V4L2_DV_BT_DMT_800X600P60, 0x01, 0x00 },
|
||||
{ V4L2_DV_BT_DMT_800X600P72, 0x02, 0x00 },
|
||||
{ V4L2_DV_BT_DMT_800X600P75, 0x03, 0x00 },
|
||||
{ V4L2_DV_BT_DMT_800X600P85, 0x04, 0x00 },
|
||||
{ V4L2_DV_BT_DMT_1024X768P60, 0x0c, 0x00 },
|
||||
{ V4L2_DV_BT_DMT_1024X768P70, 0x0d, 0x00 },
|
||||
{ V4L2_DV_BT_DMT_1024X768P75, 0x0e, 0x00 },
|
||||
{ V4L2_DV_BT_DMT_1024X768P85, 0x0f, 0x00 },
|
||||
{ V4L2_DV_BT_DMT_1280X1024P60, 0x05, 0x00 },
|
||||
{ V4L2_DV_BT_DMT_1280X1024P75, 0x06, 0x00 },
|
||||
{ V4L2_DV_BT_DMT_1360X768P60, 0x12, 0x00 },
|
||||
{ V4L2_DV_BT_DMT_1366X768P60, 0x13, 0x00 },
|
||||
{ V4L2_DV_BT_DMT_1400X1050P60, 0x14, 0x00 },
|
||||
{ V4L2_DV_BT_DMT_1400X1050P75, 0x15, 0x00 },
|
||||
{ V4L2_DV_BT_DMT_1600X1200P60, 0x16, 0x00 }, /* TODO not tested */
|
||||
/* TODO add 1600X1200P60_RB (not a DMT timing) */
|
||||
{ V4L2_DV_BT_DMT_1680X1050P60, 0x18, 0x00 },
|
||||
{ V4L2_DV_BT_DMT_1920X1200P60_RB, 0x19, 0x00 }, /* TODO not tested */
|
||||
{ },
|
||||
};
|
||||
|
||||
/* sorted by number of lines */
|
||||
static const struct adv7604_video_standards adv7604_prim_mode_hdmi_comp[] = {
|
||||
{ V4L2_DV_BT_CEA_720X480P59_94, 0x0a, 0x00 },
|
||||
{ V4L2_DV_BT_CEA_720X576P50, 0x0b, 0x00 },
|
||||
{ V4L2_DV_BT_CEA_1280X720P50, 0x13, 0x01 },
|
||||
{ V4L2_DV_BT_CEA_1280X720P60, 0x13, 0x00 },
|
||||
{ V4L2_DV_BT_CEA_1920X1080P24, 0x1e, 0x04 },
|
||||
{ V4L2_DV_BT_CEA_1920X1080P25, 0x1e, 0x03 },
|
||||
{ V4L2_DV_BT_CEA_1920X1080P30, 0x1e, 0x02 },
|
||||
{ V4L2_DV_BT_CEA_1920X1080P50, 0x1e, 0x01 },
|
||||
{ V4L2_DV_BT_CEA_1920X1080P60, 0x1e, 0x00 },
|
||||
{ },
|
||||
};
|
||||
|
||||
/* sorted by number of lines */
|
||||
static const struct adv7604_video_standards adv7604_prim_mode_hdmi_gr[] = {
|
||||
{ V4L2_DV_BT_DMT_640X480P60, 0x08, 0x00 },
|
||||
{ V4L2_DV_BT_DMT_640X480P72, 0x09, 0x00 },
|
||||
{ V4L2_DV_BT_DMT_640X480P75, 0x0a, 0x00 },
|
||||
{ V4L2_DV_BT_DMT_640X480P85, 0x0b, 0x00 },
|
||||
{ V4L2_DV_BT_DMT_800X600P56, 0x00, 0x00 },
|
||||
{ V4L2_DV_BT_DMT_800X600P60, 0x01, 0x00 },
|
||||
{ V4L2_DV_BT_DMT_800X600P72, 0x02, 0x00 },
|
||||
{ V4L2_DV_BT_DMT_800X600P75, 0x03, 0x00 },
|
||||
{ V4L2_DV_BT_DMT_800X600P85, 0x04, 0x00 },
|
||||
{ V4L2_DV_BT_DMT_1024X768P60, 0x0c, 0x00 },
|
||||
{ V4L2_DV_BT_DMT_1024X768P70, 0x0d, 0x00 },
|
||||
{ V4L2_DV_BT_DMT_1024X768P75, 0x0e, 0x00 },
|
||||
{ V4L2_DV_BT_DMT_1024X768P85, 0x0f, 0x00 },
|
||||
{ V4L2_DV_BT_DMT_1280X1024P60, 0x05, 0x00 },
|
||||
{ V4L2_DV_BT_DMT_1280X1024P75, 0x06, 0x00 },
|
||||
{ },
|
||||
};
|
||||
|
||||
/* ----------------------------------------------------------------------- */
|
||||
|
||||
static inline struct adv7604_state *to_state(struct v4l2_subdev *sd)
|
||||
|
@ -672,64 +755,144 @@ static int adv7604_s_detect_tx_5v_ctrl(struct v4l2_subdev *sd)
|
|||
((io_read(sd, 0x6f) & 0x10) >> 4));
|
||||
}
|
||||
|
||||
static void configure_free_run(struct v4l2_subdev *sd, const struct v4l2_bt_timings *timings)
|
||||
static int find_and_set_predefined_video_timings(struct v4l2_subdev *sd,
|
||||
u8 prim_mode,
|
||||
const struct adv7604_video_standards *predef_vid_timings,
|
||||
const struct v4l2_dv_timings *timings)
|
||||
{
|
||||
struct adv7604_state *state = to_state(sd);
|
||||
int i;
|
||||
|
||||
for (i = 0; predef_vid_timings[i].timings.bt.width; i++) {
|
||||
if (!v4l_match_dv_timings(timings, &predef_vid_timings[i].timings,
|
||||
DIGITAL_INPUT ? 250000 : 1000000))
|
||||
continue;
|
||||
io_write(sd, 0x00, predef_vid_timings[i].vid_std); /* video std */
|
||||
io_write(sd, 0x01, (predef_vid_timings[i].v_freq << 4) +
|
||||
prim_mode); /* v_freq and prim mode */
|
||||
return 0;
|
||||
}
|
||||
|
||||
return -1;
|
||||
}
|
||||
|
||||
static int configure_predefined_video_timings(struct v4l2_subdev *sd,
|
||||
struct v4l2_dv_timings *timings)
|
||||
{
|
||||
struct adv7604_state *state = to_state(sd);
|
||||
int err;
|
||||
|
||||
v4l2_dbg(1, debug, sd, "%s", __func__);
|
||||
|
||||
/* reset to default values */
|
||||
io_write(sd, 0x16, 0x43);
|
||||
io_write(sd, 0x17, 0x5a);
|
||||
/* disable embedded syncs for auto graphics mode */
|
||||
cp_write_and_or(sd, 0x81, 0xef, 0x00);
|
||||
cp_write(sd, 0x8f, 0x00);
|
||||
cp_write(sd, 0x90, 0x00);
|
||||
cp_write(sd, 0xa2, 0x00);
|
||||
cp_write(sd, 0xa3, 0x00);
|
||||
cp_write(sd, 0xa4, 0x00);
|
||||
cp_write(sd, 0xa5, 0x00);
|
||||
cp_write(sd, 0xa6, 0x00);
|
||||
cp_write(sd, 0xa7, 0x00);
|
||||
cp_write(sd, 0xab, 0x00);
|
||||
cp_write(sd, 0xac, 0x00);
|
||||
|
||||
switch (state->mode) {
|
||||
case ADV7604_MODE_COMP:
|
||||
case ADV7604_MODE_GR:
|
||||
err = find_and_set_predefined_video_timings(sd,
|
||||
0x01, adv7604_prim_mode_comp, timings);
|
||||
if (err)
|
||||
err = find_and_set_predefined_video_timings(sd,
|
||||
0x02, adv7604_prim_mode_gr, timings);
|
||||
break;
|
||||
case ADV7604_MODE_HDMI:
|
||||
err = find_and_set_predefined_video_timings(sd,
|
||||
0x05, adv7604_prim_mode_hdmi_comp, timings);
|
||||
if (err)
|
||||
err = find_and_set_predefined_video_timings(sd,
|
||||
0x06, adv7604_prim_mode_hdmi_gr, timings);
|
||||
break;
|
||||
default:
|
||||
v4l2_dbg(2, debug, sd, "%s: Unknown mode %d\n",
|
||||
__func__, state->mode);
|
||||
err = -1;
|
||||
break;
|
||||
}
|
||||
|
||||
|
||||
return err;
|
||||
}
|
||||
|
||||
static void configure_custom_video_timings(struct v4l2_subdev *sd,
|
||||
const struct v4l2_bt_timings *bt)
|
||||
{
|
||||
struct adv7604_state *state = to_state(sd);
|
||||
struct i2c_client *client = v4l2_get_subdevdata(sd);
|
||||
u32 width = htotal(timings);
|
||||
u32 height = vtotal(timings);
|
||||
u16 ch1_fr_ll = (((u32)timings->pixelclock / 100) > 0) ?
|
||||
((width * (ADV7604_fsc / 100)) / ((u32)timings->pixelclock / 100)) : 0;
|
||||
u32 width = htotal(bt);
|
||||
u32 height = vtotal(bt);
|
||||
u16 cp_start_sav = bt->hsync + bt->hbackporch - 4;
|
||||
u16 cp_start_eav = width - bt->hfrontporch;
|
||||
u16 cp_start_vbi = height - bt->vfrontporch;
|
||||
u16 cp_end_vbi = bt->vsync + bt->vbackporch;
|
||||
u16 ch1_fr_ll = (((u32)bt->pixelclock / 100) > 0) ?
|
||||
((width * (ADV7604_fsc / 100)) / ((u32)bt->pixelclock / 100)) : 0;
|
||||
const u8 pll[2] = {
|
||||
0xc0 | ((width >> 8) & 0x1f),
|
||||
width & 0xff
|
||||
};
|
||||
|
||||
v4l2_dbg(2, debug, sd, "%s\n", __func__);
|
||||
|
||||
cp_write(sd, 0x8f, (ch1_fr_ll >> 8) & 0x7); /* CH1_FR_LL */
|
||||
cp_write(sd, 0x90, ch1_fr_ll & 0xff); /* CH1_FR_LL */
|
||||
cp_write(sd, 0xab, (height >> 4) & 0xff); /* CP_LCOUNT_MAX */
|
||||
cp_write(sd, 0xac, (height & 0x0f) << 4); /* CP_LCOUNT_MAX */
|
||||
/* TODO support interlaced */
|
||||
cp_write(sd, 0x91, 0x10); /* INTERLACED */
|
||||
|
||||
/* Should only be set in auto-graphics mode [REF_02 p. 91-92] */
|
||||
if ((io_read(sd, 0x00) == 0x07) && (io_read(sd, 0x01) == 0x02)) {
|
||||
u16 cp_start_sav, cp_start_eav, cp_start_vbi, cp_end_vbi;
|
||||
const u8 pll[2] = {
|
||||
(0xc0 | ((width >> 8) & 0x1f)),
|
||||
(width & 0xff)
|
||||
};
|
||||
switch (state->mode) {
|
||||
case ADV7604_MODE_COMP:
|
||||
case ADV7604_MODE_GR:
|
||||
/* auto graphics */
|
||||
io_write(sd, 0x00, 0x07); /* video std */
|
||||
io_write(sd, 0x01, 0x02); /* prim mode */
|
||||
/* enable embedded syncs for auto graphics mode */
|
||||
cp_write_and_or(sd, 0x81, 0xef, 0x10);
|
||||
|
||||
/* Should only be set in auto-graphics mode [REF_02, p. 91-92] */
|
||||
/* setup PLL_DIV_MAN_EN and PLL_DIV_RATIO */
|
||||
/* IO-map reg. 0x16 and 0x17 should be written in sequence */
|
||||
if (adv_smbus_write_i2c_block_data(client, 0x16, 2, pll)) {
|
||||
v4l2_err(sd, "writing to reg 0x16 and 0x17 failed\n");
|
||||
return;
|
||||
break;
|
||||
}
|
||||
|
||||
/* active video - horizontal timing */
|
||||
cp_start_sav = timings->hsync + timings->hbackporch - 4;
|
||||
cp_start_eav = width - timings->hfrontporch;
|
||||
cp_write(sd, 0xa2, (cp_start_sav >> 4) & 0xff);
|
||||
cp_write(sd, 0xa3, ((cp_start_sav & 0x0f) << 4) | ((cp_start_eav >> 8) & 0x0f));
|
||||
cp_write(sd, 0xa3, ((cp_start_sav & 0x0f) << 4) |
|
||||
((cp_start_eav >> 8) & 0x0f));
|
||||
cp_write(sd, 0xa4, cp_start_eav & 0xff);
|
||||
|
||||
/* active video - vertical timing */
|
||||
cp_start_vbi = height - timings->vfrontporch;
|
||||
cp_end_vbi = timings->vsync + timings->vbackporch;
|
||||
cp_write(sd, 0xa5, (cp_start_vbi >> 4) & 0xff);
|
||||
cp_write(sd, 0xa6, ((cp_start_vbi & 0xf) << 4) | ((cp_end_vbi >> 8) & 0xf));
|
||||
cp_write(sd, 0xa6, ((cp_start_vbi & 0xf) << 4) |
|
||||
((cp_end_vbi >> 8) & 0xf));
|
||||
cp_write(sd, 0xa7, cp_end_vbi & 0xff);
|
||||
} else {
|
||||
/* reset to default values */
|
||||
io_write(sd, 0x16, 0x43);
|
||||
io_write(sd, 0x17, 0x5a);
|
||||
cp_write(sd, 0xa2, 0x00);
|
||||
cp_write(sd, 0xa3, 0x00);
|
||||
cp_write(sd, 0xa4, 0x00);
|
||||
cp_write(sd, 0xa5, 0x00);
|
||||
cp_write(sd, 0xa6, 0x00);
|
||||
cp_write(sd, 0xa7, 0x00);
|
||||
break;
|
||||
case ADV7604_MODE_HDMI:
|
||||
/* set default prim_mode/vid_std for HDMI
|
||||
accoring to [REF_03, c. 4.2] */
|
||||
io_write(sd, 0x00, 0x02); /* video std */
|
||||
io_write(sd, 0x01, 0x06); /* prim mode */
|
||||
break;
|
||||
default:
|
||||
v4l2_dbg(2, debug, sd, "%s: Unknown mode %d\n",
|
||||
__func__, state->mode);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
cp_write(sd, 0x8f, (ch1_fr_ll >> 8) & 0x7);
|
||||
cp_write(sd, 0x90, ch1_fr_ll & 0xff);
|
||||
cp_write(sd, 0xab, (height >> 4) & 0xff);
|
||||
cp_write(sd, 0xac, (height & 0x0f) << 4);
|
||||
}
|
||||
|
||||
static void set_rgb_quantization_range(struct v4l2_subdev *sd)
|
||||
{
|
||||
|
@ -738,12 +901,7 @@ static void set_rgb_quantization_range(struct v4l2_subdev *sd)
|
|||
switch (state->rgb_quantization_range) {
|
||||
case V4L2_DV_RGB_RANGE_AUTO:
|
||||
/* automatic */
|
||||
if ((hdmi_read(sd, 0x05) & 0x80) ||
|
||||
(state->prim_mode == ADV7604_PRIM_MODE_COMP) ||
|
||||
(state->prim_mode == ADV7604_PRIM_MODE_RGB)) {
|
||||
/* receiving HDMI or analog signal */
|
||||
io_write_and_or(sd, 0x02, 0x0f, 0xf0);
|
||||
} else {
|
||||
if (DIGITAL_INPUT && !(hdmi_read(sd, 0x05) & 0x80)) {
|
||||
/* receiving DVI-D signal */
|
||||
|
||||
/* ADV7604 selects RGB limited range regardless of
|
||||
|
@ -756,6 +914,9 @@ static void set_rgb_quantization_range(struct v4l2_subdev *sd)
|
|||
/* RGB full range (0-255) */
|
||||
io_write_and_or(sd, 0x02, 0x0f, 0x10);
|
||||
}
|
||||
} else {
|
||||
/* receiving HDMI or analog signal, set automode */
|
||||
io_write_and_or(sd, 0x02, 0x0f, 0xf0);
|
||||
}
|
||||
break;
|
||||
case V4L2_DV_RGB_RANGE_LIMITED:
|
||||
|
@ -967,8 +1128,10 @@ static int stdi2dv_timings(struct v4l2_subdev *sd,
|
|||
state->aspect_ratio, timings))
|
||||
return 0;
|
||||
|
||||
v4l2_dbg(2, debug, sd, "%s: No format candidate found for lcf=%d, bl = %d\n",
|
||||
__func__, stdi->lcf, stdi->bl);
|
||||
v4l2_dbg(2, debug, sd,
|
||||
"%s: No format candidate found for lcvs = %d, lcf=%d, bl = %d, %chsync, %cvsync\n",
|
||||
__func__, stdi->lcvs, stdi->lcf, stdi->bl,
|
||||
stdi->hs_pol, stdi->vs_pol);
|
||||
return -1;
|
||||
}
|
||||
|
||||
|
@ -1123,7 +1286,7 @@ static int adv7604_query_dv_timings(struct v4l2_subdev *sd,
|
|||
adv7604_fill_optional_dv_timings_fields(sd, timings);
|
||||
} else {
|
||||
/* find format
|
||||
* Since LCVS values are inaccurate (REF_03, page 275-276),
|
||||
* Since LCVS values are inaccurate [REF_03, p. 275-276],
|
||||
* stdi2dv_timings() is called with lcvs +-1 if the first attempt fails.
|
||||
*/
|
||||
if (!stdi2dv_timings(sd, &stdi, timings))
|
||||
|
@ -1135,9 +1298,31 @@ static int adv7604_query_dv_timings(struct v4l2_subdev *sd,
|
|||
stdi.lcvs -= 2;
|
||||
v4l2_dbg(1, debug, sd, "%s: lcvs - 1 = %d\n", __func__, stdi.lcvs);
|
||||
if (stdi2dv_timings(sd, &stdi, timings)) {
|
||||
/*
|
||||
* The STDI block may measure wrong values, especially
|
||||
* for lcvs and lcf. If the driver can not find any
|
||||
* valid timing, the STDI block is restarted to measure
|
||||
* the video timings again. The function will return an
|
||||
* error, but the restart of STDI will generate a new
|
||||
* STDI interrupt and the format detection process will
|
||||
* restart.
|
||||
*/
|
||||
if (state->restart_stdi_once) {
|
||||
v4l2_dbg(1, debug, sd, "%s: restart STDI\n", __func__);
|
||||
/* TODO restart STDI for Sync Channel 2 */
|
||||
/* enter one-shot mode */
|
||||
cp_write_and_or(sd, 0x86, 0xf9, 0x00);
|
||||
/* trigger STDI restart */
|
||||
cp_write_and_or(sd, 0x86, 0xf9, 0x04);
|
||||
/* reset to continuous mode */
|
||||
cp_write_and_or(sd, 0x86, 0xf9, 0x02);
|
||||
state->restart_stdi_once = false;
|
||||
return -ENOLINK;
|
||||
}
|
||||
v4l2_dbg(1, debug, sd, "%s: format not supported\n", __func__);
|
||||
return -ERANGE;
|
||||
}
|
||||
state->restart_stdi_once = true;
|
||||
}
|
||||
found:
|
||||
|
||||
|
@ -1166,6 +1351,7 @@ static int adv7604_s_dv_timings(struct v4l2_subdev *sd,
|
|||
{
|
||||
struct adv7604_state *state = to_state(sd);
|
||||
struct v4l2_bt_timings *bt;
|
||||
int err;
|
||||
|
||||
if (!timings)
|
||||
return -EINVAL;
|
||||
|
@ -1178,12 +1364,20 @@ static int adv7604_s_dv_timings(struct v4l2_subdev *sd,
|
|||
__func__, (u32)bt->pixelclock);
|
||||
return -ERANGE;
|
||||
}
|
||||
|
||||
adv7604_fill_optional_dv_timings_fields(sd, timings);
|
||||
|
||||
state->timings = *timings;
|
||||
|
||||
/* freerun */
|
||||
configure_free_run(sd, bt);
|
||||
cp_write(sd, 0x91, bt->interlaced ? 0x50 : 0x10);
|
||||
|
||||
/* Use prim_mode and vid_std when available */
|
||||
err = configure_predefined_video_timings(sd, timings);
|
||||
if (err) {
|
||||
/* custom settings when the video format
|
||||
does not have prim_mode/vid_std */
|
||||
configure_custom_video_timings(sd, bt);
|
||||
}
|
||||
|
||||
set_rgb_quantization_range(sd);
|
||||
|
||||
|
@ -1203,24 +1397,25 @@ static int adv7604_g_dv_timings(struct v4l2_subdev *sd,
|
|||
return 0;
|
||||
}
|
||||
|
||||
static void enable_input(struct v4l2_subdev *sd, enum adv7604_prim_mode prim_mode)
|
||||
static void enable_input(struct v4l2_subdev *sd)
|
||||
{
|
||||
switch (prim_mode) {
|
||||
case ADV7604_PRIM_MODE_COMP:
|
||||
case ADV7604_PRIM_MODE_RGB:
|
||||
struct adv7604_state *state = to_state(sd);
|
||||
|
||||
switch (state->mode) {
|
||||
case ADV7604_MODE_COMP:
|
||||
case ADV7604_MODE_GR:
|
||||
/* enable */
|
||||
io_write(sd, 0x15, 0xb0); /* Disable Tristate of Pins (no audio) */
|
||||
break;
|
||||
case ADV7604_PRIM_MODE_HDMI_COMP:
|
||||
case ADV7604_PRIM_MODE_HDMI_GR:
|
||||
case ADV7604_MODE_HDMI:
|
||||
/* enable */
|
||||
hdmi_write(sd, 0x1a, 0x0a); /* Unmute audio */
|
||||
hdmi_write(sd, 0x01, 0x00); /* Enable HDMI clock terminators */
|
||||
io_write(sd, 0x15, 0xa0); /* Disable Tristate of Pins */
|
||||
break;
|
||||
default:
|
||||
v4l2_err(sd, "%s: reserved primary mode 0x%0x\n",
|
||||
__func__, prim_mode);
|
||||
v4l2_dbg(2, debug, sd, "%s: Unknown mode %d\n",
|
||||
__func__, state->mode);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
@ -1233,17 +1428,13 @@ static void disable_input(struct v4l2_subdev *sd)
|
|||
hdmi_write(sd, 0x01, 0x78); /* Disable HDMI clock terminators */
|
||||
}
|
||||
|
||||
static void select_input(struct v4l2_subdev *sd, enum adv7604_prim_mode prim_mode)
|
||||
static void select_input(struct v4l2_subdev *sd)
|
||||
{
|
||||
switch (prim_mode) {
|
||||
case ADV7604_PRIM_MODE_COMP:
|
||||
case ADV7604_PRIM_MODE_RGB:
|
||||
/* set mode and select free run resolution */
|
||||
io_write(sd, 0x00, 0x07); /* video std */
|
||||
io_write(sd, 0x01, 0x02); /* prim mode */
|
||||
/* enable embedded syncs for auto graphics mode */
|
||||
cp_write_and_or(sd, 0x81, 0xef, 0x10);
|
||||
struct adv7604_state *state = to_state(sd);
|
||||
|
||||
switch (state->mode) {
|
||||
case ADV7604_MODE_COMP:
|
||||
case ADV7604_MODE_GR:
|
||||
/* reset ADI recommended settings for HDMI: */
|
||||
/* "ADV7604 Register Settings Recommendations (rev. 2.5, June 2010)" p. 4. */
|
||||
hdmi_write(sd, 0x0d, 0x04); /* HDMI filter optimization */
|
||||
|
@ -1271,16 +1462,7 @@ static void select_input(struct v4l2_subdev *sd, enum adv7604_prim_mode prim_mod
|
|||
cp_write(sd, 0x40, 0x5c); /* CP core pre-gain control. Graphics mode */
|
||||
break;
|
||||
|
||||
case ADV7604_PRIM_MODE_HDMI_COMP:
|
||||
case ADV7604_PRIM_MODE_HDMI_GR:
|
||||
/* set mode and select free run resolution */
|
||||
/* video std */
|
||||
io_write(sd, 0x00,
|
||||
(prim_mode == ADV7604_PRIM_MODE_HDMI_GR) ? 0x02 : 0x1e);
|
||||
io_write(sd, 0x01, prim_mode); /* prim mode */
|
||||
/* disable embedded syncs for auto graphics mode */
|
||||
cp_write_and_or(sd, 0x81, 0xef, 0x00);
|
||||
|
||||
case ADV7604_MODE_HDMI:
|
||||
/* set ADI recommended settings for HDMI: */
|
||||
/* "ADV7604 Register Settings Recommendations (rev. 2.5, June 2010)" p. 4. */
|
||||
hdmi_write(sd, 0x0d, 0x84); /* HDMI filter optimization */
|
||||
|
@ -1309,7 +1491,8 @@ static void select_input(struct v4l2_subdev *sd, enum adv7604_prim_mode prim_mod
|
|||
|
||||
break;
|
||||
default:
|
||||
v4l2_err(sd, "%s: reserved primary mode 0x%0x\n", __func__, prim_mode);
|
||||
v4l2_dbg(2, debug, sd, "%s: Unknown mode %d\n",
|
||||
__func__, state->mode);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
@ -1321,26 +1504,13 @@ static int adv7604_s_routing(struct v4l2_subdev *sd,
|
|||
|
||||
v4l2_dbg(2, debug, sd, "%s: input %d", __func__, input);
|
||||
|
||||
switch (input) {
|
||||
case 0:
|
||||
/* TODO select HDMI_COMP or HDMI_GR */
|
||||
state->prim_mode = ADV7604_PRIM_MODE_HDMI_COMP;
|
||||
break;
|
||||
case 1:
|
||||
state->prim_mode = ADV7604_PRIM_MODE_RGB;
|
||||
break;
|
||||
case 2:
|
||||
state->prim_mode = ADV7604_PRIM_MODE_COMP;
|
||||
break;
|
||||
default:
|
||||
return -EINVAL;
|
||||
}
|
||||
state->mode = input;
|
||||
|
||||
disable_input(sd);
|
||||
|
||||
select_input(sd, state->prim_mode);
|
||||
select_input(sd);
|
||||
|
||||
enable_input(sd, state->prim_mode);
|
||||
enable_input(sd);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
@ -1549,8 +1719,9 @@ static int adv7604_log_status(struct v4l2_subdev *sd)
|
|||
v4l2_info(sd, "CP locked: %s\n", no_lock_cp(sd) ? "false" : "true");
|
||||
v4l2_info(sd, "CP free run: %s\n",
|
||||
(!!(cp_read(sd, 0xff) & 0x10) ? "on" : "off"));
|
||||
v4l2_info(sd, "Prim-mode = 0x%x, video std = 0x%x\n",
|
||||
io_read(sd, 0x01) & 0x0f, io_read(sd, 0x00) & 0x3f);
|
||||
v4l2_info(sd, "Prim-mode = 0x%x, video std = 0x%x, v_freq = 0x%x\n",
|
||||
io_read(sd, 0x01) & 0x0f, io_read(sd, 0x00) & 0x3f,
|
||||
(io_read(sd, 0x01) & 0x70) >> 4);
|
||||
|
||||
v4l2_info(sd, "-----Video Timings-----\n");
|
||||
if (read_stdi(sd, &stdi))
|
||||
|
@ -1712,9 +1883,9 @@ static int adv7604_core_init(struct v4l2_subdev *sd)
|
|||
cp_write(sd, 0xba, (pdata->hdmi_free_run_mode << 1) | 0x01); /* HDMI free run */
|
||||
cp_write(sd, 0xf3, 0xdc); /* Low threshold to enter/exit free run mode */
|
||||
cp_write(sd, 0xf9, 0x23); /* STDI ch. 1 - LCVS change threshold -
|
||||
ADI recommended setting [REF_01 c. 2.3.3] */
|
||||
ADI recommended setting [REF_01, c. 2.3.3] */
|
||||
cp_write(sd, 0x45, 0x23); /* STDI ch. 2 - LCVS change threshold -
|
||||
ADI recommended setting [REF_01 c. 2.3.3] */
|
||||
ADI recommended setting [REF_01, c. 2.3.3] */
|
||||
cp_write(sd, 0xc9, 0x2d); /* use prim_mode and vid_std as free run resolution
|
||||
for digital formats */
|
||||
|
||||
|
@ -1724,11 +1895,6 @@ static int adv7604_core_init(struct v4l2_subdev *sd)
|
|||
afe_write(sd, 0x02, pdata->ain_sel); /* Select analog input muxing mode */
|
||||
io_write_and_or(sd, 0x30, ~(1 << 4), pdata->output_bus_lsb_to_msb << 4);
|
||||
|
||||
state->prim_mode = pdata->prim_mode;
|
||||
select_input(sd, pdata->prim_mode);
|
||||
|
||||
enable_input(sd, pdata->prim_mode);
|
||||
|
||||
/* interrupts */
|
||||
io_write(sd, 0x40, 0xc2); /* Configure INT1 */
|
||||
io_write(sd, 0x41, 0xd7); /* STDI irq for any change, disable INT2 */
|
||||
|
@ -1883,6 +2049,7 @@ static int adv7604_probe(struct i2c_client *client,
|
|||
v4l2_err(sd, "failed to create all i2c clients\n");
|
||||
goto err_i2c;
|
||||
}
|
||||
state->restart_stdi_once = true;
|
||||
|
||||
/* work queues */
|
||||
state->work_queues = create_singlethread_workqueue(client->name);
|
||||
|
|
|
@ -263,9 +263,14 @@ static int mt9v022_s_crop(struct v4l2_subdev *sd, const struct v4l2_crop *a)
|
|||
if (ret & 1) /* Autoexposure */
|
||||
ret = reg_write(client, mt9v022->reg->max_total_shutter_width,
|
||||
rect.height + mt9v022->y_skip_top + 43);
|
||||
else
|
||||
ret = reg_write(client, MT9V022_TOTAL_SHUTTER_WIDTH,
|
||||
rect.height + mt9v022->y_skip_top + 43);
|
||||
/*
|
||||
* If autoexposure is off, there is no need to set
|
||||
* MT9V022_TOTAL_SHUTTER_WIDTH here. Autoexposure can be off
|
||||
* only if the user has set exposure manually, using the
|
||||
* V4L2_CID_EXPOSURE_AUTO with the value V4L2_EXPOSURE_MANUAL.
|
||||
* In this case the register MT9V022_TOTAL_SHUTTER_WIDTH
|
||||
* already contains the correct value.
|
||||
*/
|
||||
}
|
||||
/* Setup frame format: defaults apart from width and height */
|
||||
if (!ret)
|
||||
|
|
|
@ -965,8 +965,10 @@ static struct platform_device_id gsc_driver_ids[] = {
|
|||
MODULE_DEVICE_TABLE(platform, gsc_driver_ids);
|
||||
|
||||
static const struct of_device_id exynos_gsc_match[] = {
|
||||
{ .compatible = "samsung,exynos5250-gsc",
|
||||
.data = &gsc_v_100_drvdata, },
|
||||
{
|
||||
.compatible = "samsung,exynos5-gsc",
|
||||
.data = &gsc_v_100_drvdata,
|
||||
},
|
||||
{},
|
||||
};
|
||||
MODULE_DEVICE_TABLE(of, exynos_gsc_match);
|
||||
|
|
|
@ -1706,7 +1706,7 @@ static long ccdc_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg)
|
|||
}
|
||||
|
||||
static int ccdc_subscribe_event(struct v4l2_subdev *sd, struct v4l2_fh *fh,
|
||||
const struct v4l2_event_subscription *sub)
|
||||
struct v4l2_event_subscription *sub)
|
||||
{
|
||||
if (sub->type != V4L2_EVENT_FRAME_SYNC)
|
||||
return -EINVAL;
|
||||
|
@ -1719,7 +1719,7 @@ static int ccdc_subscribe_event(struct v4l2_subdev *sd, struct v4l2_fh *fh,
|
|||
}
|
||||
|
||||
static int ccdc_unsubscribe_event(struct v4l2_subdev *sd, struct v4l2_fh *fh,
|
||||
const struct v4l2_event_subscription *sub)
|
||||
struct v4l2_event_subscription *sub)
|
||||
{
|
||||
return v4l2_event_unsubscribe(fh, sub);
|
||||
}
|
||||
|
|
|
@ -1025,7 +1025,7 @@ void omap3isp_stat_dma_isr(struct ispstat *stat)
|
|||
|
||||
int omap3isp_stat_subscribe_event(struct v4l2_subdev *subdev,
|
||||
struct v4l2_fh *fh,
|
||||
const struct v4l2_event_subscription *sub)
|
||||
struct v4l2_event_subscription *sub)
|
||||
{
|
||||
struct ispstat *stat = v4l2_get_subdevdata(subdev);
|
||||
|
||||
|
@ -1037,7 +1037,7 @@ int omap3isp_stat_subscribe_event(struct v4l2_subdev *subdev,
|
|||
|
||||
int omap3isp_stat_unsubscribe_event(struct v4l2_subdev *subdev,
|
||||
struct v4l2_fh *fh,
|
||||
const struct v4l2_event_subscription *sub)
|
||||
struct v4l2_event_subscription *sub)
|
||||
{
|
||||
return v4l2_event_unsubscribe(fh, sub);
|
||||
}
|
||||
|
|
|
@ -147,10 +147,10 @@ int omap3isp_stat_init(struct ispstat *stat, const char *name,
|
|||
void omap3isp_stat_cleanup(struct ispstat *stat);
|
||||
int omap3isp_stat_subscribe_event(struct v4l2_subdev *subdev,
|
||||
struct v4l2_fh *fh,
|
||||
const struct v4l2_event_subscription *sub);
|
||||
struct v4l2_event_subscription *sub);
|
||||
int omap3isp_stat_unsubscribe_event(struct v4l2_subdev *subdev,
|
||||
struct v4l2_fh *fh,
|
||||
const struct v4l2_event_subscription *sub);
|
||||
struct v4l2_event_subscription *sub);
|
||||
int omap3isp_stat_s_stream(struct v4l2_subdev *subdev, int enable);
|
||||
|
||||
int omap3isp_stat_busy(struct ispstat *stat);
|
||||
|
|
|
@ -792,7 +792,7 @@ isp_video_get_crop(struct file *file, void *fh, struct v4l2_crop *crop)
|
|||
}
|
||||
|
||||
static int
|
||||
isp_video_set_crop(struct file *file, void *fh, struct v4l2_crop *crop)
|
||||
isp_video_set_crop(struct file *file, void *fh, const struct v4l2_crop *crop)
|
||||
{
|
||||
struct isp_video *video = video_drvdata(file);
|
||||
struct v4l2_subdev *subdev;
|
||||
|
|
|
@ -24,6 +24,7 @@ config VIDEO_S5P_FIMC
|
|||
config VIDEO_S5P_MIPI_CSIS
|
||||
tristate "S5P/EXYNOS MIPI-CSI2 receiver (MIPI-CSIS) driver"
|
||||
depends on REGULATOR
|
||||
select S5P_SETUP_MIPIPHY
|
||||
help
|
||||
This is a V4L2 driver for Samsung S5P and EXYNOS4 SoC MIPI-CSI2
|
||||
receiver (MIPI-CSIS) devices.
|
||||
|
|
|
@ -1736,7 +1736,9 @@ static int fimc_register_capture_device(struct fimc_dev *fimc,
|
|||
q->mem_ops = &vb2_dma_contig_memops;
|
||||
q->buf_struct_size = sizeof(struct fimc_vid_buffer);
|
||||
|
||||
vb2_queue_init(q);
|
||||
ret = vb2_queue_init(q);
|
||||
if (ret)
|
||||
goto err_ent;
|
||||
|
||||
vid_cap->vd_pad.flags = MEDIA_PAD_FL_SINK;
|
||||
ret = media_entity_init(&vfd->entity, 1, &vid_cap->vd_pad, 0);
|
||||
|
|
|
@ -1253,7 +1253,9 @@ static int fimc_lite_subdev_registered(struct v4l2_subdev *sd)
|
|||
q->buf_struct_size = sizeof(struct flite_buffer);
|
||||
q->drv_priv = fimc;
|
||||
|
||||
vb2_queue_init(q);
|
||||
ret = vb2_queue_init(q);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
fimc->vd_pad.flags = MEDIA_PAD_FL_SINK;
|
||||
ret = media_entity_init(&vfd->entity, 1, &fimc->vd_pad, 0);
|
||||
|
|
|
@ -343,53 +343,50 @@ static int fimc_md_register_sensor_entities(struct fimc_md *fmd)
|
|||
static int fimc_register_callback(struct device *dev, void *p)
|
||||
{
|
||||
struct fimc_dev *fimc = dev_get_drvdata(dev);
|
||||
struct v4l2_subdev *sd = &fimc->vid_cap.subdev;
|
||||
struct v4l2_subdev *sd;
|
||||
struct fimc_md *fmd = p;
|
||||
int ret = 0;
|
||||
int ret;
|
||||
|
||||
if (!fimc || !fimc->pdev)
|
||||
if (fimc == NULL || fimc->id >= FIMC_MAX_DEVS)
|
||||
return 0;
|
||||
|
||||
if (fimc->pdev->id < 0 || fimc->pdev->id >= FIMC_MAX_DEVS)
|
||||
return 0;
|
||||
|
||||
fimc->pipeline_ops = &fimc_pipeline_ops;
|
||||
fmd->fimc[fimc->pdev->id] = fimc;
|
||||
sd = &fimc->vid_cap.subdev;
|
||||
sd->grp_id = FIMC_GROUP_ID;
|
||||
|
||||
ret = v4l2_device_register_subdev(&fmd->v4l2_dev, sd);
|
||||
if (ret) {
|
||||
v4l2_err(&fmd->v4l2_dev, "Failed to register FIMC.%d (%d)\n",
|
||||
fimc->id, ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
return ret;
|
||||
fimc->pipeline_ops = &fimc_pipeline_ops;
|
||||
fmd->fimc[fimc->id] = fimc;
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int fimc_lite_register_callback(struct device *dev, void *p)
|
||||
{
|
||||
struct fimc_lite *fimc = dev_get_drvdata(dev);
|
||||
struct v4l2_subdev *sd = &fimc->subdev;
|
||||
struct fimc_md *fmd = p;
|
||||
int ret;
|
||||
|
||||
if (fimc == NULL)
|
||||
if (fimc == NULL || fimc->index >= FIMC_LITE_MAX_DEVS)
|
||||
return 0;
|
||||
|
||||
if (fimc->index >= FIMC_LITE_MAX_DEVS)
|
||||
return 0;
|
||||
fimc->subdev.grp_id = FLITE_GROUP_ID;
|
||||
|
||||
fimc->pipeline_ops = &fimc_pipeline_ops;
|
||||
fmd->fimc_lite[fimc->index] = fimc;
|
||||
sd->grp_id = FLITE_GROUP_ID;
|
||||
|
||||
ret = v4l2_device_register_subdev(&fmd->v4l2_dev, sd);
|
||||
ret = v4l2_device_register_subdev(&fmd->v4l2_dev, &fimc->subdev);
|
||||
if (ret) {
|
||||
v4l2_err(&fmd->v4l2_dev,
|
||||
"Failed to register FIMC-LITE.%d (%d)\n",
|
||||
fimc->index, ret);
|
||||
return ret;
|
||||
}
|
||||
return ret;
|
||||
|
||||
fimc->pipeline_ops = &fimc_pipeline_ops;
|
||||
fmd->fimc_lite[fimc->index] = fimc;
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int csis_register_callback(struct device *dev, void *p)
|
||||
|
@ -407,10 +404,12 @@ static int csis_register_callback(struct device *dev, void *p)
|
|||
v4l2_info(sd, "csis%d sd: %s\n", pdev->id, sd->name);
|
||||
|
||||
id = pdev->id < 0 ? 0 : pdev->id;
|
||||
fmd->csis[id].sd = sd;
|
||||
sd->grp_id = CSIS_GROUP_ID;
|
||||
|
||||
ret = v4l2_device_register_subdev(&fmd->v4l2_dev, sd);
|
||||
if (ret)
|
||||
if (!ret)
|
||||
fmd->csis[id].sd = sd;
|
||||
else
|
||||
v4l2_err(&fmd->v4l2_dev,
|
||||
"Failed to register CSIS subdevice: %d\n", ret);
|
||||
return ret;
|
||||
|
|
|
@ -935,9 +935,10 @@ static int sh_vou_g_crop(struct file *file, void *fh, struct v4l2_crop *a)
|
|||
/* Assume a dull encoder, do all the work ourselves. */
|
||||
static int sh_vou_s_crop(struct file *file, void *fh, const struct v4l2_crop *a)
|
||||
{
|
||||
struct v4l2_crop a_writable = *a;
|
||||
struct video_device *vdev = video_devdata(file);
|
||||
struct sh_vou_device *vou_dev = video_get_drvdata(vdev);
|
||||
struct v4l2_rect *rect = &a->c;
|
||||
struct v4l2_rect *rect = &a_writable.c;
|
||||
struct v4l2_crop sd_crop = {.type = V4L2_BUF_TYPE_VIDEO_OUTPUT};
|
||||
struct v4l2_pix_format *pix = &vou_dev->pix;
|
||||
struct sh_vou_geometry geo;
|
||||
|
|
|
@ -470,14 +470,6 @@ static void mx1_camera_remove_device(struct soc_camera_device *icd)
|
|||
pcdev->icd = NULL;
|
||||
}
|
||||
|
||||
static int mx1_camera_set_crop(struct soc_camera_device *icd,
|
||||
struct v4l2_crop *a)
|
||||
{
|
||||
struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
|
||||
|
||||
return v4l2_subdev_call(sd, video, s_crop, a);
|
||||
}
|
||||
|
||||
static int mx1_camera_set_bus_param(struct soc_camera_device *icd)
|
||||
{
|
||||
struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
|
||||
|
@ -689,7 +681,6 @@ static struct soc_camera_host_ops mx1_soc_camera_host_ops = {
|
|||
.add = mx1_camera_add_device,
|
||||
.remove = mx1_camera_remove_device,
|
||||
.set_bus_param = mx1_camera_set_bus_param,
|
||||
.set_crop = mx1_camera_set_crop,
|
||||
.set_fmt = mx1_camera_set_fmt,
|
||||
.try_fmt = mx1_camera_try_fmt,
|
||||
.init_videobuf = mx1_camera_init_videobuf,
|
||||
|
|
|
@ -864,8 +864,10 @@ static int mx2_start_streaming(struct vb2_queue *q, unsigned int count)
|
|||
|
||||
bytesperline = soc_mbus_bytes_per_line(icd->user_width,
|
||||
icd->current_fmt->host_fmt);
|
||||
if (bytesperline < 0)
|
||||
if (bytesperline < 0) {
|
||||
spin_unlock_irqrestore(&pcdev->lock, flags);
|
||||
return bytesperline;
|
||||
}
|
||||
|
||||
/*
|
||||
* I didn't manage to properly enable/disable the prp
|
||||
|
@ -878,8 +880,10 @@ static int mx2_start_streaming(struct vb2_queue *q, unsigned int count)
|
|||
pcdev->discard_buffer = dma_alloc_coherent(ici->v4l2_dev.dev,
|
||||
pcdev->discard_size, &pcdev->discard_buffer_dma,
|
||||
GFP_KERNEL);
|
||||
if (!pcdev->discard_buffer)
|
||||
if (!pcdev->discard_buffer) {
|
||||
spin_unlock_irqrestore(&pcdev->lock, flags);
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
pcdev->buf_discard[0].discard = true;
|
||||
list_add_tail(&pcdev->buf_discard[0].queue,
|
||||
|
@ -1099,9 +1103,10 @@ static int mx2_camera_set_bus_param(struct soc_camera_device *icd)
|
|||
}
|
||||
|
||||
static int mx2_camera_set_crop(struct soc_camera_device *icd,
|
||||
struct v4l2_crop *a)
|
||||
const struct v4l2_crop *a)
|
||||
{
|
||||
struct v4l2_rect *rect = &a->c;
|
||||
struct v4l2_crop a_writable = *a;
|
||||
struct v4l2_rect *rect = &a_writable.c;
|
||||
struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
|
||||
struct v4l2_mbus_framefmt mf;
|
||||
int ret;
|
||||
|
|
|
@ -799,9 +799,10 @@ static inline void stride_align(__u32 *width)
|
|||
* default g_crop and cropcap from soc_camera.c
|
||||
*/
|
||||
static int mx3_camera_set_crop(struct soc_camera_device *icd,
|
||||
struct v4l2_crop *a)
|
||||
const struct v4l2_crop *a)
|
||||
{
|
||||
struct v4l2_rect *rect = &a->c;
|
||||
struct v4l2_crop a_writable = *a;
|
||||
struct v4l2_rect *rect = &a_writable.c;
|
||||
struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
|
||||
struct mx3_camera_dev *mx3_cam = ici->priv;
|
||||
struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
|
||||
|
|
|
@ -1215,9 +1215,9 @@ static int set_mbus_format(struct omap1_cam_dev *pcdev, struct device *dev,
|
|||
}
|
||||
|
||||
static int omap1_cam_set_crop(struct soc_camera_device *icd,
|
||||
struct v4l2_crop *crop)
|
||||
const struct v4l2_crop *crop)
|
||||
{
|
||||
struct v4l2_rect *rect = &crop->c;
|
||||
const struct v4l2_rect *rect = &crop->c;
|
||||
const struct soc_camera_format_xlate *xlate = icd->current_fmt;
|
||||
struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
|
||||
struct device *dev = icd->parent;
|
||||
|
|
|
@ -1337,9 +1337,9 @@ static int pxa_camera_check_frame(u32 width, u32 height)
|
|||
}
|
||||
|
||||
static int pxa_camera_set_crop(struct soc_camera_device *icd,
|
||||
struct v4l2_crop *a)
|
||||
const struct v4l2_crop *a)
|
||||
{
|
||||
struct v4l2_rect *rect = &a->c;
|
||||
const struct v4l2_rect *rect = &a->c;
|
||||
struct device *dev = icd->parent;
|
||||
struct soc_camera_host *ici = to_soc_camera_host(dev);
|
||||
struct pxa_camera_dev *pcdev = ici->priv;
|
||||
|
|
|
@ -1182,13 +1182,13 @@ static void sh_mobile_ceu_put_formats(struct soc_camera_device *icd)
|
|||
}
|
||||
|
||||
/* Check if any dimension of r1 is smaller than respective one of r2 */
|
||||
static bool is_smaller(struct v4l2_rect *r1, struct v4l2_rect *r2)
|
||||
static bool is_smaller(const struct v4l2_rect *r1, const struct v4l2_rect *r2)
|
||||
{
|
||||
return r1->width < r2->width || r1->height < r2->height;
|
||||
}
|
||||
|
||||
/* Check if r1 fails to cover r2 */
|
||||
static bool is_inside(struct v4l2_rect *r1, struct v4l2_rect *r2)
|
||||
static bool is_inside(const struct v4l2_rect *r1, const struct v4l2_rect *r2)
|
||||
{
|
||||
return r1->left > r2->left || r1->top > r2->top ||
|
||||
r1->left + r1->width < r2->left + r2->width ||
|
||||
|
@ -1263,7 +1263,7 @@ static void update_subrect(struct sh_mobile_ceu_cam *cam)
|
|||
* 3. if (2) failed, try to request the maximum image
|
||||
*/
|
||||
static int client_s_crop(struct soc_camera_device *icd, struct v4l2_crop *crop,
|
||||
const struct v4l2_crop *cam_crop)
|
||||
struct v4l2_crop *cam_crop)
|
||||
{
|
||||
struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
|
||||
struct v4l2_rect *rect = &crop->c, *cam_rect = &cam_crop->c;
|
||||
|
@ -1519,7 +1519,8 @@ static int client_scale(struct soc_camera_device *icd,
|
|||
static int sh_mobile_ceu_set_crop(struct soc_camera_device *icd,
|
||||
const struct v4l2_crop *a)
|
||||
{
|
||||
struct v4l2_rect *rect = &a->c;
|
||||
struct v4l2_crop a_writable = *a;
|
||||
const struct v4l2_rect *rect = &a_writable.c;
|
||||
struct device *dev = icd->parent;
|
||||
struct soc_camera_host *ici = to_soc_camera_host(dev);
|
||||
struct sh_mobile_ceu_dev *pcdev = ici->priv;
|
||||
|
@ -1545,7 +1546,7 @@ static int sh_mobile_ceu_set_crop(struct soc_camera_device *icd,
|
|||
* 1. - 2. Apply iterative camera S_CROP for new input window, read back
|
||||
* actual camera rectangle.
|
||||
*/
|
||||
ret = client_s_crop(icd, a, &cam_crop);
|
||||
ret = client_s_crop(icd, &a_writable, &cam_crop);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
|
@ -1946,7 +1947,7 @@ static int sh_mobile_ceu_try_fmt(struct soc_camera_device *icd,
|
|||
}
|
||||
|
||||
static int sh_mobile_ceu_set_livecrop(struct soc_camera_device *icd,
|
||||
struct v4l2_crop *a)
|
||||
const struct v4l2_crop *a)
|
||||
{
|
||||
struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
|
||||
struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
|
||||
|
|
|
@ -283,14 +283,13 @@ static inline int dvb_usb_ctrl_feed(struct dvb_demux_feed *dvbdmxfeed,
|
|||
|
||||
/* activate the pid on the device pid filter */
|
||||
if (adap->props->caps & DVB_USB_ADAP_HAS_PID_FILTER &&
|
||||
adap->pid_filtering &&
|
||||
adap->props->pid_filter)
|
||||
adap->pid_filtering && adap->props->pid_filter) {
|
||||
ret = adap->props->pid_filter(adap, dvbdmxfeed->index,
|
||||
dvbdmxfeed->pid, (count == 1) ? 1 : 0);
|
||||
if (ret < 0)
|
||||
dev_err(&d->udev->dev, "%s: pid_filter() " \
|
||||
"failed=%d\n", KBUILD_MODNAME,
|
||||
ret);
|
||||
if (ret < 0)
|
||||
dev_err(&d->udev->dev, "%s: pid_filter() failed=%d\n",
|
||||
KBUILD_MODNAME, ret);
|
||||
}
|
||||
|
||||
/* start feeding if it is first pid */
|
||||
if (adap->feed_count == 1 && count == 1) {
|
||||
|
|
|
@ -32,9 +32,7 @@ int dvb_usbv2_generic_rw(struct dvb_usb_device *d, u8 *wbuf, u16 wlen, u8 *rbuf,
|
|||
return -EINVAL;
|
||||
}
|
||||
|
||||
ret = mutex_lock_interruptible(&d->usb_mutex);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
mutex_lock(&d->usb_mutex);
|
||||
|
||||
dev_dbg(&d->udev->dev, "%s: >>> %*ph\n", __func__, wlen, wbuf);
|
||||
|
||||
|
|
|
@ -1346,6 +1346,10 @@ static const struct usb_device_id rtl28xxu_id_table[] = {
|
|||
&rtl2832u_props, "DigitalNow Quad DVB-T Receiver", NULL) },
|
||||
{ DVB_USB_DEVICE(USB_VID_TERRATEC, 0x00d3,
|
||||
&rtl2832u_props, "TerraTec Cinergy T Stick RC (Rev. 3)", NULL) },
|
||||
{ DVB_USB_DEVICE(USB_VID_DEXATEK, 0x1102,
|
||||
&rtl2832u_props, "Dexatek DK mini DVB-T Dongle", NULL) },
|
||||
{ DVB_USB_DEVICE(USB_VID_TERRATEC, 0x00d7,
|
||||
&rtl2832u_props, "TerraTec Cinergy T Stick+", NULL) },
|
||||
{ }
|
||||
};
|
||||
MODULE_DEVICE_TABLE(usb, rtl28xxu_id_table);
|
||||
|
|
|
@ -96,11 +96,11 @@ static irqreturn_t arizona_underclocked(int irq, void *data)
|
|||
return IRQ_NONE;
|
||||
}
|
||||
|
||||
if (val & ARIZONA_AIF3_UNDERCLOCKED_STS)
|
||||
dev_err(arizona->dev, "AIF3 underclocked\n");
|
||||
if (val & ARIZONA_AIF3_UNDERCLOCKED_STS)
|
||||
dev_err(arizona->dev, "AIF3 underclocked\n");
|
||||
if (val & ARIZONA_AIF2_UNDERCLOCKED_STS)
|
||||
dev_err(arizona->dev, "AIF2 underclocked\n");
|
||||
if (val & ARIZONA_AIF1_UNDERCLOCKED_STS)
|
||||
dev_err(arizona->dev, "AIF1 underclocked\n");
|
||||
if (val & ARIZONA_ISRC2_UNDERCLOCKED_STS)
|
||||
dev_err(arizona->dev, "ISRC2 underclocked\n");
|
||||
|
@ -415,11 +415,19 @@ int __devinit arizona_dev_init(struct arizona *arizona)
|
|||
|
||||
/* If we have a /RESET GPIO we'll already be reset */
|
||||
if (!arizona->pdata.reset) {
|
||||
regcache_mark_dirty(arizona->regmap);
|
||||
|
||||
ret = regmap_write(arizona->regmap, ARIZONA_SOFTWARE_RESET, 0);
|
||||
if (ret != 0) {
|
||||
dev_err(dev, "Failed to reset device: %d\n", ret);
|
||||
goto err_reset;
|
||||
}
|
||||
|
||||
ret = regcache_sync(arizona->regmap);
|
||||
if (ret != 0) {
|
||||
dev_err(dev, "Failed to sync device: %d\n", ret);
|
||||
goto err_reset;
|
||||
}
|
||||
}
|
||||
|
||||
ret = arizona_wait_for_boot(arizona);
|
||||
|
@ -520,7 +528,7 @@ int __devinit arizona_dev_init(struct arizona *arizona)
|
|||
break;
|
||||
case WM5110:
|
||||
ret = mfd_add_devices(arizona->dev, -1, wm5110_devs,
|
||||
ARRAY_SIZE(wm5102_devs), NULL, 0, NULL);
|
||||
ARRAY_SIZE(wm5110_devs), NULL, 0, NULL);
|
||||
break;
|
||||
}
|
||||
|
||||
|
|
|
@ -178,6 +178,7 @@ int arizona_irq_init(struct arizona *arizona)
|
|||
|
||||
switch (arizona->rev) {
|
||||
case 0:
|
||||
case 1:
|
||||
ctrlif_error = false;
|
||||
break;
|
||||
default:
|
||||
|
|
|
@ -671,7 +671,7 @@ add_children(struct twl4030_platform_data *pdata, unsigned irq_base,
|
|||
}
|
||||
|
||||
if (IS_ENABLED(CONFIG_PWM_TWL6030) && twl_class_is_6030()) {
|
||||
child = add_child(TWL6030_MODULE_ID1, "twl6030-pwm", NULL, 0,
|
||||
child = add_child(SUB_CHIP_ID1, "twl6030-pwm", NULL, 0,
|
||||
false, 0, 0);
|
||||
if (IS_ERR(child))
|
||||
return PTR_ERR(child);
|
||||
|
|
|
@ -672,7 +672,8 @@ int twl4030_sih_setup(struct device *dev, int module, int irq_base)
|
|||
irq = sih_mod + twl4030_irq_base;
|
||||
irq_set_handler_data(irq, agent);
|
||||
agent->irq_name = kasprintf(GFP_KERNEL, "twl4030_%s", sih->name);
|
||||
status = request_threaded_irq(irq, NULL, handle_twl4030_sih, 0,
|
||||
status = request_threaded_irq(irq, NULL, handle_twl4030_sih,
|
||||
IRQF_EARLY_RESUME,
|
||||
agent->irq_name ?: sih->name, NULL);
|
||||
|
||||
dev_info(dev, "%s (irq %d) chaining IRQs %d..%d\n", sih->name,
|
||||
|
|
|
@ -43,6 +43,7 @@ static const struct reg_default wm5102_reva_patch[] = {
|
|||
{ 0x479, 0x0A30 },
|
||||
{ 0x47B, 0x0810 },
|
||||
{ 0x47D, 0x0510 },
|
||||
{ 0x4D1, 0x017F },
|
||||
{ 0x500, 0x000D },
|
||||
{ 0x507, 0x1820 },
|
||||
{ 0x508, 0x1820 },
|
||||
|
@ -52,524 +53,6 @@ static const struct reg_default wm5102_reva_patch[] = {
|
|||
{ 0x580, 0x000D },
|
||||
{ 0x587, 0x1820 },
|
||||
{ 0x588, 0x1820 },
|
||||
{ 0x101, 0x8140 },
|
||||
{ 0x3000, 0x2225 },
|
||||
{ 0x3001, 0x3a03 },
|
||||
{ 0x3002, 0x0225 },
|
||||
{ 0x3003, 0x0801 },
|
||||
{ 0x3004, 0x6249 },
|
||||
{ 0x3005, 0x0c04 },
|
||||
{ 0x3006, 0x0225 },
|
||||
{ 0x3007, 0x5901 },
|
||||
{ 0x3008, 0xe249 },
|
||||
{ 0x3009, 0x030d },
|
||||
{ 0x300a, 0x0249 },
|
||||
{ 0x300b, 0x2c01 },
|
||||
{ 0x300c, 0xe249 },
|
||||
{ 0x300d, 0x4342 },
|
||||
{ 0x300e, 0xe249 },
|
||||
{ 0x300f, 0x73c0 },
|
||||
{ 0x3010, 0x4249 },
|
||||
{ 0x3011, 0x0c00 },
|
||||
{ 0x3012, 0x0225 },
|
||||
{ 0x3013, 0x1f01 },
|
||||
{ 0x3014, 0x0225 },
|
||||
{ 0x3015, 0x1e01 },
|
||||
{ 0x3016, 0x0225 },
|
||||
{ 0x3017, 0xfa00 },
|
||||
{ 0x3018, 0x0000 },
|
||||
{ 0x3019, 0xf000 },
|
||||
{ 0x301a, 0x0000 },
|
||||
{ 0x301b, 0xf000 },
|
||||
{ 0x301c, 0x0000 },
|
||||
{ 0x301d, 0xf000 },
|
||||
{ 0x301e, 0x0000 },
|
||||
{ 0x301f, 0xf000 },
|
||||
{ 0x3020, 0x0000 },
|
||||
{ 0x3021, 0xf000 },
|
||||
{ 0x3022, 0x0000 },
|
||||
{ 0x3023, 0xf000 },
|
||||
{ 0x3024, 0x0000 },
|
||||
{ 0x3025, 0xf000 },
|
||||
{ 0x3026, 0x0000 },
|
||||
{ 0x3027, 0xf000 },
|
||||
{ 0x3028, 0x0000 },
|
||||
{ 0x3029, 0xf000 },
|
||||
{ 0x302a, 0x0000 },
|
||||
{ 0x302b, 0xf000 },
|
||||
{ 0x302c, 0x0000 },
|
||||
{ 0x302d, 0xf000 },
|
||||
{ 0x302e, 0x0000 },
|
||||
{ 0x302f, 0xf000 },
|
||||
{ 0x3030, 0x0225 },
|
||||
{ 0x3031, 0x1a01 },
|
||||
{ 0x3032, 0x0225 },
|
||||
{ 0x3033, 0x1e00 },
|
||||
{ 0x3034, 0x0225 },
|
||||
{ 0x3035, 0x1f00 },
|
||||
{ 0x3036, 0x6225 },
|
||||
{ 0x3037, 0xf800 },
|
||||
{ 0x3038, 0x0000 },
|
||||
{ 0x3039, 0xf000 },
|
||||
{ 0x303a, 0x0000 },
|
||||
{ 0x303b, 0xf000 },
|
||||
{ 0x303c, 0x0000 },
|
||||
{ 0x303d, 0xf000 },
|
||||
{ 0x303e, 0x0000 },
|
||||
{ 0x303f, 0xf000 },
|
||||
{ 0x3040, 0x2226 },
|
||||
{ 0x3041, 0x3a03 },
|
||||
{ 0x3042, 0x0226 },
|
||||
{ 0x3043, 0x0801 },
|
||||
{ 0x3044, 0x6249 },
|
||||
{ 0x3045, 0x0c06 },
|
||||
{ 0x3046, 0x0226 },
|
||||
{ 0x3047, 0x5901 },
|
||||
{ 0x3048, 0xe249 },
|
||||
{ 0x3049, 0x030d },
|
||||
{ 0x304a, 0x0249 },
|
||||
{ 0x304b, 0x2c01 },
|
||||
{ 0x304c, 0xe249 },
|
||||
{ 0x304d, 0x4342 },
|
||||
{ 0x304e, 0xe249 },
|
||||
{ 0x304f, 0x73c0 },
|
||||
{ 0x3050, 0x4249 },
|
||||
{ 0x3051, 0x0c00 },
|
||||
{ 0x3052, 0x0226 },
|
||||
{ 0x3053, 0x1f01 },
|
||||
{ 0x3054, 0x0226 },
|
||||
{ 0x3055, 0x1e01 },
|
||||
{ 0x3056, 0x0226 },
|
||||
{ 0x3057, 0xfa00 },
|
||||
{ 0x3058, 0x0000 },
|
||||
{ 0x3059, 0xf000 },
|
||||
{ 0x305a, 0x0000 },
|
||||
{ 0x305b, 0xf000 },
|
||||
{ 0x305c, 0x0000 },
|
||||
{ 0x305d, 0xf000 },
|
||||
{ 0x305e, 0x0000 },
|
||||
{ 0x305f, 0xf000 },
|
||||
{ 0x3060, 0x0000 },
|
||||
{ 0x3061, 0xf000 },
|
||||
{ 0x3062, 0x0000 },
|
||||
{ 0x3063, 0xf000 },
|
||||
{ 0x3064, 0x0000 },
|
||||
{ 0x3065, 0xf000 },
|
||||
{ 0x3066, 0x0000 },
|
||||
{ 0x3067, 0xf000 },
|
||||
{ 0x3068, 0x0000 },
|
||||
{ 0x3069, 0xf000 },
|
||||
{ 0x306a, 0x0000 },
|
||||
{ 0x306b, 0xf000 },
|
||||
{ 0x306c, 0x0000 },
|
||||
{ 0x306d, 0xf000 },
|
||||
{ 0x306e, 0x0000 },
|
||||
{ 0x306f, 0xf000 },
|
||||
{ 0x3070, 0x0226 },
|
||||
{ 0x3071, 0x1a01 },
|
||||
{ 0x3072, 0x0226 },
|
||||
{ 0x3073, 0x1e00 },
|
||||
{ 0x3074, 0x0226 },
|
||||
{ 0x3075, 0x1f00 },
|
||||
{ 0x3076, 0x6226 },
|
||||
{ 0x3077, 0xf800 },
|
||||
{ 0x3078, 0x0000 },
|
||||
{ 0x3079, 0xf000 },
|
||||
{ 0x307a, 0x0000 },
|
||||
{ 0x307b, 0xf000 },
|
||||
{ 0x307c, 0x0000 },
|
||||
{ 0x307d, 0xf000 },
|
||||
{ 0x307e, 0x0000 },
|
||||
{ 0x307f, 0xf000 },
|
||||
{ 0x3080, 0x2227 },
|
||||
{ 0x3081, 0x3a03 },
|
||||
{ 0x3082, 0x0227 },
|
||||
{ 0x3083, 0x0801 },
|
||||
{ 0x3084, 0x6255 },
|
||||
{ 0x3085, 0x0c04 },
|
||||
{ 0x3086, 0x0227 },
|
||||
{ 0x3087, 0x5901 },
|
||||
{ 0x3088, 0xe255 },
|
||||
{ 0x3089, 0x030d },
|
||||
{ 0x308a, 0x0255 },
|
||||
{ 0x308b, 0x2c01 },
|
||||
{ 0x308c, 0xe255 },
|
||||
{ 0x308d, 0x4342 },
|
||||
{ 0x308e, 0xe255 },
|
||||
{ 0x308f, 0x73c0 },
|
||||
{ 0x3090, 0x4255 },
|
||||
{ 0x3091, 0x0c00 },
|
||||
{ 0x3092, 0x0227 },
|
||||
{ 0x3093, 0x1f01 },
|
||||
{ 0x3094, 0x0227 },
|
||||
{ 0x3095, 0x1e01 },
|
||||
{ 0x3096, 0x0227 },
|
||||
{ 0x3097, 0xfa00 },
|
||||
{ 0x3098, 0x0000 },
|
||||
{ 0x3099, 0xf000 },
|
||||
{ 0x309a, 0x0000 },
|
||||
{ 0x309b, 0xf000 },
|
||||
{ 0x309c, 0x0000 },
|
||||
{ 0x309d, 0xf000 },
|
||||
{ 0x309e, 0x0000 },
|
||||
{ 0x309f, 0xf000 },
|
||||
{ 0x30a0, 0x0000 },
|
||||
{ 0x30a1, 0xf000 },
|
||||
{ 0x30a2, 0x0000 },
|
||||
{ 0x30a3, 0xf000 },
|
||||
{ 0x30a4, 0x0000 },
|
||||
{ 0x30a5, 0xf000 },
|
||||
{ 0x30a6, 0x0000 },
|
||||
{ 0x30a7, 0xf000 },
|
||||
{ 0x30a8, 0x0000 },
|
||||
{ 0x30a9, 0xf000 },
|
||||
{ 0x30aa, 0x0000 },
|
||||
{ 0x30ab, 0xf000 },
|
||||
{ 0x30ac, 0x0000 },
|
||||
{ 0x30ad, 0xf000 },
|
||||
{ 0x30ae, 0x0000 },
|
||||
{ 0x30af, 0xf000 },
|
||||
{ 0x30b0, 0x0227 },
|
||||
{ 0x30b1, 0x1a01 },
|
||||
{ 0x30b2, 0x0227 },
|
||||
{ 0x30b3, 0x1e00 },
|
||||
{ 0x30b4, 0x0227 },
|
||||
{ 0x30b5, 0x1f00 },
|
||||
{ 0x30b6, 0x6227 },
|
||||
{ 0x30b7, 0xf800 },
|
||||
{ 0x30b8, 0x0000 },
|
||||
{ 0x30b9, 0xf000 },
|
||||
{ 0x30ba, 0x0000 },
|
||||
{ 0x30bb, 0xf000 },
|
||||
{ 0x30bc, 0x0000 },
|
||||
{ 0x30bd, 0xf000 },
|
||||
{ 0x30be, 0x0000 },
|
||||
{ 0x30bf, 0xf000 },
|
||||
{ 0x30c0, 0x2228 },
|
||||
{ 0x30c1, 0x3a03 },
|
||||
{ 0x30c2, 0x0228 },
|
||||
{ 0x30c3, 0x0801 },
|
||||
{ 0x30c4, 0x6255 },
|
||||
{ 0x30c5, 0x0c06 },
|
||||
{ 0x30c6, 0x0228 },
|
||||
{ 0x30c7, 0x5901 },
|
||||
{ 0x30c8, 0xe255 },
|
||||
{ 0x30c9, 0x030d },
|
||||
{ 0x30ca, 0x0255 },
|
||||
{ 0x30cb, 0x2c01 },
|
||||
{ 0x30cc, 0xe255 },
|
||||
{ 0x30cd, 0x4342 },
|
||||
{ 0x30ce, 0xe255 },
|
||||
{ 0x30cf, 0x73c0 },
|
||||
{ 0x30d0, 0x4255 },
|
||||
{ 0x30d1, 0x0c00 },
|
||||
{ 0x30d2, 0x0228 },
|
||||
{ 0x30d3, 0x1f01 },
|
||||
{ 0x30d4, 0x0228 },
|
||||
{ 0x30d5, 0x1e01 },
|
||||
{ 0x30d6, 0x0228 },
|
||||
{ 0x30d7, 0xfa00 },
|
||||
{ 0x30d8, 0x0000 },
|
||||
{ 0x30d9, 0xf000 },
|
||||
{ 0x30da, 0x0000 },
|
||||
{ 0x30db, 0xf000 },
|
||||
{ 0x30dc, 0x0000 },
|
||||
{ 0x30dd, 0xf000 },
|
||||
{ 0x30de, 0x0000 },
|
||||
{ 0x30df, 0xf000 },
|
||||
{ 0x30e0, 0x0000 },
|
||||
{ 0x30e1, 0xf000 },
|
||||
{ 0x30e2, 0x0000 },
|
||||
{ 0x30e3, 0xf000 },
|
||||
{ 0x30e4, 0x0000 },
|
||||
{ 0x30e5, 0xf000 },
|
||||
{ 0x30e6, 0x0000 },
|
||||
{ 0x30e7, 0xf000 },
|
||||
{ 0x30e8, 0x0000 },
|
||||
{ 0x30e9, 0xf000 },
|
||||
{ 0x30ea, 0x0000 },
|
||||
{ 0x30eb, 0xf000 },
|
||||
{ 0x30ec, 0x0000 },
|
||||
{ 0x30ed, 0xf000 },
|
||||
{ 0x30ee, 0x0000 },
|
||||
{ 0x30ef, 0xf000 },
|
||||
{ 0x30f0, 0x0228 },
|
||||
{ 0x30f1, 0x1a01 },
|
||||
{ 0x30f2, 0x0228 },
|
||||
{ 0x30f3, 0x1e00 },
|
||||
{ 0x30f4, 0x0228 },
|
||||
{ 0x30f5, 0x1f00 },
|
||||
{ 0x30f6, 0x6228 },
|
||||
{ 0x30f7, 0xf800 },
|
||||
{ 0x30f8, 0x0000 },
|
||||
{ 0x30f9, 0xf000 },
|
||||
{ 0x30fa, 0x0000 },
|
||||
{ 0x30fb, 0xf000 },
|
||||
{ 0x30fc, 0x0000 },
|
||||
{ 0x30fd, 0xf000 },
|
||||
{ 0x30fe, 0x0000 },
|
||||
{ 0x30ff, 0xf000 },
|
||||
{ 0x3100, 0x222b },
|
||||
{ 0x3101, 0x3a03 },
|
||||
{ 0x3102, 0x222b },
|
||||
{ 0x3103, 0x5803 },
|
||||
{ 0x3104, 0xe26f },
|
||||
{ 0x3105, 0x030d },
|
||||
{ 0x3106, 0x626f },
|
||||
{ 0x3107, 0x2c01 },
|
||||
{ 0x3108, 0xe26f },
|
||||
{ 0x3109, 0x4342 },
|
||||
{ 0x310a, 0xe26f },
|
||||
{ 0x310b, 0x73c0 },
|
||||
{ 0x310c, 0x026f },
|
||||
{ 0x310d, 0x0c00 },
|
||||
{ 0x310e, 0x022b },
|
||||
{ 0x310f, 0x1f01 },
|
||||
{ 0x3110, 0x022b },
|
||||
{ 0x3111, 0x1e01 },
|
||||
{ 0x3112, 0x022b },
|
||||
{ 0x3113, 0xfa00 },
|
||||
{ 0x3114, 0x0000 },
|
||||
{ 0x3115, 0xf000 },
|
||||
{ 0x3116, 0x0000 },
|
||||
{ 0x3117, 0xf000 },
|
||||
{ 0x3118, 0x0000 },
|
||||
{ 0x3119, 0xf000 },
|
||||
{ 0x311a, 0x0000 },
|
||||
{ 0x311b, 0xf000 },
|
||||
{ 0x311c, 0x0000 },
|
||||
{ 0x311d, 0xf000 },
|
||||
{ 0x311e, 0x0000 },
|
||||
{ 0x311f, 0xf000 },
|
||||
{ 0x3120, 0x022b },
|
||||
{ 0x3121, 0x0a01 },
|
||||
{ 0x3122, 0x022b },
|
||||
{ 0x3123, 0x1e00 },
|
||||
{ 0x3124, 0x022b },
|
||||
{ 0x3125, 0x1f00 },
|
||||
{ 0x3126, 0x622b },
|
||||
{ 0x3127, 0xf800 },
|
||||
{ 0x3128, 0x0000 },
|
||||
{ 0x3129, 0xf000 },
|
||||
{ 0x312a, 0x0000 },
|
||||
{ 0x312b, 0xf000 },
|
||||
{ 0x312c, 0x0000 },
|
||||
{ 0x312d, 0xf000 },
|
||||
{ 0x312e, 0x0000 },
|
||||
{ 0x312f, 0xf000 },
|
||||
{ 0x3130, 0x0000 },
|
||||
{ 0x3131, 0xf000 },
|
||||
{ 0x3132, 0x0000 },
|
||||
{ 0x3133, 0xf000 },
|
||||
{ 0x3134, 0x0000 },
|
||||
{ 0x3135, 0xf000 },
|
||||
{ 0x3136, 0x0000 },
|
||||
{ 0x3137, 0xf000 },
|
||||
{ 0x3138, 0x0000 },
|
||||
{ 0x3139, 0xf000 },
|
||||
{ 0x313a, 0x0000 },
|
||||
{ 0x313b, 0xf000 },
|
||||
{ 0x313c, 0x0000 },
|
||||
{ 0x313d, 0xf000 },
|
||||
{ 0x313e, 0x0000 },
|
||||
{ 0x313f, 0xf000 },
|
||||
{ 0x3140, 0x0000 },
|
||||
{ 0x3141, 0xf000 },
|
||||
{ 0x3142, 0x0000 },
|
||||
{ 0x3143, 0xf000 },
|
||||
{ 0x3144, 0x0000 },
|
||||
{ 0x3145, 0xf000 },
|
||||
{ 0x3146, 0x0000 },
|
||||
{ 0x3147, 0xf000 },
|
||||
{ 0x3148, 0x0000 },
|
||||
{ 0x3149, 0xf000 },
|
||||
{ 0x314a, 0x0000 },
|
||||
{ 0x314b, 0xf000 },
|
||||
{ 0x314c, 0x0000 },
|
||||
{ 0x314d, 0xf000 },
|
||||
{ 0x314e, 0x0000 },
|
||||
{ 0x314f, 0xf000 },
|
||||
{ 0x3150, 0x0000 },
|
||||
{ 0x3151, 0xf000 },
|
||||
{ 0x3152, 0x0000 },
|
||||
{ 0x3153, 0xf000 },
|
||||
{ 0x3154, 0x0000 },
|
||||
{ 0x3155, 0xf000 },
|
||||
{ 0x3156, 0x0000 },
|
||||
{ 0x3157, 0xf000 },
|
||||
{ 0x3158, 0x0000 },
|
||||
{ 0x3159, 0xf000 },
|
||||
{ 0x315a, 0x0000 },
|
||||
{ 0x315b, 0xf000 },
|
||||
{ 0x315c, 0x0000 },
|
||||
{ 0x315d, 0xf000 },
|
||||
{ 0x315e, 0x0000 },
|
||||
{ 0x315f, 0xf000 },
|
||||
{ 0x3160, 0x0000 },
|
||||
{ 0x3161, 0xf000 },
|
||||
{ 0x3162, 0x0000 },
|
||||
{ 0x3163, 0xf000 },
|
||||
{ 0x3164, 0x0000 },
|
||||
{ 0x3165, 0xf000 },
|
||||
{ 0x3166, 0x0000 },
|
||||
{ 0x3167, 0xf000 },
|
||||
{ 0x3168, 0x0000 },
|
||||
{ 0x3169, 0xf000 },
|
||||
{ 0x316a, 0x0000 },
|
||||
{ 0x316b, 0xf000 },
|
||||
{ 0x316c, 0x0000 },
|
||||
{ 0x316d, 0xf000 },
|
||||
{ 0x316e, 0x0000 },
|
||||
{ 0x316f, 0xf000 },
|
||||
{ 0x3170, 0x0000 },
|
||||
{ 0x3171, 0xf000 },
|
||||
{ 0x3172, 0x0000 },
|
||||
{ 0x3173, 0xf000 },
|
||||
{ 0x3174, 0x0000 },
|
||||
{ 0x3175, 0xf000 },
|
||||
{ 0x3176, 0x0000 },
|
||||
{ 0x3177, 0xf000 },
|
||||
{ 0x3178, 0x0000 },
|
||||
{ 0x3179, 0xf000 },
|
||||
{ 0x317a, 0x0000 },
|
||||
{ 0x317b, 0xf000 },
|
||||
{ 0x317c, 0x0000 },
|
||||
{ 0x317d, 0xf000 },
|
||||
{ 0x317e, 0x0000 },
|
||||
{ 0x317f, 0xf000 },
|
||||
{ 0x3180, 0x2001 },
|
||||
{ 0x3181, 0xf101 },
|
||||
{ 0x3182, 0x0000 },
|
||||
{ 0x3183, 0xf000 },
|
||||
{ 0x3184, 0x0000 },
|
||||
{ 0x3185, 0xf000 },
|
||||
{ 0x3186, 0x0000 },
|
||||
{ 0x3187, 0xf000 },
|
||||
{ 0x3188, 0x0000 },
|
||||
{ 0x3189, 0xf000 },
|
||||
{ 0x318a, 0x0000 },
|
||||
{ 0x318b, 0xf000 },
|
||||
{ 0x318c, 0x0000 },
|
||||
{ 0x318d, 0xf000 },
|
||||
{ 0x318e, 0x0000 },
|
||||
{ 0x318f, 0xf000 },
|
||||
{ 0x3190, 0x0000 },
|
||||
{ 0x3191, 0xf000 },
|
||||
{ 0x3192, 0x0000 },
|
||||
{ 0x3193, 0xf000 },
|
||||
{ 0x3194, 0x0000 },
|
||||
{ 0x3195, 0xf000 },
|
||||
{ 0x3196, 0x0000 },
|
||||
{ 0x3197, 0xf000 },
|
||||
{ 0x3198, 0x0000 },
|
||||
{ 0x3199, 0xf000 },
|
||||
{ 0x319a, 0x0000 },
|
||||
{ 0x319b, 0xf000 },
|
||||
{ 0x319c, 0x0000 },
|
||||
{ 0x319d, 0xf000 },
|
||||
{ 0x319e, 0x0000 },
|
||||
{ 0x319f, 0xf000 },
|
||||
{ 0x31a0, 0x0000 },
|
||||
{ 0x31a1, 0xf000 },
|
||||
{ 0x31a2, 0x0000 },
|
||||
{ 0x31a3, 0xf000 },
|
||||
{ 0x31a4, 0x0000 },
|
||||
{ 0x31a5, 0xf000 },
|
||||
{ 0x31a6, 0x0000 },
|
||||
{ 0x31a7, 0xf000 },
|
||||
{ 0x31a8, 0x0000 },
|
||||
{ 0x31a9, 0xf000 },
|
||||
{ 0x31aa, 0x0000 },
|
||||
{ 0x31ab, 0xf000 },
|
||||
{ 0x31ac, 0x0000 },
|
||||
{ 0x31ad, 0xf000 },
|
||||
{ 0x31ae, 0x0000 },
|
||||
{ 0x31af, 0xf000 },
|
||||
{ 0x31b0, 0x0000 },
|
||||
{ 0x31b1, 0xf000 },
|
||||
{ 0x31b2, 0x0000 },
|
||||
{ 0x31b3, 0xf000 },
|
||||
{ 0x31b4, 0x0000 },
|
||||
{ 0x31b5, 0xf000 },
|
||||
{ 0x31b6, 0x0000 },
|
||||
{ 0x31b7, 0xf000 },
|
||||
{ 0x31b8, 0x0000 },
|
||||
{ 0x31b9, 0xf000 },
|
||||
{ 0x31ba, 0x0000 },
|
||||
{ 0x31bb, 0xf000 },
|
||||
{ 0x31bc, 0x0000 },
|
||||
{ 0x31bd, 0xf000 },
|
||||
{ 0x31be, 0x0000 },
|
||||
{ 0x31bf, 0xf000 },
|
||||
{ 0x31c0, 0x0000 },
|
||||
{ 0x31c1, 0xf000 },
|
||||
{ 0x31c2, 0x0000 },
|
||||
{ 0x31c3, 0xf000 },
|
||||
{ 0x31c4, 0x0000 },
|
||||
{ 0x31c5, 0xf000 },
|
||||
{ 0x31c6, 0x0000 },
|
||||
{ 0x31c7, 0xf000 },
|
||||
{ 0x31c8, 0x0000 },
|
||||
{ 0x31c9, 0xf000 },
|
||||
{ 0x31ca, 0x0000 },
|
||||
{ 0x31cb, 0xf000 },
|
||||
{ 0x31cc, 0x0000 },
|
||||
{ 0x31cd, 0xf000 },
|
||||
{ 0x31ce, 0x0000 },
|
||||
{ 0x31cf, 0xf000 },
|
||||
{ 0x31d0, 0x0000 },
|
||||
{ 0x31d1, 0xf000 },
|
||||
{ 0x31d2, 0x0000 },
|
||||
{ 0x31d3, 0xf000 },
|
||||
{ 0x31d4, 0x0000 },
|
||||
{ 0x31d5, 0xf000 },
|
||||
{ 0x31d6, 0x0000 },
|
||||
{ 0x31d7, 0xf000 },
|
||||
{ 0x31d8, 0x0000 },
|
||||
{ 0x31d9, 0xf000 },
|
||||
{ 0x31da, 0x0000 },
|
||||
{ 0x31db, 0xf000 },
|
||||
{ 0x31dc, 0x0000 },
|
||||
{ 0x31dd, 0xf000 },
|
||||
{ 0x31de, 0x0000 },
|
||||
{ 0x31df, 0xf000 },
|
||||
{ 0x31e0, 0x0000 },
|
||||
{ 0x31e1, 0xf000 },
|
||||
{ 0x31e2, 0x0000 },
|
||||
{ 0x31e3, 0xf000 },
|
||||
{ 0x31e4, 0x0000 },
|
||||
{ 0x31e5, 0xf000 },
|
||||
{ 0x31e6, 0x0000 },
|
||||
{ 0x31e7, 0xf000 },
|
||||
{ 0x31e8, 0x0000 },
|
||||
{ 0x31e9, 0xf000 },
|
||||
{ 0x31ea, 0x0000 },
|
||||
{ 0x31eb, 0xf000 },
|
||||
{ 0x31ec, 0x0000 },
|
||||
{ 0x31ed, 0xf000 },
|
||||
{ 0x31ee, 0x0000 },
|
||||
{ 0x31ef, 0xf000 },
|
||||
{ 0x31f0, 0x0000 },
|
||||
{ 0x31f1, 0xf000 },
|
||||
{ 0x31f2, 0x0000 },
|
||||
{ 0x31f3, 0xf000 },
|
||||
{ 0x31f4, 0x0000 },
|
||||
{ 0x31f5, 0xf000 },
|
||||
{ 0x31f6, 0x0000 },
|
||||
{ 0x31f7, 0xf000 },
|
||||
{ 0x31f8, 0x0000 },
|
||||
{ 0x31f9, 0xf000 },
|
||||
{ 0x31fa, 0x0000 },
|
||||
{ 0x31fb, 0xf000 },
|
||||
{ 0x31fc, 0x0000 },
|
||||
{ 0x31fd, 0xf000 },
|
||||
{ 0x31fe, 0x0000 },
|
||||
{ 0x31ff, 0xf000 },
|
||||
{ 0x024d, 0xff50 },
|
||||
{ 0x0252, 0xff50 },
|
||||
{ 0x0259, 0x0112 },
|
||||
{ 0x025e, 0x0112 },
|
||||
{ 0x101, 0x0304 },
|
||||
{ 0x80, 0x0000 },
|
||||
};
|
||||
|
||||
|
|
|
@ -1077,7 +1077,8 @@ EXPORT_SYMBOL_GPL(mtd_writev);
|
|||
* until the request succeeds or until the allocation size falls below
|
||||
* the system page size. This attempts to make sure it does not adversely
|
||||
* impact system performance, so when allocating more than one page, we
|
||||
* ask the memory allocator to avoid re-trying.
|
||||
* ask the memory allocator to avoid re-trying, swapping, writing back
|
||||
* or performing I/O.
|
||||
*
|
||||
* Note, this function also makes sure that the allocated buffer is aligned to
|
||||
* the MTD device's min. I/O unit, i.e. the "mtd->writesize" value.
|
||||
|
@ -1091,7 +1092,8 @@ EXPORT_SYMBOL_GPL(mtd_writev);
|
|||
*/
|
||||
void *mtd_kmalloc_up_to(const struct mtd_info *mtd, size_t *size)
|
||||
{
|
||||
gfp_t flags = __GFP_NOWARN | __GFP_WAIT | __GFP_NORETRY;
|
||||
gfp_t flags = __GFP_NOWARN | __GFP_WAIT |
|
||||
__GFP_NORETRY | __GFP_NO_KSWAPD;
|
||||
size_t min_alloc = max_t(size_t, mtd->writesize, PAGE_SIZE);
|
||||
void *kbuf;
|
||||
|
||||
|
|
|
@ -519,8 +519,10 @@ static int pcan_usb_decode_error(struct pcan_usb_msg_context *mc, u8 n,
|
|||
mc->pdev->dev.can.state = new_state;
|
||||
|
||||
if (status_len & PCAN_USB_STATUSLEN_TIMESTAMP) {
|
||||
struct skb_shared_hwtstamps *hwts = skb_hwtstamps(skb);
|
||||
|
||||
peak_usb_get_ts_tv(&mc->pdev->time_ref, mc->ts16, &tv);
|
||||
skb->tstamp = timeval_to_ktime(tv);
|
||||
hwts->hwtstamp = timeval_to_ktime(tv);
|
||||
}
|
||||
|
||||
netif_rx(skb);
|
||||
|
@ -605,6 +607,7 @@ static int pcan_usb_decode_data(struct pcan_usb_msg_context *mc, u8 status_len)
|
|||
struct sk_buff *skb;
|
||||
struct can_frame *cf;
|
||||
struct timeval tv;
|
||||
struct skb_shared_hwtstamps *hwts;
|
||||
|
||||
skb = alloc_can_skb(mc->netdev, &cf);
|
||||
if (!skb)
|
||||
|
@ -652,7 +655,8 @@ static int pcan_usb_decode_data(struct pcan_usb_msg_context *mc, u8 status_len)
|
|||
|
||||
/* convert timestamp into kernel time */
|
||||
peak_usb_get_ts_tv(&mc->pdev->time_ref, mc->ts16, &tv);
|
||||
skb->tstamp = timeval_to_ktime(tv);
|
||||
hwts = skb_hwtstamps(skb);
|
||||
hwts->hwtstamp = timeval_to_ktime(tv);
|
||||
|
||||
/* push the skb */
|
||||
netif_rx(skb);
|
||||
|
|
|
@ -532,6 +532,7 @@ static int pcan_usb_pro_handle_canmsg(struct pcan_usb_pro_interface *usb_if,
|
|||
struct can_frame *can_frame;
|
||||
struct sk_buff *skb;
|
||||
struct timeval tv;
|
||||
struct skb_shared_hwtstamps *hwts;
|
||||
|
||||
skb = alloc_can_skb(netdev, &can_frame);
|
||||
if (!skb)
|
||||
|
@ -549,7 +550,8 @@ static int pcan_usb_pro_handle_canmsg(struct pcan_usb_pro_interface *usb_if,
|
|||
memcpy(can_frame->data, rx->data, can_frame->can_dlc);
|
||||
|
||||
peak_usb_get_ts_tv(&usb_if->time_ref, le32_to_cpu(rx->ts32), &tv);
|
||||
skb->tstamp = timeval_to_ktime(tv);
|
||||
hwts = skb_hwtstamps(skb);
|
||||
hwts->hwtstamp = timeval_to_ktime(tv);
|
||||
|
||||
netif_rx(skb);
|
||||
netdev->stats.rx_packets++;
|
||||
|
@ -570,6 +572,7 @@ static int pcan_usb_pro_handle_error(struct pcan_usb_pro_interface *usb_if,
|
|||
u8 err_mask = 0;
|
||||
struct sk_buff *skb;
|
||||
struct timeval tv;
|
||||
struct skb_shared_hwtstamps *hwts;
|
||||
|
||||
/* nothing should be sent while in BUS_OFF state */
|
||||
if (dev->can.state == CAN_STATE_BUS_OFF)
|
||||
|
@ -664,7 +667,8 @@ static int pcan_usb_pro_handle_error(struct pcan_usb_pro_interface *usb_if,
|
|||
dev->can.state = new_state;
|
||||
|
||||
peak_usb_get_ts_tv(&usb_if->time_ref, le32_to_cpu(er->ts32), &tv);
|
||||
skb->tstamp = timeval_to_ktime(tv);
|
||||
hwts = skb_hwtstamps(skb);
|
||||
hwts->hwtstamp = timeval_to_ktime(tv);
|
||||
netif_rx(skb);
|
||||
netdev->stats.rx_packets++;
|
||||
netdev->stats.rx_bytes += can_frame->can_dlc;
|
||||
|
|
|
@ -237,7 +237,7 @@ static int mlx4_en_dcbnl_ieee_setmaxrate(struct net_device *dev,
|
|||
if (err)
|
||||
return err;
|
||||
|
||||
memcpy(priv->maxrate, tmp, sizeof(*priv->maxrate));
|
||||
memcpy(priv->maxrate, tmp, sizeof(priv->maxrate));
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
|
@ -1794,10 +1794,12 @@ static void team_setup(struct net_device *dev)
|
|||
|
||||
dev->features |= NETIF_F_LLTX;
|
||||
dev->features |= NETIF_F_GRO;
|
||||
dev->hw_features = NETIF_F_HW_VLAN_TX |
|
||||
dev->hw_features = TEAM_VLAN_FEATURES |
|
||||
NETIF_F_HW_VLAN_TX |
|
||||
NETIF_F_HW_VLAN_RX |
|
||||
NETIF_F_HW_VLAN_FILTER;
|
||||
|
||||
dev->hw_features &= ~(NETIF_F_ALL_CSUM & ~NETIF_F_HW_CSUM);
|
||||
dev->features |= dev->hw_features;
|
||||
}
|
||||
|
||||
|
|
|
@ -385,6 +385,7 @@ static const struct usb_device_id products[] = {
|
|||
},
|
||||
|
||||
/* 3. Combined interface devices matching on interface number */
|
||||
{QMI_FIXED_INTF(0x12d1, 0x140c, 1)}, /* Huawei E173 */
|
||||
{QMI_FIXED_INTF(0x19d2, 0x0002, 1)},
|
||||
{QMI_FIXED_INTF(0x19d2, 0x0012, 1)},
|
||||
{QMI_FIXED_INTF(0x19d2, 0x0017, 3)},
|
||||
|
|
|
@ -539,25 +539,25 @@ static void insert_char(struct vc_data *vc, unsigned int nr)
|
|||
{
|
||||
unsigned short *p = (unsigned short *) vc->vc_pos;
|
||||
|
||||
scr_memmovew(p + nr, p, vc->vc_cols - vc->vc_x);
|
||||
scr_memmovew(p + nr, p, (vc->vc_cols - vc->vc_x) * 2);
|
||||
scr_memsetw(p, vc->vc_video_erase_char, nr * 2);
|
||||
vc->vc_need_wrap = 0;
|
||||
if (DO_UPDATE(vc))
|
||||
do_update_region(vc, (unsigned long) p,
|
||||
(vc->vc_cols - vc->vc_x) / 2 + 1);
|
||||
vc->vc_cols - vc->vc_x);
|
||||
}
|
||||
|
||||
static void delete_char(struct vc_data *vc, unsigned int nr)
|
||||
{
|
||||
unsigned short *p = (unsigned short *) vc->vc_pos;
|
||||
|
||||
scr_memcpyw(p, p + nr, vc->vc_cols - vc->vc_x - nr);
|
||||
scr_memcpyw(p, p + nr, (vc->vc_cols - vc->vc_x - nr) * 2);
|
||||
scr_memsetw(p + vc->vc_cols - vc->vc_x - nr, vc->vc_video_erase_char,
|
||||
nr * 2);
|
||||
vc->vc_need_wrap = 0;
|
||||
if (DO_UPDATE(vc))
|
||||
do_update_region(vc, (unsigned long) p,
|
||||
(vc->vc_cols - vc->vc_x) / 2);
|
||||
vc->vc_cols - vc->vc_x);
|
||||
}
|
||||
|
||||
static int softcursor_original;
|
||||
|
|
|
@ -1049,7 +1049,7 @@ static int translate_desc(struct vhost_dev *dev, u64 addr, u32 len,
|
|||
}
|
||||
_iov = iov + ret;
|
||||
size = reg->memory_size - addr + reg->guest_phys_addr;
|
||||
_iov->iov_len = min((u64)len, size);
|
||||
_iov->iov_len = min((u64)len - s, size);
|
||||
_iov->iov_base = (void __user *)(unsigned long)
|
||||
(reg->userspace_addr + addr - reg->guest_phys_addr);
|
||||
s += size;
|
||||
|
|
|
@ -228,6 +228,8 @@ static void requeue_io(struct inode *inode, struct bdi_writeback *wb)
|
|||
static void inode_sync_complete(struct inode *inode)
|
||||
{
|
||||
inode->i_state &= ~I_SYNC;
|
||||
/* If inode is clean an unused, put it into LRU now... */
|
||||
inode_add_lru(inode);
|
||||
/* Waiters must see I_SYNC cleared before being woken up */
|
||||
smp_mb();
|
||||
wake_up_bit(&inode->i_state, __I_SYNC);
|
||||
|
|
16
fs/inode.c
16
fs/inode.c
|
@ -408,6 +408,19 @@ static void inode_lru_list_add(struct inode *inode)
|
|||
spin_unlock(&inode->i_sb->s_inode_lru_lock);
|
||||
}
|
||||
|
||||
/*
|
||||
* Add inode to LRU if needed (inode is unused and clean).
|
||||
*
|
||||
* Needs inode->i_lock held.
|
||||
*/
|
||||
void inode_add_lru(struct inode *inode)
|
||||
{
|
||||
if (!(inode->i_state & (I_DIRTY | I_SYNC | I_FREEING | I_WILL_FREE)) &&
|
||||
!atomic_read(&inode->i_count) && inode->i_sb->s_flags & MS_ACTIVE)
|
||||
inode_lru_list_add(inode);
|
||||
}
|
||||
|
||||
|
||||
static void inode_lru_list_del(struct inode *inode)
|
||||
{
|
||||
spin_lock(&inode->i_sb->s_inode_lru_lock);
|
||||
|
@ -1390,8 +1403,7 @@ static void iput_final(struct inode *inode)
|
|||
|
||||
if (!drop && (sb->s_flags & MS_ACTIVE)) {
|
||||
inode->i_state |= I_REFERENCED;
|
||||
if (!(inode->i_state & (I_DIRTY|I_SYNC)))
|
||||
inode_lru_list_add(inode);
|
||||
inode_add_lru(inode);
|
||||
spin_unlock(&inode->i_lock);
|
||||
return;
|
||||
}
|
||||
|
|
|
@ -110,6 +110,7 @@ extern int open_check_o_direct(struct file *f);
|
|||
* inode.c
|
||||
*/
|
||||
extern spinlock_t inode_sb_list_lock;
|
||||
extern void inode_add_lru(struct inode *inode);
|
||||
|
||||
/*
|
||||
* fs-writeback.c
|
||||
|
|
|
@ -1961,7 +1961,9 @@ retry:
|
|||
spin_unlock(&journal->j_list_lock);
|
||||
jbd_unlock_bh_state(bh);
|
||||
spin_unlock(&journal->j_state_lock);
|
||||
unlock_buffer(bh);
|
||||
log_wait_commit(journal, tid);
|
||||
lock_buffer(bh);
|
||||
goto retry;
|
||||
}
|
||||
/*
|
||||
|
|
|
@ -1877,8 +1877,9 @@ static struct dentry *proc_map_files_lookup(struct inode *dir,
|
|||
if (!vma)
|
||||
goto out_no_vma;
|
||||
|
||||
result = proc_map_files_instantiate(dir, dentry, task,
|
||||
(void *)(unsigned long)vma->vm_file->f_mode);
|
||||
if (vma->vm_file)
|
||||
result = proc_map_files_instantiate(dir, dentry, task,
|
||||
(void *)(unsigned long)vma->vm_file->f_mode);
|
||||
|
||||
out_no_vma:
|
||||
up_read(&mm->mmap_sem);
|
||||
|
|
|
@ -15,6 +15,7 @@ struct pt_regs;
|
|||
#define BUILD_BUG_ON_NOT_POWER_OF_2(n)
|
||||
#define BUILD_BUG_ON_ZERO(e) (0)
|
||||
#define BUILD_BUG_ON_NULL(e) ((void*)0)
|
||||
#define BUILD_BUG_ON_INVALID(e) (0)
|
||||
#define BUILD_BUG_ON(condition)
|
||||
#define BUILD_BUG() (0)
|
||||
#else /* __CHECKER__ */
|
||||
|
|
|
@ -31,6 +31,7 @@ struct vm_area_struct;
|
|||
#define ___GFP_THISNODE 0x40000u
|
||||
#define ___GFP_RECLAIMABLE 0x80000u
|
||||
#define ___GFP_NOTRACK 0x200000u
|
||||
#define ___GFP_NO_KSWAPD 0x400000u
|
||||
#define ___GFP_OTHER_NODE 0x800000u
|
||||
#define ___GFP_WRITE 0x1000000u
|
||||
|
||||
|
@ -85,6 +86,7 @@ struct vm_area_struct;
|
|||
#define __GFP_RECLAIMABLE ((__force gfp_t)___GFP_RECLAIMABLE) /* Page is reclaimable */
|
||||
#define __GFP_NOTRACK ((__force gfp_t)___GFP_NOTRACK) /* Don't track with kmemcheck */
|
||||
|
||||
#define __GFP_NO_KSWAPD ((__force gfp_t)___GFP_NO_KSWAPD)
|
||||
#define __GFP_OTHER_NODE ((__force gfp_t)___GFP_OTHER_NODE) /* On behalf of other node */
|
||||
#define __GFP_WRITE ((__force gfp_t)___GFP_WRITE) /* Allocator intends to dirty page */
|
||||
|
||||
|
@ -114,7 +116,8 @@ struct vm_area_struct;
|
|||
__GFP_MOVABLE)
|
||||
#define GFP_IOFS (__GFP_IO | __GFP_FS)
|
||||
#define GFP_TRANSHUGE (GFP_HIGHUSER_MOVABLE | __GFP_COMP | \
|
||||
__GFP_NOMEMALLOC | __GFP_NORETRY | __GFP_NOWARN)
|
||||
__GFP_NOMEMALLOC | __GFP_NORETRY | __GFP_NOWARN | \
|
||||
__GFP_NO_KSWAPD)
|
||||
|
||||
#ifdef CONFIG_NUMA
|
||||
#define GFP_THISNODE (__GFP_THISNODE | __GFP_NOWARN | __GFP_NORETRY)
|
||||
|
|
|
@ -13,7 +13,7 @@ struct percpu_rw_semaphore {
|
|||
};
|
||||
|
||||
#define light_mb() barrier()
|
||||
#define heavy_mb() synchronize_sched()
|
||||
#define heavy_mb() synchronize_sched_expedited()
|
||||
|
||||
static inline void percpu_down_read(struct percpu_rw_semaphore *p)
|
||||
{
|
||||
|
@ -51,7 +51,7 @@ static inline void percpu_down_write(struct percpu_rw_semaphore *p)
|
|||
{
|
||||
mutex_lock(&p->mtx);
|
||||
p->locked = true;
|
||||
synchronize_sched(); /* make sure that all readers exit the rcu_read_lock_sched region */
|
||||
synchronize_sched_expedited(); /* make sure that all readers exit the rcu_read_lock_sched region */
|
||||
while (__percpu_count(p->counters))
|
||||
msleep(1);
|
||||
heavy_mb(); /* C, between read of p->counter and write to data, paired with B */
|
||||
|
|
|
@ -40,14 +40,6 @@ enum adv7604_op_ch_sel {
|
|||
ADV7604_OP_CH_SEL_RBG = 5,
|
||||
};
|
||||
|
||||
/* Primary mode (IO register 0x01, [3:0]) */
|
||||
enum adv7604_prim_mode {
|
||||
ADV7604_PRIM_MODE_COMP = 1,
|
||||
ADV7604_PRIM_MODE_RGB = 2,
|
||||
ADV7604_PRIM_MODE_HDMI_COMP = 5,
|
||||
ADV7604_PRIM_MODE_HDMI_GR = 6,
|
||||
};
|
||||
|
||||
/* Input Color Space (IO register 0x02, [7:4]) */
|
||||
enum adv7604_inp_color_space {
|
||||
ADV7604_INP_COLOR_SPACE_LIM_RGB = 0,
|
||||
|
@ -103,9 +95,6 @@ struct adv7604_platform_data {
|
|||
/* Bus rotation and reordering */
|
||||
enum adv7604_op_ch_sel op_ch_sel;
|
||||
|
||||
/* Primary mode */
|
||||
enum adv7604_prim_mode prim_mode;
|
||||
|
||||
/* Select output format */
|
||||
enum adv7604_op_format_sel op_format_sel;
|
||||
|
||||
|
@ -142,6 +131,16 @@ struct adv7604_platform_data {
|
|||
u8 i2c_vdp;
|
||||
};
|
||||
|
||||
/*
|
||||
* Mode of operation.
|
||||
* This is used as the input argument of the s_routing video op.
|
||||
*/
|
||||
enum adv7604_mode {
|
||||
ADV7604_MODE_COMP,
|
||||
ADV7604_MODE_GR,
|
||||
ADV7604_MODE_HDMI,
|
||||
};
|
||||
|
||||
#define V4L2_CID_ADV_RX_ANALOG_SAMPLING_PHASE (V4L2_CID_DV_CLASS_BASE + 0x1000)
|
||||
#define V4L2_CID_ADV_RX_FREE_RUN_COLOR_MANUAL (V4L2_CID_DV_CLASS_BASE + 0x1001)
|
||||
#define V4L2_CID_ADV_RX_FREE_RUN_COLOR (V4L2_CID_DV_CLASS_BASE + 0x1002)
|
||||
|
|
|
@ -36,6 +36,7 @@
|
|||
{(unsigned long)__GFP_RECLAIMABLE, "GFP_RECLAIMABLE"}, \
|
||||
{(unsigned long)__GFP_MOVABLE, "GFP_MOVABLE"}, \
|
||||
{(unsigned long)__GFP_NOTRACK, "GFP_NOTRACK"}, \
|
||||
{(unsigned long)__GFP_NO_KSWAPD, "GFP_NO_KSWAPD"}, \
|
||||
{(unsigned long)__GFP_OTHER_NODE, "GFP_OTHER_NODE"} \
|
||||
) : "GFP_NOWAIT"
|
||||
|
||||
|
|
|
@ -843,6 +843,9 @@ static void wake_futex(struct futex_q *q)
|
|||
{
|
||||
struct task_struct *p = q->task;
|
||||
|
||||
if (WARN(q->pi_state || q->rt_waiter, "refusing to wake PI futex\n"))
|
||||
return;
|
||||
|
||||
/*
|
||||
* We set q->lock_ptr = NULL _before_ we wake up the task. If
|
||||
* a non-futex wake up happens on another CPU then the task
|
||||
|
@ -1078,6 +1081,10 @@ retry_private:
|
|||
|
||||
plist_for_each_entry_safe(this, next, head, list) {
|
||||
if (match_futex (&this->key, &key1)) {
|
||||
if (this->pi_state || this->rt_waiter) {
|
||||
ret = -EINVAL;
|
||||
goto out_unlock;
|
||||
}
|
||||
wake_futex(this);
|
||||
if (++ret >= nr_wake)
|
||||
break;
|
||||
|
@ -1090,6 +1097,10 @@ retry_private:
|
|||
op_ret = 0;
|
||||
plist_for_each_entry_safe(this, next, head, list) {
|
||||
if (match_futex (&this->key, &key2)) {
|
||||
if (this->pi_state || this->rt_waiter) {
|
||||
ret = -EINVAL;
|
||||
goto out_unlock;
|
||||
}
|
||||
wake_futex(this);
|
||||
if (++op_ret >= nr_wake2)
|
||||
break;
|
||||
|
@ -1098,6 +1109,7 @@ retry_private:
|
|||
ret += op_ret;
|
||||
}
|
||||
|
||||
out_unlock:
|
||||
double_unlock_hb(hb1, hb2);
|
||||
out_put_keys:
|
||||
put_futex_key(&key2);
|
||||
|
@ -1387,9 +1399,13 @@ retry_private:
|
|||
/*
|
||||
* FUTEX_WAIT_REQEUE_PI and FUTEX_CMP_REQUEUE_PI should always
|
||||
* be paired with each other and no other futex ops.
|
||||
*
|
||||
* We should never be requeueing a futex_q with a pi_state,
|
||||
* which is awaiting a futex_unlock_pi().
|
||||
*/
|
||||
if ((requeue_pi && !this->rt_waiter) ||
|
||||
(!requeue_pi && this->rt_waiter)) {
|
||||
(!requeue_pi && this->rt_waiter) ||
|
||||
this->pi_state) {
|
||||
ret = -EINVAL;
|
||||
break;
|
||||
}
|
||||
|
|
|
@ -116,7 +116,7 @@ static unsigned long get_timestamp(int this_cpu)
|
|||
return cpu_clock(this_cpu) >> 30LL; /* 2^30 ~= 10^9 */
|
||||
}
|
||||
|
||||
static unsigned long get_sample_period(void)
|
||||
static u64 get_sample_period(void)
|
||||
{
|
||||
/*
|
||||
* convert watchdog_thresh from seconds to ns
|
||||
|
@ -125,7 +125,7 @@ static unsigned long get_sample_period(void)
|
|||
* and hard thresholds) to increment before the
|
||||
* hardlockup detector generates a warning
|
||||
*/
|
||||
return get_softlockup_thresh() * (NSEC_PER_SEC / 5);
|
||||
return get_softlockup_thresh() * ((u64)NSEC_PER_SEC / 5);
|
||||
}
|
||||
|
||||
/* Commands for resetting the watchdog */
|
||||
|
|
|
@ -641,7 +641,14 @@ do { \
|
|||
************** MIPS *****************
|
||||
***************************************/
|
||||
#if defined(__mips__) && W_TYPE_SIZE == 32
|
||||
#if __GNUC__ > 2 || __GNUC_MINOR__ >= 7
|
||||
#if __GNUC__ >= 4 && __GNUC_MINOR__ >= 4
|
||||
#define umul_ppmm(w1, w0, u, v) \
|
||||
do { \
|
||||
UDItype __ll = (UDItype)(u) * (v); \
|
||||
w1 = __ll >> 32; \
|
||||
w0 = __ll; \
|
||||
} while (0)
|
||||
#elif __GNUC__ > 2 || __GNUC_MINOR__ >= 7
|
||||
#define umul_ppmm(w1, w0, u, v) \
|
||||
__asm__ ("multu %2,%3" \
|
||||
: "=l" ((USItype)(w0)), \
|
||||
|
@ -666,7 +673,15 @@ do { \
|
|||
************** MIPS/64 **************
|
||||
***************************************/
|
||||
#if (defined(__mips) && __mips >= 3) && W_TYPE_SIZE == 64
|
||||
#if __GNUC__ > 2 || __GNUC_MINOR__ >= 7
|
||||
#if __GNUC__ >= 4 && __GNUC_MINOR__ >= 4
|
||||
#define umul_ppmm(w1, w0, u, v) \
|
||||
do { \
|
||||
typedef unsigned int __ll_UTItype __attribute__((mode(TI))); \
|
||||
__ll_UTItype __ll = (__ll_UTItype)(u) * (v); \
|
||||
w1 = __ll >> 64; \
|
||||
w0 = __ll; \
|
||||
} while (0)
|
||||
#elif __GNUC__ > 2 || __GNUC_MINOR__ >= 7
|
||||
#define umul_ppmm(w1, w0, u, v) \
|
||||
__asm__ ("dmultu %2,%3" \
|
||||
: "=l" ((UDItype)(w0)), \
|
||||
|
|
|
@ -2416,8 +2416,9 @@ __alloc_pages_slowpath(gfp_t gfp_mask, unsigned int order,
|
|||
goto nopage;
|
||||
|
||||
restart:
|
||||
wake_all_kswapd(order, zonelist, high_zoneidx,
|
||||
zone_idx(preferred_zone));
|
||||
if (!(gfp_mask & __GFP_NO_KSWAPD))
|
||||
wake_all_kswapd(order, zonelist, high_zoneidx,
|
||||
zone_idx(preferred_zone));
|
||||
|
||||
/*
|
||||
* OK, we're below the kswapd watermark and have kicked background
|
||||
|
@ -2494,7 +2495,7 @@ rebalance:
|
|||
* system then fail the allocation instead of entering direct reclaim.
|
||||
*/
|
||||
if ((deferred_compaction || contended_compaction) &&
|
||||
(gfp_mask & (__GFP_MOVABLE|__GFP_REPEAT)) == __GFP_MOVABLE)
|
||||
(gfp_mask & __GFP_NO_KSWAPD))
|
||||
goto nopage;
|
||||
|
||||
/* Try direct reclaim and then allocating */
|
||||
|
|
37
mm/vmscan.c
37
mm/vmscan.c
|
@ -2207,9 +2207,12 @@ static bool pfmemalloc_watermark_ok(pg_data_t *pgdat)
|
|||
* Throttle direct reclaimers if backing storage is backed by the network
|
||||
* and the PFMEMALLOC reserve for the preferred node is getting dangerously
|
||||
* depleted. kswapd will continue to make progress and wake the processes
|
||||
* when the low watermark is reached
|
||||
* when the low watermark is reached.
|
||||
*
|
||||
* Returns true if a fatal signal was delivered during throttling. If this
|
||||
* happens, the page allocator should not consider triggering the OOM killer.
|
||||
*/
|
||||
static void throttle_direct_reclaim(gfp_t gfp_mask, struct zonelist *zonelist,
|
||||
static bool throttle_direct_reclaim(gfp_t gfp_mask, struct zonelist *zonelist,
|
||||
nodemask_t *nodemask)
|
||||
{
|
||||
struct zone *zone;
|
||||
|
@ -2224,13 +2227,20 @@ static void throttle_direct_reclaim(gfp_t gfp_mask, struct zonelist *zonelist,
|
|||
* processes to block on log_wait_commit().
|
||||
*/
|
||||
if (current->flags & PF_KTHREAD)
|
||||
return;
|
||||
goto out;
|
||||
|
||||
/*
|
||||
* If a fatal signal is pending, this process should not throttle.
|
||||
* It should return quickly so it can exit and free its memory
|
||||
*/
|
||||
if (fatal_signal_pending(current))
|
||||
goto out;
|
||||
|
||||
/* Check if the pfmemalloc reserves are ok */
|
||||
first_zones_zonelist(zonelist, high_zoneidx, NULL, &zone);
|
||||
pgdat = zone->zone_pgdat;
|
||||
if (pfmemalloc_watermark_ok(pgdat))
|
||||
return;
|
||||
goto out;
|
||||
|
||||
/* Account for the throttling */
|
||||
count_vm_event(PGSCAN_DIRECT_THROTTLE);
|
||||
|
@ -2246,12 +2256,20 @@ static void throttle_direct_reclaim(gfp_t gfp_mask, struct zonelist *zonelist,
|
|||
if (!(gfp_mask & __GFP_FS)) {
|
||||
wait_event_interruptible_timeout(pgdat->pfmemalloc_wait,
|
||||
pfmemalloc_watermark_ok(pgdat), HZ);
|
||||
return;
|
||||
|
||||
goto check_pending;
|
||||
}
|
||||
|
||||
/* Throttle until kswapd wakes the process */
|
||||
wait_event_killable(zone->zone_pgdat->pfmemalloc_wait,
|
||||
pfmemalloc_watermark_ok(pgdat));
|
||||
|
||||
check_pending:
|
||||
if (fatal_signal_pending(current))
|
||||
return true;
|
||||
|
||||
out:
|
||||
return false;
|
||||
}
|
||||
|
||||
unsigned long try_to_free_pages(struct zonelist *zonelist, int order,
|
||||
|
@ -2273,13 +2291,12 @@ unsigned long try_to_free_pages(struct zonelist *zonelist, int order,
|
|||
.gfp_mask = sc.gfp_mask,
|
||||
};
|
||||
|
||||
throttle_direct_reclaim(gfp_mask, zonelist, nodemask);
|
||||
|
||||
/*
|
||||
* Do not enter reclaim if fatal signal is pending. 1 is returned so
|
||||
* that the page allocator does not consider triggering OOM
|
||||
* Do not enter reclaim if fatal signal was delivered while throttled.
|
||||
* 1 is returned so that the page allocator does not OOM kill at this
|
||||
* point.
|
||||
*/
|
||||
if (fatal_signal_pending(current))
|
||||
if (throttle_direct_reclaim(gfp_mask, zonelist, nodemask))
|
||||
return 1;
|
||||
|
||||
trace_mm_vmscan_direct_reclaim_begin(order,
|
||||
|
|
|
@ -1084,6 +1084,9 @@ static int bcm_rx_setup(struct bcm_msg_head *msg_head, struct msghdr *msg,
|
|||
op->sk = sk;
|
||||
op->ifindex = ifindex;
|
||||
|
||||
/* ifindex for timeout events w/o previous frame reception */
|
||||
op->rx_ifindex = ifindex;
|
||||
|
||||
/* initialize uninitialized (kzalloc) structure */
|
||||
hrtimer_init(&op->timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
|
||||
op->timer.function = bcm_rx_timeout_handler;
|
||||
|
|
|
@ -257,7 +257,8 @@ static inline bool icmpv4_xrlim_allow(struct net *net, struct rtable *rt,
|
|||
struct inet_peer *peer = inet_getpeer_v4(net->ipv4.peers, fl4->daddr, 1);
|
||||
rc = inet_peer_xrlim_allow(peer,
|
||||
net->ipv4.sysctl_icmp_ratelimit);
|
||||
inet_putpeer(peer);
|
||||
if (peer)
|
||||
inet_putpeer(peer);
|
||||
}
|
||||
out:
|
||||
return rc;
|
||||
|
|
|
@ -1323,6 +1323,10 @@ int ip_mroute_setsockopt(struct sock *sk, int optname, char __user *optval, unsi
|
|||
if (get_user(v, (u32 __user *)optval))
|
||||
return -EFAULT;
|
||||
|
||||
/* "pimreg%u" should not exceed 16 bytes (IFNAMSIZ) */
|
||||
if (v != RT_TABLE_DEFAULT && v >= 1000000000)
|
||||
return -EINVAL;
|
||||
|
||||
rtnl_lock();
|
||||
ret = 0;
|
||||
if (sk == rtnl_dereference(mrt->mroute_sk)) {
|
||||
|
|
|
@ -441,6 +441,7 @@ struct tsap_cb *irttp_open_tsap(__u8 stsap_sel, int credit, notify_t *notify)
|
|||
lsap = irlmp_open_lsap(stsap_sel, &ttp_notify, 0);
|
||||
if (lsap == NULL) {
|
||||
IRDA_DEBUG(0, "%s: unable to allocate LSAP!!\n", __func__);
|
||||
__irttp_close_tsap(self);
|
||||
return NULL;
|
||||
}
|
||||
|
||||
|
|
|
@ -793,7 +793,7 @@ static struct ip_set_type hash_netiface_type __read_mostly = {
|
|||
[IPSET_ATTR_IP] = { .type = NLA_NESTED },
|
||||
[IPSET_ATTR_IP_TO] = { .type = NLA_NESTED },
|
||||
[IPSET_ATTR_IFACE] = { .type = NLA_NUL_STRING,
|
||||
.len = IPSET_MAXNAMELEN - 1 },
|
||||
.len = IFNAMSIZ - 1 },
|
||||
[IPSET_ATTR_CADT_FLAGS] = { .type = NLA_U32 },
|
||||
[IPSET_ATTR_CIDR] = { .type = NLA_U8 },
|
||||
[IPSET_ATTR_TIMEOUT] = { .type = NLA_U32 },
|
||||
|
|
|
@ -702,15 +702,11 @@ int ovs_flow_extract(struct sk_buff *skb, u16 in_port, struct sw_flow_key *key,
|
|||
/* We only match on the lower 8 bits of the opcode. */
|
||||
if (ntohs(arp->ar_op) <= 0xff)
|
||||
key->ip.proto = ntohs(arp->ar_op);
|
||||
|
||||
if (key->ip.proto == ARPOP_REQUEST
|
||||
|| key->ip.proto == ARPOP_REPLY) {
|
||||
memcpy(&key->ipv4.addr.src, arp->ar_sip, sizeof(key->ipv4.addr.src));
|
||||
memcpy(&key->ipv4.addr.dst, arp->ar_tip, sizeof(key->ipv4.addr.dst));
|
||||
memcpy(key->ipv4.arp.sha, arp->ar_sha, ETH_ALEN);
|
||||
memcpy(key->ipv4.arp.tha, arp->ar_tha, ETH_ALEN);
|
||||
key_len = SW_FLOW_KEY_OFFSET(ipv4.arp);
|
||||
}
|
||||
memcpy(&key->ipv4.addr.src, arp->ar_sip, sizeof(key->ipv4.addr.src));
|
||||
memcpy(&key->ipv4.addr.dst, arp->ar_tip, sizeof(key->ipv4.addr.dst));
|
||||
memcpy(key->ipv4.arp.sha, arp->ar_sha, ETH_ALEN);
|
||||
memcpy(key->ipv4.arp.tha, arp->ar_tha, ETH_ALEN);
|
||||
key_len = SW_FLOW_KEY_OFFSET(ipv4.arp);
|
||||
}
|
||||
} else if (key->eth.type == htons(ETH_P_IPV6)) {
|
||||
int nh_len; /* IPv6 Header + Extensions */
|
||||
|
|
|
@ -158,7 +158,7 @@ static int netdev_send(struct vport *vport, struct sk_buff *skb)
|
|||
|
||||
if (unlikely(packet_length(skb) > mtu && !skb_is_gso(skb))) {
|
||||
net_warn_ratelimited("%s: dropped over-mtu packet: %d > %d\n",
|
||||
ovs_dp_name(vport->dp),
|
||||
netdev_vport->dev->name,
|
||||
packet_length(skb), mtu);
|
||||
goto error;
|
||||
}
|
||||
|
|
|
@ -183,7 +183,7 @@ struct sctp_datamsg *sctp_datamsg_from_user(struct sctp_association *asoc,
|
|||
|
||||
msg = sctp_datamsg_new(GFP_KERNEL);
|
||||
if (!msg)
|
||||
return NULL;
|
||||
return ERR_PTR(-ENOMEM);
|
||||
|
||||
/* Note: Calculate this outside of the loop, so that all fragments
|
||||
* have the same expiration.
|
||||
|
@ -280,11 +280,14 @@ struct sctp_datamsg *sctp_datamsg_from_user(struct sctp_association *asoc,
|
|||
|
||||
chunk = sctp_make_datafrag_empty(asoc, sinfo, len, frag, 0);
|
||||
|
||||
if (!chunk)
|
||||
if (!chunk) {
|
||||
err = -ENOMEM;
|
||||
goto errout;
|
||||
}
|
||||
|
||||
err = sctp_user_addto_chunk(chunk, offset, len, msgh->msg_iov);
|
||||
if (err < 0)
|
||||
goto errout;
|
||||
goto errout_chunk_free;
|
||||
|
||||
offset += len;
|
||||
|
||||
|
@ -315,8 +318,10 @@ struct sctp_datamsg *sctp_datamsg_from_user(struct sctp_association *asoc,
|
|||
|
||||
chunk = sctp_make_datafrag_empty(asoc, sinfo, over, frag, 0);
|
||||
|
||||
if (!chunk)
|
||||
if (!chunk) {
|
||||
err = -ENOMEM;
|
||||
goto errout;
|
||||
}
|
||||
|
||||
err = sctp_user_addto_chunk(chunk, offset, over,msgh->msg_iov);
|
||||
|
||||
|
@ -324,7 +329,7 @@ struct sctp_datamsg *sctp_datamsg_from_user(struct sctp_association *asoc,
|
|||
__skb_pull(chunk->skb, (__u8 *)chunk->chunk_hdr
|
||||
- (__u8 *)chunk->skb->data);
|
||||
if (err < 0)
|
||||
goto errout;
|
||||
goto errout_chunk_free;
|
||||
|
||||
sctp_datamsg_assign(msg, chunk);
|
||||
list_add_tail(&chunk->frag_list, &msg->chunks);
|
||||
|
@ -332,6 +337,9 @@ struct sctp_datamsg *sctp_datamsg_from_user(struct sctp_association *asoc,
|
|||
|
||||
return msg;
|
||||
|
||||
errout_chunk_free:
|
||||
sctp_chunk_free(chunk);
|
||||
|
||||
errout:
|
||||
list_for_each_safe(pos, temp, &msg->chunks) {
|
||||
list_del_init(pos);
|
||||
|
@ -339,7 +347,7 @@ errout:
|
|||
sctp_chunk_free(chunk);
|
||||
}
|
||||
sctp_datamsg_put(msg);
|
||||
return NULL;
|
||||
return ERR_PTR(err);
|
||||
}
|
||||
|
||||
/* Check whether this message has expired. */
|
||||
|
|
|
@ -1916,8 +1916,8 @@ SCTP_STATIC int sctp_sendmsg(struct kiocb *iocb, struct sock *sk,
|
|||
|
||||
/* Break the message into multiple chunks of maximum size. */
|
||||
datamsg = sctp_datamsg_from_user(asoc, sinfo, msg, msg_len);
|
||||
if (!datamsg) {
|
||||
err = -ENOMEM;
|
||||
if (IS_ERR(datamsg)) {
|
||||
err = PTR_ERR(datamsg);
|
||||
goto out_free;
|
||||
}
|
||||
|
||||
|
|
|
@ -331,7 +331,7 @@ void sctp_transport_update_rto(struct sctp_transport *tp, __u32 rtt)
|
|||
* 1/8, rto_alpha would be expressed as 3.
|
||||
*/
|
||||
tp->rttvar = tp->rttvar - (tp->rttvar >> net->sctp.rto_beta)
|
||||
+ ((abs(tp->srtt - rtt)) >> net->sctp.rto_beta);
|
||||
+ (((__u32)abs64((__s64)tp->srtt - (__s64)rtt)) >> net->sctp.rto_beta);
|
||||
tp->srtt = tp->srtt - (tp->srtt >> net->sctp.rto_alpha)
|
||||
+ (rtt >> net->sctp.rto_alpha);
|
||||
} else {
|
||||
|
|
|
@ -42,6 +42,9 @@ foreach my $filename (@files) {
|
|||
$line =~ s/(^|\s)(inline)\b/$1__$2__/g;
|
||||
$line =~ s/(^|\s)(asm)\b(\s|[(]|$)/$1__$2__$3/g;
|
||||
$line =~ s/(^|\s|[(])(volatile)\b(\s|[(]|$)/$1__$2__$3/g;
|
||||
$line =~ s/#ifndef _UAPI/#ifndef /;
|
||||
$line =~ s/#define _UAPI/#define /;
|
||||
$line =~ s!#endif /[*] _UAPI!#endif /* !;
|
||||
printf {$out} "%s", $line;
|
||||
}
|
||||
close $out;
|
||||
|
|
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Ссылка в новой задаче