crypto: qce - support zero length test vectors
crypto test module passes zero length vectors as test input to sha-1 and sha-256. To provide correct output for these vectors, hash zero support has been added as in other crypto drivers. Signed-off-by: Sivaprakash Murugesan <sivaprak@codeaurora.org> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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@ -624,6 +624,8 @@ config CRYPTO_DEV_QCE_SKCIPHER
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config CRYPTO_DEV_QCE_SHA
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bool
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depends on CRYPTO_DEV_QCE
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select CRYPTO_SHA1
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select CRYPTO_SHA256
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choice
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prompt "Algorithms enabled for QCE acceleration"
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@ -87,6 +87,8 @@ struct qce_alg_template {
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struct ahash_alg ahash;
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} alg;
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struct qce_device *qce;
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const u8 *hash_zero;
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const u32 digest_size;
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};
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void qce_cpu_to_be32p_array(__be32 *dst, const u8 *src, unsigned int len);
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@ -305,8 +305,12 @@ static int qce_ahash_final(struct ahash_request *req)
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struct qce_alg_template *tmpl = to_ahash_tmpl(req->base.tfm);
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struct qce_device *qce = tmpl->qce;
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if (!rctx->buflen)
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if (!rctx->buflen) {
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if (tmpl->hash_zero)
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memcpy(req->result, tmpl->hash_zero,
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tmpl->alg.ahash.halg.digestsize);
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return 0;
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}
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rctx->last_blk = true;
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@ -338,6 +342,13 @@ static int qce_ahash_digest(struct ahash_request *req)
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rctx->first_blk = true;
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rctx->last_blk = true;
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if (!rctx->nbytes_orig) {
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if (tmpl->hash_zero)
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memcpy(req->result, tmpl->hash_zero,
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tmpl->alg.ahash.halg.digestsize);
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return 0;
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}
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return qce->async_req_enqueue(tmpl->qce, &req->base);
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}
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@ -490,6 +501,11 @@ static int qce_ahash_register_one(const struct qce_ahash_def *def,
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alg->halg.digestsize = def->digestsize;
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alg->halg.statesize = def->statesize;
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if (IS_SHA1(def->flags))
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tmpl->hash_zero = sha1_zero_message_hash;
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else if (IS_SHA256(def->flags))
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tmpl->hash_zero = sha256_zero_message_hash;
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base = &alg->halg.base;
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base->cra_blocksize = def->blocksize;
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base->cra_priority = 300;
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