arm64: merge __enable_mmu and __turn_mmu_on
Enabling of the MMU is split into two functions, with an align and a branch in the middle. On arm64, the entire kernel Image is ID mapped so this is really not necessary, and we can just merge it into a single function. Also replaces an open coded adrp/add reference to __enable_mmu pair with adr_l. Tested-by: Mark Rutland <mark.rutland@arm.com> Reviewed-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: Will Deacon <will.deacon@arm.com>
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@ -255,8 +255,7 @@ ENTRY(stext)
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*/
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*/
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ldr x27, =__mmap_switched // address to jump to after
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ldr x27, =__mmap_switched // address to jump to after
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// MMU has been enabled
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// MMU has been enabled
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adrp lr, __enable_mmu // return (PIC) address
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adr_l lr, __enable_mmu // return (PIC) address
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add lr, lr, #:lo12:__enable_mmu
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b __cpu_setup // initialise processor
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b __cpu_setup // initialise processor
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ENDPROC(stext)
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ENDPROC(stext)
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@ -615,11 +614,12 @@ ENDPROC(__secondary_switched)
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#endif /* CONFIG_SMP */
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#endif /* CONFIG_SMP */
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/*
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/*
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* Setup common bits before finally enabling the MMU. Essentially this is just
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* Enable the MMU.
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* loading the page table pointer and vector base registers.
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*
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*
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* On entry to this code, x0 must contain the SCTLR_EL1 value for turning on
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* x0 = SCTLR_EL1 value for turning on the MMU.
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* the MMU.
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* x27 = *virtual* address to jump to upon completion
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*
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* other registers depend on the function called upon completion
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*/
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*/
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__enable_mmu:
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__enable_mmu:
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ldr x5, =vectors
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ldr x5, =vectors
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@ -627,29 +627,10 @@ __enable_mmu:
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msr ttbr0_el1, x25 // load TTBR0
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msr ttbr0_el1, x25 // load TTBR0
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msr ttbr1_el1, x26 // load TTBR1
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msr ttbr1_el1, x26 // load TTBR1
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isb
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isb
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b __turn_mmu_on
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ENDPROC(__enable_mmu)
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/*
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* Enable the MMU. This completely changes the structure of the visible memory
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* space. You will not be able to trace execution through this.
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*
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* x0 = system control register
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* x27 = *virtual* address to jump to upon completion
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*
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* other registers depend on the function called upon completion
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*
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* We align the entire function to the smallest power of two larger than it to
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* ensure it fits within a single block map entry. Otherwise were PHYS_OFFSET
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* close to the end of a 512MB or 1GB block we might require an additional
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* table to map the entire function.
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*/
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.align 4
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__turn_mmu_on:
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msr sctlr_el1, x0
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msr sctlr_el1, x0
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isb
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isb
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br x27
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br x27
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ENDPROC(__turn_mmu_on)
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ENDPROC(__enable_mmu)
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/*
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/*
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* Calculate the start of physical memory.
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* Calculate the start of physical memory.
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