Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc
* 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc: [POWERPC] Enable restart support for lite5200 board [POWERPC] Add restart support for mpc52xx based platforms [POWERPC] Update device tree binding for mpc5200 gpt [POWERPC] Add mpc52xx_find_and_map_path(), refactor utility functions [POWERPC] bestcomm: Restrict bus prefetch bugfix to original mpc5200 silicon.
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8b0eaccab4
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@ -185,7 +185,7 @@ bestcomm@<addr> dma-controller mpc5200-bestcomm 5200 pic also requires
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Recommended soc5200 child nodes; populate as needed for your board
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name device_type compatible Description
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---- ----------- ---------- -----------
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gpt@<addr> gpt mpc5200-gpt General purpose timers
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gpt@<addr> gpt fsl,mpc5200-gpt General purpose timers
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rtc@<addr> rtc mpc5200-rtc Real time clock
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mscan@<addr> mscan mpc5200-mscan CAN bus controller
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pci@<addr> pci mpc5200-pci PCI bridge
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@ -213,7 +213,7 @@ cell-index int When multiple devices are present, is the
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5) General Purpose Timer nodes (child of soc5200 node)
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On the mpc5200 and 5200b, GPT0 has a watchdog timer function. If the board
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design supports the internal wdt, then the device node for GPT0 should
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include the empty property 'has-wdt'.
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include the empty property 'fsl,has-wdt'.
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6) PSC nodes (child of soc5200 node)
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PSC nodes can define the optional 'port-number' property to force assignment
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@ -70,18 +70,16 @@
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};
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gpt@600 { // General Purpose Timer
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compatible = "mpc5200-gpt";
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device_type = "gpt";
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compatible = "fsl,mpc5200-gpt";
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cell-index = <0>;
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reg = <600 10>;
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interrupts = <1 9 0>;
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interrupt-parent = <&mpc5200_pic>;
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has-wdt;
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fsl,has-wdt;
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};
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gpt@610 { // General Purpose Timer
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compatible = "mpc5200-gpt";
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device_type = "gpt";
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compatible = "fsl,mpc5200-gpt";
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cell-index = <1>;
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reg = <610 10>;
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interrupts = <1 a 0>;
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@ -89,8 +87,7 @@
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};
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gpt@620 { // General Purpose Timer
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compatible = "mpc5200-gpt";
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device_type = "gpt";
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compatible = "fsl,mpc5200-gpt";
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cell-index = <2>;
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reg = <620 10>;
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interrupts = <1 b 0>;
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@ -98,8 +95,7 @@
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};
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gpt@630 { // General Purpose Timer
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compatible = "mpc5200-gpt";
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device_type = "gpt";
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compatible = "fsl,mpc5200-gpt";
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cell-index = <3>;
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reg = <630 10>;
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interrupts = <1 c 0>;
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@ -107,8 +103,7 @@
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};
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gpt@640 { // General Purpose Timer
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compatible = "mpc5200-gpt";
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device_type = "gpt";
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compatible = "fsl,mpc5200-gpt";
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cell-index = <4>;
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reg = <640 10>;
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interrupts = <1 d 0>;
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@ -116,8 +111,7 @@
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};
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gpt@650 { // General Purpose Timer
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compatible = "mpc5200-gpt";
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device_type = "gpt";
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compatible = "fsl,mpc5200-gpt";
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cell-index = <5>;
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reg = <650 10>;
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interrupts = <1 e 0>;
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@ -125,8 +119,7 @@
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};
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gpt@660 { // General Purpose Timer
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compatible = "mpc5200-gpt";
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device_type = "gpt";
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compatible = "fsl,mpc5200-gpt";
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cell-index = <6>;
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reg = <660 10>;
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interrupts = <1 f 0>;
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@ -134,8 +127,7 @@
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};
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gpt@670 { // General Purpose Timer
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compatible = "mpc5200-gpt";
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device_type = "gpt";
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compatible = "fsl,mpc5200-gpt";
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cell-index = <7>;
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reg = <670 10>;
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interrupts = <1 10 0>;
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@ -70,18 +70,16 @@
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};
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gpt@600 { // General Purpose Timer
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compatible = "mpc5200b-gpt","mpc5200-gpt";
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device_type = "gpt";
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compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
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cell-index = <0>;
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reg = <600 10>;
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interrupts = <1 9 0>;
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interrupt-parent = <&mpc5200_pic>;
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has-wdt;
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fsl,has-wdt;
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};
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gpt@610 { // General Purpose Timer
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compatible = "mpc5200b-gpt","mpc5200-gpt";
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device_type = "gpt";
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compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
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cell-index = <1>;
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reg = <610 10>;
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interrupts = <1 a 0>;
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@ -89,8 +87,7 @@
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};
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gpt@620 { // General Purpose Timer
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compatible = "mpc5200b-gpt","mpc5200-gpt";
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device_type = "gpt";
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compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
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cell-index = <2>;
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reg = <620 10>;
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interrupts = <1 b 0>;
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@ -98,8 +95,7 @@
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};
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gpt@630 { // General Purpose Timer
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compatible = "mpc5200b-gpt","mpc5200-gpt";
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device_type = "gpt";
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compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
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cell-index = <3>;
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reg = <630 10>;
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interrupts = <1 c 0>;
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@ -107,8 +103,7 @@
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};
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gpt@640 { // General Purpose Timer
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compatible = "mpc5200b-gpt","mpc5200-gpt";
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device_type = "gpt";
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compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
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cell-index = <4>;
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reg = <640 10>;
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interrupts = <1 d 0>;
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@ -116,8 +111,7 @@
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};
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gpt@650 { // General Purpose Timer
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compatible = "mpc5200b-gpt","mpc5200-gpt";
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device_type = "gpt";
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compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
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cell-index = <5>;
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reg = <650 10>;
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interrupts = <1 e 0>;
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@ -125,8 +119,7 @@
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};
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gpt@660 { // General Purpose Timer
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compatible = "mpc5200b-gpt","mpc5200-gpt";
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device_type = "gpt";
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compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
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cell-index = <6>;
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reg = <660 10>;
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interrupts = <1 f 0>;
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@ -134,8 +127,7 @@
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};
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gpt@670 { // General Purpose Timer
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compatible = "mpc5200b-gpt","mpc5200-gpt";
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device_type = "gpt";
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compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
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cell-index = <7>;
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reg = <670 10>;
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interrupts = <1 10 0>;
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@ -145,6 +145,9 @@ static void __init lite5200_setup_arch(void)
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/* Some mpc5200 & mpc5200b related configuration */
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mpc5200_setup_xlb_arbiter();
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/* Map wdt for mpc52xx_restart() */
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mpc52xx_map_wdt();
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#ifdef CONFIG_PM
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mpc52xx_suspend.board_suspend_prepare = lite5200_suspend_prepare;
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mpc52xx_suspend.board_resume_finish = lite5200_resume_finish;
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@ -183,5 +186,6 @@ define_machine(lite5200) {
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.init = mpc52xx_declare_of_platform_devices,
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.init_IRQ = mpc52xx_init_irq,
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.get_irq = mpc52xx_get_irq,
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.restart = mpc52xx_restart,
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.calibrate_decr = generic_calibrate_decr,
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};
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@ -18,15 +18,20 @@
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#include <asm/prom.h>
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#include <asm/mpc52xx.h>
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/*
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* This variable is mapped in mpc52xx_map_wdt() and used in mpc52xx_restart().
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* Permanent mapping is required because mpc52xx_restart() can be called
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* from interrupt context while node mapping (which calls ioremap())
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* cannot be used at such point.
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*/
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static volatile struct mpc52xx_gpt *mpc52xx_wdt = NULL;
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void __iomem *
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mpc52xx_find_and_map(const char *compatible)
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static void __iomem *
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mpc52xx_map_node(struct device_node *ofn)
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{
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struct device_node *ofn;
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const u32 *regaddr_p;
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u64 regaddr64, size64;
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ofn = of_find_compatible_node(NULL, NULL, compatible);
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if (!ofn)
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return NULL;
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return ioremap((u32)regaddr64, (u32)size64);
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}
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void __iomem *
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mpc52xx_find_and_map(const char *compatible)
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{
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return mpc52xx_map_node(
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of_find_compatible_node(NULL, NULL, compatible));
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}
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EXPORT_SYMBOL(mpc52xx_find_and_map);
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void __iomem *
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mpc52xx_find_and_map_path(const char *path)
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{
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return mpc52xx_map_node(of_find_node_by_path(path));
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}
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EXPORT_SYMBOL(mpc52xx_find_and_map_path);
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/**
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* mpc52xx_find_ipb_freq - Find the IPB bus frequency for a device
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"Error while probing of_platform bus\n");
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}
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void __init
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mpc52xx_map_wdt(void)
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{
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const void *has_wdt;
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struct device_node *np;
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/* mpc52xx_wdt is mapped here and used in mpc52xx_restart,
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* possibly from a interrupt context. wdt is only implement
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* on a gpt0, so check has-wdt property before mapping.
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*/
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for_each_compatible_node(np, NULL, "fsl,mpc5200-gpt") {
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has_wdt = of_get_property(np, "fsl,has-wdt", NULL);
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if (has_wdt) {
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mpc52xx_wdt = mpc52xx_map_node(np);
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return;
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}
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}
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for_each_compatible_node(np, NULL, "mpc5200-gpt") {
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has_wdt = of_get_property(np, "has-wdt", NULL);
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if (has_wdt) {
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mpc52xx_wdt = mpc52xx_map_node(np);
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return;
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}
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}
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}
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void
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mpc52xx_restart(char *cmd)
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{
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local_irq_disable();
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/* Turn on the watchdog and wait for it to expire.
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* It effectively does a reset. */
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if (mpc52xx_wdt) {
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out_be32(&mpc52xx_wdt->mode, 0x00000000);
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out_be32(&mpc52xx_wdt->count, 0x000000ff);
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out_be32(&mpc52xx_wdt->mode, 0x00009004);
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} else
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printk("mpc52xx_restart: Can't access wdt. "
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"Restart impossible, system halted.\n");
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while (1);
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}
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@ -269,6 +269,7 @@ bcom_engine_init(void)
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int task;
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phys_addr_t tdt_pa, ctx_pa, var_pa, fdt_pa;
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unsigned int tdt_size, ctx_size, var_size, fdt_size;
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u16 regval;
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/* Allocate & clear SRAM zones for FDT, TDTs, contexts and vars/incs */
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tdt_size = BCOM_MAX_TASKS * sizeof(struct bcom_tdt);
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@ -319,9 +320,11 @@ bcom_engine_init(void)
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/* Init 'always' initiator */
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out_8(&bcom_eng->regs->ipr[BCOM_INITIATOR_ALWAYS], BCOM_IPR_ALWAYS);
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/* Disable COMM Bus Prefetch, apparently it's not reliable yet */
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/* FIXME: This should be done on 5200 and not 5200B ... */
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out_be16(&bcom_eng->regs->PtdCntrl, in_be16(&bcom_eng->regs->PtdCntrl) | 1);
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/* Disable COMM Bus Prefetch on the original 5200; it's broken */
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if ((mfspr(SPRN_SVR) & MPC5200_SVR_MASK) == MPC5200_SVR) {
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regval = in_be16(&bcom_eng->regs->PtdCntrl);
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out_be16(&bcom_eng->regs->PtdCntrl, regval | 1);
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}
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/* Init lock */
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spin_lock_init(&bcom_eng->lock);
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@ -175,6 +175,8 @@ static int mpc5200_wdt_probe(struct of_device *op, const struct of_device_id *ma
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int size;
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has_wdt = of_get_property(op->node, "has-wdt", NULL);
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if (!has_wdt)
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has_wdt = of_get_property(op->node, "fsl,has-wdt", NULL);
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if (!has_wdt)
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return -ENODEV;
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@ -254,6 +256,7 @@ static int mpc5200_wdt_shutdown(struct of_device *op)
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static struct of_device_id mpc5200_wdt_match[] = {
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{ .compatible = "mpc5200-gpt", },
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{ .compatible = "fsl,mpc5200-gpt", },
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{},
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};
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static struct of_platform_driver mpc5200_wdt_driver = {
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@ -20,6 +20,11 @@
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#include <linux/suspend.h>
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/* Variants of the 5200(B) */
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#define MPC5200_SVR 0x80110010
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#define MPC5200_SVR_MASK 0xfffffff0
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#define MPC5200B_SVR 0x80110020
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#define MPC5200B_SVR_MASK 0xfffffff0
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/* ======================================================================== */
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/* Structures mapping of some unit register set */
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@ -244,6 +249,7 @@ struct mpc52xx_cdm {
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#ifndef __ASSEMBLY__
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extern void __iomem * mpc52xx_find_and_map(const char *);
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extern void __iomem * mpc52xx_find_and_map_path(const char *path);
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extern unsigned int mpc52xx_find_ipb_freq(struct device_node *node);
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extern void mpc5200_setup_xlb_arbiter(void);
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extern void mpc52xx_declare_of_platform_devices(void);
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@ -253,6 +259,9 @@ extern unsigned int mpc52xx_get_irq(void);
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extern int __init mpc52xx_add_bridge(struct device_node *node);
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extern void __init mpc52xx_map_wdt(void);
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extern void mpc52xx_restart(char *cmd);
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#endif /* __ASSEMBLY__ */
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#ifdef CONFIG_PM
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