Merge branch 'fixes-for-arm-soc' of git://sources.calxeda.com/kernel/linux into fixes
* 'fixes-for-arm-soc' of git://sources.calxeda.com/kernel/linux: ARM: make BSYM macro assembly only ARM: highbank: remove incorrect BSYM usage ARM: imx: remove incorrect BSYM usage ARM: exynos: remove incorrect BSYM usage ARM: ux500: add missing ENDPROC to headsmp.S ARM: msm: Add missing ENDPROC to headsmp.S ARM: versatile: Add missing ENDPROC to headsmp.S
This commit is contained in:
Olof Johansson
Коммит
8b0f6d12de
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@ -37,8 +37,8 @@
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#define THUMB(x...) x
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#ifdef __ASSEMBLY__
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#define W(instr) instr.w
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#endif
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#define BSYM(sym) sym + 1
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#endif
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#else /* !CONFIG_THUMB2_KERNEL */
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@ -49,8 +49,8 @@
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#define THUMB(x...)
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#ifdef __ASSEMBLY__
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#define W(instr) instr
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#endif
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#define BSYM(sym) sym
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#endif
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#endif /* CONFIG_THUMB2_KERNEL */
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@ -36,6 +36,8 @@ pen: ldr r7, [r6]
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* should now contain the SVC stack for this core
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*/
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b secondary_startup
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ENDPROC(exynos4_secondary_startup)
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.align 2
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1: .long .
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.long pen_release
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@ -24,7 +24,6 @@
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#include <asm/cacheflush.h>
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#include <asm/hardware/gic.h>
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#include <asm/smp_scu.h>
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#include <asm/unified.h>
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#include <mach/hardware.h>
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#include <mach/regs-clock.h>
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@ -137,7 +136,7 @@ int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
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while (time_before(jiffies, timeout)) {
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smp_rmb();
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__raw_writel(BSYM(virt_to_phys(exynos4_secondary_startup)),
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__raw_writel(virt_to_phys(exynos4_secondary_startup),
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CPU1_BOOT_REG);
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gic_raise_softirq(cpumask_of(cpu), 1);
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@ -192,6 +191,6 @@ void __init platform_smp_prepare_cpus(unsigned int max_cpus)
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* until it receives a soft interrupt, and then the
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* secondary CPU branches to this address.
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*/
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__raw_writel(BSYM(virt_to_phys(exynos4_secondary_startup)),
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__raw_writel(virt_to_phys(exynos4_secondary_startup),
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CPU1_BOOT_REG);
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}
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@ -25,7 +25,6 @@
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#include <linux/smp.h>
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#include <asm/cacheflush.h>
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#include <asm/unified.h>
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#include <asm/smp_scu.h>
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#include <asm/hardware/arm_timer.h>
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#include <asm/hardware/timer-sp.h>
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@ -76,7 +75,7 @@ void highbank_set_cpu_jump(int cpu, void *jump_addr)
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#ifdef CONFIG_SMP
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cpu = cpu_logical_map(cpu);
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#endif
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writel(BSYM(virt_to_phys(jump_addr)), HB_JUMP_TABLE_VIRT(cpu));
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writel(virt_to_phys(jump_addr), HB_JUMP_TABLE_VIRT(cpu));
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__cpuc_flush_dcache_area(HB_JUMP_TABLE_VIRT(cpu), 16);
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outer_clean_range(HB_JUMP_TABLE_PHYS(cpu),
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HB_JUMP_TABLE_PHYS(cpu) + 15);
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@ -15,7 +15,6 @@
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <linux/smp.h>
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#include <asm/unified.h>
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#define SRC_SCR 0x000
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#define SRC_GPR1 0x020
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@ -43,7 +42,7 @@ void imx_enable_cpu(int cpu, bool enable)
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void imx_set_cpu_jump(int cpu, void *jump_addr)
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{
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cpu = cpu_logical_map(cpu);
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writel_relaxed(BSYM(virt_to_phys(jump_addr)),
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writel_relaxed(virt_to_phys(jump_addr),
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src_base + SRC_GPR1 + cpu * 8);
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}
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@ -34,6 +34,7 @@ pen: ldr r7, [r6]
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* should now contain the SVC stack for this core
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*/
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b secondary_startup
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ENDPROC(msm_secondary_startup)
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.align
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1: .long .
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@ -17,7 +17,6 @@
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#include <asm/hardware/gic.h>
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#include <asm/mach-types.h>
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#include <asm/smp_scu.h>
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#include <asm/unified.h>
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#include <mach/board-eb.h>
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#include <mach/board-pb11mp.h>
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@ -75,6 +74,6 @@ void __init platform_smp_prepare_cpus(unsigned int max_cpus)
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* until it receives a soft interrupt, and then the
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* secondary CPU branches to this address.
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*/
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__raw_writel(BSYM(virt_to_phys(versatile_secondary_startup)),
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__raw_writel(virt_to_phys(versatile_secondary_startup),
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__io_address(REALVIEW_SYS_FLAGSSET));
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}
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@ -32,6 +32,8 @@ pen: ldr r7, [r6]
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* should now contain the SVC stack for this core
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*/
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b secondary_startup
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ENDPROC(u8500_secondary_startup)
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.align 2
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1: .long .
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.long pen_release
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@ -13,8 +13,6 @@
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#include <linux/smp.h>
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#include <linux/io.h>
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#include <asm/unified.h>
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#include <mach/motherboard.h>
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#define V2M_PA_CS7 0x10000000
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@ -46,6 +44,6 @@ void __init platform_smp_prepare_cpus(unsigned int max_cpus)
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* secondary CPU branches to this address.
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*/
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writel(~0, MMIO_P2V(V2M_SYS_FLAGSCLR));
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writel(BSYM(virt_to_phys(versatile_secondary_startup)),
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writel(virt_to_phys(versatile_secondary_startup),
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MMIO_P2V(V2M_SYS_FLAGSSET));
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}
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@ -38,3 +38,4 @@ pen: ldr r7, [r6]
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.align
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1: .long .
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.long pen_release
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ENDPROC(versatile_secondary_startup)
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