Merge branch 'master' into next
This commit is contained in:
Коммит
8b4bfc7feb
|
@ -21,6 +21,8 @@ ffff8000 ffffffff copy_user_page / clear_user_page use.
|
|||
For SA11xx and Xscale, this is used to
|
||||
setup a minicache mapping.
|
||||
|
||||
ffff4000 ffffffff cache aliasing on ARMv6 and later CPUs.
|
||||
|
||||
ffff1000 ffff7fff Reserved.
|
||||
Platforms must not use this address range.
|
||||
|
||||
|
|
|
@ -139,6 +139,7 @@ Code Seq# Include File Comments
|
|||
'm' all linux/synclink.h conflict!
|
||||
'm' 00-1F net/irda/irmod.h conflict!
|
||||
'n' 00-7F linux/ncp_fs.h
|
||||
'n' 80-8F linux/nilfs2_fs.h NILFS2
|
||||
'n' E0-FF video/matrox.h matroxfb
|
||||
'o' 00-1F fs/ocfs2/ocfs2_fs.h OCFS2
|
||||
'o' 00-03 include/mtd/ubi-user.h conflict! (OCFS2 and UBI overlaps)
|
||||
|
|
|
@ -30,9 +30,9 @@ State
|
|||
The validator tracks lock-class usage history into 4n + 1 separate state bits:
|
||||
|
||||
- 'ever held in STATE context'
|
||||
- 'ever head as readlock in STATE context'
|
||||
- 'ever head with STATE enabled'
|
||||
- 'ever head as readlock with STATE enabled'
|
||||
- 'ever held as readlock in STATE context'
|
||||
- 'ever held with STATE enabled'
|
||||
- 'ever held as readlock with STATE enabled'
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||||
|
||||
Where STATE can be either one of (kernel/lockdep_states.h)
|
||||
- hardirq
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||||
|
|
|
@ -29,7 +29,6 @@ unsigned int __machine_arch_type;
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|||
|
||||
static void putstr(const char *ptr);
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||||
|
||||
#include <linux/compiler.h>
|
||||
#include <mach/uncompress.h>
|
||||
|
||||
#ifdef CONFIG_DEBUG_ICEDCC
|
||||
|
|
|
@ -17,6 +17,7 @@
|
|||
#include <linux/err.h>
|
||||
#include <linux/string.h>
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||||
#include <linux/mutex.h>
|
||||
#include <linux/clk.h>
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||||
|
||||
#include <asm/clkdev.h>
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||||
#include <mach/clkdev.h>
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||||
|
|
|
@ -1,15 +1,15 @@
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|||
#
|
||||
# Automatically generated make config: don't edit
|
||||
# Linux kernel version: 2.6.30-rc1
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||||
# Wed Apr 8 10:18:06 2009
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||||
# Linux kernel version: 2.6.31-rc4
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||||
# Fri Jul 24 16:08:06 2009
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||||
#
|
||||
CONFIG_ARM=y
|
||||
CONFIG_HAVE_PWM=y
|
||||
CONFIG_SYS_SUPPORTS_APM_EMULATION=y
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||||
CONFIG_GENERIC_GPIO=y
|
||||
CONFIG_GENERIC_TIME=y
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||||
CONFIG_GENERIC_CLOCKEVENTS=y
|
||||
CONFIG_MMU=y
|
||||
# CONFIG_NO_IOPORT is not set
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||||
CONFIG_GENERIC_HARDIRQS=y
|
||||
CONFIG_STACKTRACE_SUPPORT=y
|
||||
CONFIG_HAVE_LATENCYTOP_SUPPORT=y
|
||||
|
@ -18,14 +18,13 @@ CONFIG_TRACE_IRQFLAGS_SUPPORT=y
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|||
CONFIG_HARDIRQS_SW_RESEND=y
|
||||
CONFIG_GENERIC_IRQ_PROBE=y
|
||||
CONFIG_RWSEM_GENERIC_SPINLOCK=y
|
||||
# CONFIG_ARCH_HAS_ILOG2_U32 is not set
|
||||
# CONFIG_ARCH_HAS_ILOG2_U64 is not set
|
||||
CONFIG_GENERIC_HWEIGHT=y
|
||||
CONFIG_GENERIC_CALIBRATE_DELAY=y
|
||||
CONFIG_ARCH_MTD_XIP=y
|
||||
CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
|
||||
CONFIG_VECTORS_BASE=0xffff0000
|
||||
CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
|
||||
CONFIG_CONSTRUCTORS=y
|
||||
|
||||
#
|
||||
# General setup
|
||||
|
@ -85,7 +84,12 @@ CONFIG_TIMERFD=y
|
|||
CONFIG_EVENTFD=y
|
||||
CONFIG_SHMEM=y
|
||||
CONFIG_AIO=y
|
||||
|
||||
#
|
||||
# Performance Counters
|
||||
#
|
||||
CONFIG_VM_EVENT_COUNTERS=y
|
||||
# CONFIG_STRIP_ASM_SYMS is not set
|
||||
# CONFIG_COMPAT_BRK is not set
|
||||
CONFIG_SLAB=y
|
||||
# CONFIG_SLUB is not set
|
||||
|
@ -99,6 +103,12 @@ CONFIG_KPROBES=y
|
|||
CONFIG_KRETPROBES=y
|
||||
CONFIG_HAVE_KPROBES=y
|
||||
CONFIG_HAVE_KRETPROBES=y
|
||||
CONFIG_HAVE_CLK=y
|
||||
|
||||
#
|
||||
# GCOV-based kernel profiling
|
||||
#
|
||||
# CONFIG_GCOV_KERNEL is not set
|
||||
# CONFIG_SLOW_WORK is not set
|
||||
CONFIG_HAVE_GENERIC_DMA_COHERENT=y
|
||||
CONFIG_SLABINFO=y
|
||||
|
@ -111,7 +121,7 @@ CONFIG_MODULE_UNLOAD=y
|
|||
# CONFIG_MODVERSIONS is not set
|
||||
# CONFIG_MODULE_SRCVERSION_ALL is not set
|
||||
CONFIG_BLOCK=y
|
||||
# CONFIG_LBD is not set
|
||||
CONFIG_LBDAF=y
|
||||
# CONFIG_BLK_DEV_BSG is not set
|
||||
# CONFIG_BLK_DEV_INTEGRITY is not set
|
||||
|
||||
|
@ -138,13 +148,14 @@ CONFIG_FREEZER=y
|
|||
# CONFIG_ARCH_VERSATILE is not set
|
||||
# CONFIG_ARCH_AT91 is not set
|
||||
# CONFIG_ARCH_CLPS711X is not set
|
||||
# CONFIG_ARCH_GEMINI is not set
|
||||
# CONFIG_ARCH_EBSA110 is not set
|
||||
# CONFIG_ARCH_EP93XX is not set
|
||||
# CONFIG_ARCH_GEMINI is not set
|
||||
# CONFIG_ARCH_FOOTBRIDGE is not set
|
||||
CONFIG_ARCH_MXC=y
|
||||
# CONFIG_ARCH_STMP3XXX is not set
|
||||
# CONFIG_ARCH_NETX is not set
|
||||
# CONFIG_ARCH_H720X is not set
|
||||
# CONFIG_ARCH_IMX is not set
|
||||
# CONFIG_ARCH_IOP13XX is not set
|
||||
# CONFIG_ARCH_IOP32X is not set
|
||||
# CONFIG_ARCH_IOP33X is not set
|
||||
|
@ -153,25 +164,25 @@ CONFIG_FREEZER=y
|
|||
# CONFIG_ARCH_IXP4XX is not set
|
||||
# CONFIG_ARCH_L7200 is not set
|
||||
# CONFIG_ARCH_KIRKWOOD is not set
|
||||
# CONFIG_ARCH_KS8695 is not set
|
||||
# CONFIG_ARCH_NS9XXX is not set
|
||||
# CONFIG_ARCH_LOKI is not set
|
||||
# CONFIG_ARCH_MV78XX0 is not set
|
||||
CONFIG_ARCH_MXC=y
|
||||
# CONFIG_ARCH_ORION5X is not set
|
||||
# CONFIG_ARCH_MMP is not set
|
||||
# CONFIG_ARCH_KS8695 is not set
|
||||
# CONFIG_ARCH_NS9XXX is not set
|
||||
# CONFIG_ARCH_W90X900 is not set
|
||||
# CONFIG_ARCH_PNX4008 is not set
|
||||
# CONFIG_ARCH_PXA is not set
|
||||
# CONFIG_ARCH_MMP is not set
|
||||
# CONFIG_ARCH_MSM is not set
|
||||
# CONFIG_ARCH_RPC is not set
|
||||
# CONFIG_ARCH_SA1100 is not set
|
||||
# CONFIG_ARCH_S3C2410 is not set
|
||||
# CONFIG_ARCH_S3C64XX is not set
|
||||
# CONFIG_ARCH_SHARK is not set
|
||||
# CONFIG_ARCH_LH7A40X is not set
|
||||
# CONFIG_ARCH_U300 is not set
|
||||
# CONFIG_ARCH_DAVINCI is not set
|
||||
# CONFIG_ARCH_OMAP is not set
|
||||
# CONFIG_ARCH_MSM is not set
|
||||
# CONFIG_ARCH_W90X900 is not set
|
||||
|
||||
#
|
||||
# Freescale MXC Implementations
|
||||
|
@ -188,6 +199,8 @@ CONFIG_MACH_MX27=y
|
|||
CONFIG_MACH_MX27ADS=y
|
||||
CONFIG_MACH_PCM038=y
|
||||
CONFIG_MACH_PCM970_BASEBOARD=y
|
||||
CONFIG_MACH_MX27_3DS=y
|
||||
CONFIG_MACH_MX27LITE=y
|
||||
CONFIG_MXC_IRQ_PRIOR=y
|
||||
CONFIG_MXC_PWM=y
|
||||
|
||||
|
@ -213,7 +226,6 @@ CONFIG_ARM_THUMB=y
|
|||
# CONFIG_CPU_DCACHE_DISABLE is not set
|
||||
# CONFIG_CPU_DCACHE_WRITETHROUGH is not set
|
||||
# CONFIG_CPU_CACHE_ROUND_ROBIN is not set
|
||||
# CONFIG_OUTER_CACHE is not set
|
||||
CONFIG_COMMON_CLKDEV=y
|
||||
|
||||
#
|
||||
|
@ -238,7 +250,6 @@ CONFIG_PREEMPT=y
|
|||
CONFIG_HZ=100
|
||||
CONFIG_AEABI=y
|
||||
CONFIG_OABI_COMPAT=y
|
||||
CONFIG_ARCH_FLATMEM_HAS_HOLES=y
|
||||
# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
|
||||
# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
|
||||
# CONFIG_HIGHMEM is not set
|
||||
|
@ -253,10 +264,11 @@ CONFIG_SPLIT_PTLOCK_CPUS=4096
|
|||
# CONFIG_PHYS_ADDR_T_64BIT is not set
|
||||
CONFIG_ZONE_DMA_FLAG=0
|
||||
CONFIG_VIRT_TO_BUS=y
|
||||
CONFIG_UNEVICTABLE_LRU=y
|
||||
CONFIG_HAVE_MLOCK=y
|
||||
CONFIG_HAVE_MLOCKED_PAGE_BIT=y
|
||||
CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
|
||||
CONFIG_ALIGNMENT_TRAP=y
|
||||
# CONFIG_UACCESS_WITH_MEMCPY is not set
|
||||
|
||||
#
|
||||
# Boot options
|
||||
|
@ -361,6 +373,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
|
|||
# CONFIG_ECONET is not set
|
||||
# CONFIG_WAN_ROUTER is not set
|
||||
# CONFIG_PHONET is not set
|
||||
# CONFIG_IEEE802154 is not set
|
||||
# CONFIG_NET_SCHED is not set
|
||||
# CONFIG_DCB is not set
|
||||
|
||||
|
@ -474,7 +487,16 @@ CONFIG_MTD_PHYSMAP=y
|
|||
# CONFIG_MTD_DOC2000 is not set
|
||||
# CONFIG_MTD_DOC2001 is not set
|
||||
# CONFIG_MTD_DOC2001PLUS is not set
|
||||
# CONFIG_MTD_NAND is not set
|
||||
CONFIG_MTD_NAND=y
|
||||
# CONFIG_MTD_NAND_VERIFY_WRITE is not set
|
||||
# CONFIG_MTD_NAND_ECC_SMC is not set
|
||||
# CONFIG_MTD_NAND_MUSEUM_IDS is not set
|
||||
# CONFIG_MTD_NAND_GPIO is not set
|
||||
CONFIG_MTD_NAND_IDS=y
|
||||
# CONFIG_MTD_NAND_DISKONCHIP is not set
|
||||
# CONFIG_MTD_NAND_NANDSIM is not set
|
||||
# CONFIG_MTD_NAND_PLATFORM is not set
|
||||
CONFIG_MTD_NAND_MXC=y
|
||||
# CONFIG_MTD_ONENAND is not set
|
||||
|
||||
#
|
||||
|
@ -485,7 +507,15 @@ CONFIG_MTD_PHYSMAP=y
|
|||
#
|
||||
# UBI - Unsorted block images
|
||||
#
|
||||
# CONFIG_MTD_UBI is not set
|
||||
CONFIG_MTD_UBI=y
|
||||
CONFIG_MTD_UBI_WL_THRESHOLD=4096
|
||||
CONFIG_MTD_UBI_BEB_RESERVE=1
|
||||
# CONFIG_MTD_UBI_GLUEBI is not set
|
||||
|
||||
#
|
||||
# UBI debugging options
|
||||
#
|
||||
# CONFIG_MTD_UBI_DEBUG is not set
|
||||
# CONFIG_PARPORT is not set
|
||||
CONFIG_BLK_DEV=y
|
||||
# CONFIG_BLK_DEV_COW_COMMON is not set
|
||||
|
@ -494,7 +524,21 @@ CONFIG_BLK_DEV=y
|
|||
# CONFIG_BLK_DEV_RAM is not set
|
||||
# CONFIG_CDROM_PKTCDVD is not set
|
||||
# CONFIG_ATA_OVER_ETH is not set
|
||||
# CONFIG_MISC_DEVICES is not set
|
||||
# CONFIG_MG_DISK is not set
|
||||
CONFIG_MISC_DEVICES=y
|
||||
# CONFIG_ICS932S401 is not set
|
||||
# CONFIG_ENCLOSURE_SERVICES is not set
|
||||
# CONFIG_ISL29003 is not set
|
||||
# CONFIG_C2PORT is not set
|
||||
|
||||
#
|
||||
# EEPROM support
|
||||
#
|
||||
CONFIG_EEPROM_AT24=y
|
||||
# CONFIG_EEPROM_AT25 is not set
|
||||
# CONFIG_EEPROM_LEGACY is not set
|
||||
# CONFIG_EEPROM_MAX6875 is not set
|
||||
# CONFIG_EEPROM_93CX6 is not set
|
||||
CONFIG_HAVE_IDE=y
|
||||
# CONFIG_IDE is not set
|
||||
|
||||
|
@ -508,7 +552,6 @@ CONFIG_HAVE_IDE=y
|
|||
# CONFIG_ATA is not set
|
||||
# CONFIG_MD is not set
|
||||
CONFIG_NETDEVICES=y
|
||||
CONFIG_COMPAT_NET_DEV_OPS=y
|
||||
# CONFIG_DUMMY is not set
|
||||
# CONFIG_BONDING is not set
|
||||
# CONFIG_MACVLAN is not set
|
||||
|
@ -534,6 +577,8 @@ CONFIG_NET_ETHERNET=y
|
|||
# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
|
||||
# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
|
||||
# CONFIG_B44 is not set
|
||||
# CONFIG_KS8842 is not set
|
||||
# CONFIG_KS8851 is not set
|
||||
CONFIG_FEC=y
|
||||
# CONFIG_FEC2 is not set
|
||||
# CONFIG_NETDEV_1000 is not set
|
||||
|
@ -580,6 +625,11 @@ CONFIG_INPUT_EVDEV=y
|
|||
# CONFIG_INPUT_TABLET is not set
|
||||
CONFIG_INPUT_TOUCHSCREEN=y
|
||||
# CONFIG_TOUCHSCREEN_ADS7846 is not set
|
||||
# CONFIG_TOUCHSCREEN_AD7877 is not set
|
||||
# CONFIG_TOUCHSCREEN_AD7879_I2C is not set
|
||||
# CONFIG_TOUCHSCREEN_AD7879_SPI is not set
|
||||
# CONFIG_TOUCHSCREEN_AD7879 is not set
|
||||
# CONFIG_TOUCHSCREEN_EETI is not set
|
||||
# CONFIG_TOUCHSCREEN_FUJITSU is not set
|
||||
# CONFIG_TOUCHSCREEN_GUNZE is not set
|
||||
# CONFIG_TOUCHSCREEN_ELO is not set
|
||||
|
@ -592,6 +642,7 @@ CONFIG_INPUT_TOUCHSCREEN=y
|
|||
# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
|
||||
# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set
|
||||
# CONFIG_TOUCHSCREEN_TSC2007 is not set
|
||||
# CONFIG_TOUCHSCREEN_W90X900 is not set
|
||||
# CONFIG_INPUT_MISC is not set
|
||||
|
||||
#
|
||||
|
@ -644,6 +695,7 @@ CONFIG_I2C_HELPER_AUTO=y
|
|||
#
|
||||
# I2C system bus drivers (mostly embedded / system-on-chip)
|
||||
#
|
||||
# CONFIG_I2C_DESIGNWARE is not set
|
||||
# CONFIG_I2C_GPIO is not set
|
||||
CONFIG_I2C_IMX=y
|
||||
# CONFIG_I2C_OCORES is not set
|
||||
|
@ -668,7 +720,6 @@ CONFIG_I2C_IMX=y
|
|||
# CONFIG_SENSORS_PCF8574 is not set
|
||||
# CONFIG_PCF8575 is not set
|
||||
# CONFIG_SENSORS_PCA9539 is not set
|
||||
# CONFIG_SENSORS_MAX6875 is not set
|
||||
# CONFIG_SENSORS_TSL2550 is not set
|
||||
# CONFIG_I2C_DEBUG_CORE is not set
|
||||
# CONFIG_I2C_DEBUG_ALGO is not set
|
||||
|
@ -719,6 +770,7 @@ CONFIG_W1=y
|
|||
#
|
||||
# CONFIG_W1_MASTER_DS2482 is not set
|
||||
CONFIG_W1_MASTER_MXC=y
|
||||
# CONFIG_W1_MASTER_DS1WM is not set
|
||||
# CONFIG_W1_MASTER_GPIO is not set
|
||||
|
||||
#
|
||||
|
@ -753,54 +805,16 @@ CONFIG_SSB_POSSIBLE=y
|
|||
# CONFIG_TPS65010 is not set
|
||||
# CONFIG_TWL4030_CORE is not set
|
||||
# CONFIG_MFD_TMIO is not set
|
||||
# CONFIG_MFD_T7L66XB is not set
|
||||
# CONFIG_MFD_TC6387XB is not set
|
||||
# CONFIG_MFD_TC6393XB is not set
|
||||
# CONFIG_PMIC_DA903X is not set
|
||||
# CONFIG_MFD_WM8400 is not set
|
||||
# CONFIG_MFD_WM8350_I2C is not set
|
||||
# CONFIG_MFD_PCF50633 is not set
|
||||
|
||||
#
|
||||
# Multimedia devices
|
||||
#
|
||||
|
||||
#
|
||||
# Multimedia core support
|
||||
#
|
||||
CONFIG_VIDEO_DEV=y
|
||||
CONFIG_VIDEO_V4L2_COMMON=y
|
||||
CONFIG_VIDEO_ALLOW_V4L1=y
|
||||
CONFIG_VIDEO_V4L1_COMPAT=y
|
||||
# CONFIG_DVB_CORE is not set
|
||||
CONFIG_VIDEO_MEDIA=y
|
||||
|
||||
#
|
||||
# Multimedia drivers
|
||||
#
|
||||
# CONFIG_MEDIA_ATTACH is not set
|
||||
CONFIG_MEDIA_TUNER=y
|
||||
# CONFIG_MEDIA_TUNER_CUSTOMISE is not set
|
||||
CONFIG_MEDIA_TUNER_SIMPLE=y
|
||||
CONFIG_MEDIA_TUNER_TDA8290=y
|
||||
CONFIG_MEDIA_TUNER_TDA9887=y
|
||||
CONFIG_MEDIA_TUNER_TEA5761=y
|
||||
CONFIG_MEDIA_TUNER_TEA5767=y
|
||||
CONFIG_MEDIA_TUNER_MT20XX=y
|
||||
CONFIG_MEDIA_TUNER_XC2028=y
|
||||
CONFIG_MEDIA_TUNER_XC5000=y
|
||||
CONFIG_MEDIA_TUNER_MC44S803=y
|
||||
CONFIG_VIDEO_V4L2=y
|
||||
CONFIG_VIDEO_V4L1=y
|
||||
CONFIG_VIDEO_CAPTURE_DRIVERS=y
|
||||
# CONFIG_VIDEO_ADV_DEBUG is not set
|
||||
# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set
|
||||
CONFIG_VIDEO_HELPER_CHIPS_AUTO=y
|
||||
# CONFIG_VIDEO_VIVI is not set
|
||||
# CONFIG_VIDEO_CPIA is not set
|
||||
# CONFIG_VIDEO_SAA5246A is not set
|
||||
# CONFIG_VIDEO_SAA5249 is not set
|
||||
# CONFIG_SOC_CAMERA is not set
|
||||
# CONFIG_RADIO_ADAPTERS is not set
|
||||
# CONFIG_DAB is not set
|
||||
# CONFIG_AB3100_CORE is not set
|
||||
# CONFIG_EZX_PCAP is not set
|
||||
# CONFIG_MEDIA_SUPPORT is not set
|
||||
|
||||
#
|
||||
# Graphics support
|
||||
|
@ -917,6 +931,7 @@ CONFIG_RTC_DRV_PCF8563=y
|
|||
# CONFIG_RTC_DRV_S35390A is not set
|
||||
# CONFIG_RTC_DRV_FM3130 is not set
|
||||
# CONFIG_RTC_DRV_RX8581 is not set
|
||||
# CONFIG_RTC_DRV_RX8025 is not set
|
||||
|
||||
#
|
||||
# SPI RTC drivers
|
||||
|
@ -962,12 +977,15 @@ CONFIG_RTC_DRV_PCF8563=y
|
|||
# CONFIG_REISERFS_FS is not set
|
||||
# CONFIG_JFS_FS is not set
|
||||
# CONFIG_FS_POSIX_ACL is not set
|
||||
CONFIG_FILE_LOCKING=y
|
||||
# CONFIG_XFS_FS is not set
|
||||
# CONFIG_GFS2_FS is not set
|
||||
# CONFIG_OCFS2_FS is not set
|
||||
# CONFIG_BTRFS_FS is not set
|
||||
CONFIG_FILE_LOCKING=y
|
||||
CONFIG_FSNOTIFY=y
|
||||
# CONFIG_DNOTIFY is not set
|
||||
# CONFIG_INOTIFY is not set
|
||||
CONFIG_INOTIFY_USER=y
|
||||
# CONFIG_QUOTA is not set
|
||||
# CONFIG_AUTOFS_FS is not set
|
||||
# CONFIG_AUTOFS4_FS is not set
|
||||
|
@ -1021,6 +1039,12 @@ CONFIG_JFFS2_ZLIB=y
|
|||
# CONFIG_JFFS2_LZO is not set
|
||||
CONFIG_JFFS2_RTIME=y
|
||||
# CONFIG_JFFS2_RUBIN is not set
|
||||
CONFIG_UBIFS_FS=y
|
||||
# CONFIG_UBIFS_FS_XATTR is not set
|
||||
# CONFIG_UBIFS_FS_ADVANCED_COMPR is not set
|
||||
CONFIG_UBIFS_FS_LZO=y
|
||||
CONFIG_UBIFS_FS_ZLIB=y
|
||||
# CONFIG_UBIFS_FS_DEBUG is not set
|
||||
# CONFIG_CRAMFS is not set
|
||||
# CONFIG_SQUASHFS is not set
|
||||
# CONFIG_VXFS_FS is not set
|
||||
|
@ -1119,25 +1143,11 @@ CONFIG_SYSCTL_SYSCALL_CHECK=y
|
|||
CONFIG_NOP_TRACER=y
|
||||
CONFIG_HAVE_FUNCTION_TRACER=y
|
||||
CONFIG_RING_BUFFER=y
|
||||
CONFIG_EVENT_TRACING=y
|
||||
CONFIG_CONTEXT_SWITCH_TRACER=y
|
||||
CONFIG_TRACING=y
|
||||
CONFIG_TRACING_SUPPORT=y
|
||||
|
||||
#
|
||||
# Tracers
|
||||
#
|
||||
# CONFIG_FUNCTION_TRACER is not set
|
||||
# CONFIG_IRQSOFF_TRACER is not set
|
||||
# CONFIG_PREEMPT_TRACER is not set
|
||||
# CONFIG_SCHED_TRACER is not set
|
||||
# CONFIG_CONTEXT_SWITCH_TRACER is not set
|
||||
# CONFIG_EVENT_TRACER is not set
|
||||
# CONFIG_BOOT_TRACER is not set
|
||||
# CONFIG_TRACE_BRANCH_PROFILING is not set
|
||||
# CONFIG_STACK_TRACER is not set
|
||||
# CONFIG_KMEMTRACE is not set
|
||||
# CONFIG_WORKQUEUE_TRACER is not set
|
||||
# CONFIG_BLK_DEV_IO_TRACE is not set
|
||||
# CONFIG_FTRACE_STARTUP_TEST is not set
|
||||
# CONFIG_FTRACE is not set
|
||||
# CONFIG_DYNAMIC_DEBUG is not set
|
||||
# CONFIG_SAMPLES is not set
|
||||
CONFIG_HAVE_ARCH_KGDB=y
|
||||
|
@ -1151,16 +1161,104 @@ CONFIG_ARM_UNWIND=y
|
|||
# CONFIG_SECURITY is not set
|
||||
# CONFIG_SECURITYFS is not set
|
||||
# CONFIG_SECURITY_FILE_CAPABILITIES is not set
|
||||
# CONFIG_CRYPTO is not set
|
||||
CONFIG_CRYPTO=y
|
||||
|
||||
#
|
||||
# Crypto core or helper
|
||||
#
|
||||
# CONFIG_CRYPTO_FIPS is not set
|
||||
CONFIG_CRYPTO_ALGAPI=y
|
||||
CONFIG_CRYPTO_ALGAPI2=y
|
||||
# CONFIG_CRYPTO_MANAGER is not set
|
||||
# CONFIG_CRYPTO_MANAGER2 is not set
|
||||
# CONFIG_CRYPTO_GF128MUL is not set
|
||||
# CONFIG_CRYPTO_NULL is not set
|
||||
# CONFIG_CRYPTO_CRYPTD is not set
|
||||
# CONFIG_CRYPTO_AUTHENC is not set
|
||||
# CONFIG_CRYPTO_TEST is not set
|
||||
|
||||
#
|
||||
# Authenticated Encryption with Associated Data
|
||||
#
|
||||
# CONFIG_CRYPTO_CCM is not set
|
||||
# CONFIG_CRYPTO_GCM is not set
|
||||
# CONFIG_CRYPTO_SEQIV is not set
|
||||
|
||||
#
|
||||
# Block modes
|
||||
#
|
||||
# CONFIG_CRYPTO_CBC is not set
|
||||
# CONFIG_CRYPTO_CTR is not set
|
||||
# CONFIG_CRYPTO_CTS is not set
|
||||
# CONFIG_CRYPTO_ECB is not set
|
||||
# CONFIG_CRYPTO_LRW is not set
|
||||
# CONFIG_CRYPTO_PCBC is not set
|
||||
# CONFIG_CRYPTO_XTS is not set
|
||||
|
||||
#
|
||||
# Hash modes
|
||||
#
|
||||
# CONFIG_CRYPTO_HMAC is not set
|
||||
# CONFIG_CRYPTO_XCBC is not set
|
||||
|
||||
#
|
||||
# Digest
|
||||
#
|
||||
# CONFIG_CRYPTO_CRC32C is not set
|
||||
# CONFIG_CRYPTO_MD4 is not set
|
||||
# CONFIG_CRYPTO_MD5 is not set
|
||||
# CONFIG_CRYPTO_MICHAEL_MIC is not set
|
||||
# CONFIG_CRYPTO_RMD128 is not set
|
||||
# CONFIG_CRYPTO_RMD160 is not set
|
||||
# CONFIG_CRYPTO_RMD256 is not set
|
||||
# CONFIG_CRYPTO_RMD320 is not set
|
||||
# CONFIG_CRYPTO_SHA1 is not set
|
||||
# CONFIG_CRYPTO_SHA256 is not set
|
||||
# CONFIG_CRYPTO_SHA512 is not set
|
||||
# CONFIG_CRYPTO_TGR192 is not set
|
||||
# CONFIG_CRYPTO_WP512 is not set
|
||||
|
||||
#
|
||||
# Ciphers
|
||||
#
|
||||
# CONFIG_CRYPTO_AES is not set
|
||||
# CONFIG_CRYPTO_ANUBIS is not set
|
||||
# CONFIG_CRYPTO_ARC4 is not set
|
||||
# CONFIG_CRYPTO_BLOWFISH is not set
|
||||
# CONFIG_CRYPTO_CAMELLIA is not set
|
||||
# CONFIG_CRYPTO_CAST5 is not set
|
||||
# CONFIG_CRYPTO_CAST6 is not set
|
||||
# CONFIG_CRYPTO_DES is not set
|
||||
# CONFIG_CRYPTO_FCRYPT is not set
|
||||
# CONFIG_CRYPTO_KHAZAD is not set
|
||||
# CONFIG_CRYPTO_SALSA20 is not set
|
||||
# CONFIG_CRYPTO_SEED is not set
|
||||
# CONFIG_CRYPTO_SERPENT is not set
|
||||
# CONFIG_CRYPTO_TEA is not set
|
||||
# CONFIG_CRYPTO_TWOFISH is not set
|
||||
|
||||
#
|
||||
# Compression
|
||||
#
|
||||
CONFIG_CRYPTO_DEFLATE=y
|
||||
# CONFIG_CRYPTO_ZLIB is not set
|
||||
CONFIG_CRYPTO_LZO=y
|
||||
|
||||
#
|
||||
# Random Number Generation
|
||||
#
|
||||
# CONFIG_CRYPTO_ANSI_CPRNG is not set
|
||||
CONFIG_CRYPTO_HW=y
|
||||
CONFIG_BINARY_PRINTF=y
|
||||
|
||||
#
|
||||
# Library routines
|
||||
#
|
||||
CONFIG_BITREVERSE=y
|
||||
CONFIG_RATIONAL=y
|
||||
CONFIG_GENERIC_FIND_LAST_BIT=y
|
||||
# CONFIG_CRC_CCITT is not set
|
||||
# CONFIG_CRC16 is not set
|
||||
CONFIG_CRC16=y
|
||||
# CONFIG_CRC_T10DIF is not set
|
||||
# CONFIG_CRC_ITU_T is not set
|
||||
CONFIG_CRC32=y
|
||||
|
@ -1168,6 +1266,8 @@ CONFIG_CRC32=y
|
|||
# CONFIG_LIBCRC32C is not set
|
||||
CONFIG_ZLIB_INFLATE=y
|
||||
CONFIG_ZLIB_DEFLATE=y
|
||||
CONFIG_LZO_COMPRESS=y
|
||||
CONFIG_LZO_DECOMPRESS=y
|
||||
CONFIG_HAS_IOMEM=y
|
||||
CONFIG_HAS_IOPORT=y
|
||||
CONFIG_HAS_DMA=y
|
||||
|
|
|
@ -1,15 +1,15 @@
|
|||
#
|
||||
# Automatically generated make config: don't edit
|
||||
# Linux kernel version: 2.6.30-rc1
|
||||
# Wed Apr 8 11:06:37 2009
|
||||
# Linux kernel version: 2.6.31-rc4
|
||||
# Tue Jul 28 14:11:34 2009
|
||||
#
|
||||
CONFIG_ARM=y
|
||||
CONFIG_HAVE_PWM=y
|
||||
CONFIG_SYS_SUPPORTS_APM_EMULATION=y
|
||||
CONFIG_GENERIC_GPIO=y
|
||||
CONFIG_GENERIC_TIME=y
|
||||
CONFIG_GENERIC_CLOCKEVENTS=y
|
||||
CONFIG_MMU=y
|
||||
# CONFIG_NO_IOPORT is not set
|
||||
CONFIG_GENERIC_HARDIRQS=y
|
||||
CONFIG_STACKTRACE_SUPPORT=y
|
||||
CONFIG_HAVE_LATENCYTOP_SUPPORT=y
|
||||
|
@ -18,14 +18,13 @@ CONFIG_TRACE_IRQFLAGS_SUPPORT=y
|
|||
CONFIG_HARDIRQS_SW_RESEND=y
|
||||
CONFIG_GENERIC_IRQ_PROBE=y
|
||||
CONFIG_RWSEM_GENERIC_SPINLOCK=y
|
||||
# CONFIG_ARCH_HAS_ILOG2_U32 is not set
|
||||
# CONFIG_ARCH_HAS_ILOG2_U64 is not set
|
||||
CONFIG_GENERIC_HWEIGHT=y
|
||||
CONFIG_GENERIC_CALIBRATE_DELAY=y
|
||||
CONFIG_ARCH_MTD_XIP=y
|
||||
CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
|
||||
CONFIG_VECTORS_BASE=0xffff0000
|
||||
CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
|
||||
CONFIG_CONSTRUCTORS=y
|
||||
|
||||
#
|
||||
# General setup
|
||||
|
@ -86,7 +85,12 @@ CONFIG_TIMERFD=y
|
|||
CONFIG_EVENTFD=y
|
||||
CONFIG_SHMEM=y
|
||||
CONFIG_AIO=y
|
||||
|
||||
#
|
||||
# Performance Counters
|
||||
#
|
||||
CONFIG_VM_EVENT_COUNTERS=y
|
||||
# CONFIG_STRIP_ASM_SYMS is not set
|
||||
CONFIG_COMPAT_BRK=y
|
||||
CONFIG_SLAB=y
|
||||
# CONFIG_SLUB is not set
|
||||
|
@ -97,6 +101,11 @@ CONFIG_HAVE_OPROFILE=y
|
|||
# CONFIG_KPROBES is not set
|
||||
CONFIG_HAVE_KPROBES=y
|
||||
CONFIG_HAVE_KRETPROBES=y
|
||||
CONFIG_HAVE_CLK=y
|
||||
|
||||
#
|
||||
# GCOV-based kernel profiling
|
||||
#
|
||||
# CONFIG_SLOW_WORK is not set
|
||||
CONFIG_HAVE_GENERIC_DMA_COHERENT=y
|
||||
CONFIG_SLABINFO=y
|
||||
|
@ -109,7 +118,7 @@ CONFIG_MODULE_FORCE_UNLOAD=y
|
|||
CONFIG_MODVERSIONS=y
|
||||
# CONFIG_MODULE_SRCVERSION_ALL is not set
|
||||
CONFIG_BLOCK=y
|
||||
# CONFIG_LBD is not set
|
||||
CONFIG_LBDAF=y
|
||||
# CONFIG_BLK_DEV_BSG is not set
|
||||
# CONFIG_BLK_DEV_INTEGRITY is not set
|
||||
|
||||
|
@ -136,13 +145,14 @@ CONFIG_FREEZER=y
|
|||
# CONFIG_ARCH_VERSATILE is not set
|
||||
# CONFIG_ARCH_AT91 is not set
|
||||
# CONFIG_ARCH_CLPS711X is not set
|
||||
# CONFIG_ARCH_GEMINI is not set
|
||||
# CONFIG_ARCH_EBSA110 is not set
|
||||
# CONFIG_ARCH_EP93XX is not set
|
||||
# CONFIG_ARCH_GEMINI is not set
|
||||
# CONFIG_ARCH_FOOTBRIDGE is not set
|
||||
CONFIG_ARCH_MXC=y
|
||||
# CONFIG_ARCH_STMP3XXX is not set
|
||||
# CONFIG_ARCH_NETX is not set
|
||||
# CONFIG_ARCH_H720X is not set
|
||||
# CONFIG_ARCH_IMX is not set
|
||||
# CONFIG_ARCH_IOP13XX is not set
|
||||
# CONFIG_ARCH_IOP32X is not set
|
||||
# CONFIG_ARCH_IOP33X is not set
|
||||
|
@ -151,25 +161,25 @@ CONFIG_FREEZER=y
|
|||
# CONFIG_ARCH_IXP4XX is not set
|
||||
# CONFIG_ARCH_L7200 is not set
|
||||
# CONFIG_ARCH_KIRKWOOD is not set
|
||||
# CONFIG_ARCH_KS8695 is not set
|
||||
# CONFIG_ARCH_NS9XXX is not set
|
||||
# CONFIG_ARCH_LOKI is not set
|
||||
# CONFIG_ARCH_MV78XX0 is not set
|
||||
CONFIG_ARCH_MXC=y
|
||||
# CONFIG_ARCH_ORION5X is not set
|
||||
# CONFIG_ARCH_MMP is not set
|
||||
# CONFIG_ARCH_KS8695 is not set
|
||||
# CONFIG_ARCH_NS9XXX is not set
|
||||
# CONFIG_ARCH_W90X900 is not set
|
||||
# CONFIG_ARCH_PNX4008 is not set
|
||||
# CONFIG_ARCH_PXA is not set
|
||||
# CONFIG_ARCH_MMP is not set
|
||||
# CONFIG_ARCH_MSM is not set
|
||||
# CONFIG_ARCH_RPC is not set
|
||||
# CONFIG_ARCH_SA1100 is not set
|
||||
# CONFIG_ARCH_S3C2410 is not set
|
||||
# CONFIG_ARCH_S3C64XX is not set
|
||||
# CONFIG_ARCH_SHARK is not set
|
||||
# CONFIG_ARCH_LH7A40X is not set
|
||||
# CONFIG_ARCH_U300 is not set
|
||||
# CONFIG_ARCH_DAVINCI is not set
|
||||
# CONFIG_ARCH_OMAP is not set
|
||||
# CONFIG_ARCH_MSM is not set
|
||||
# CONFIG_ARCH_W90X900 is not set
|
||||
|
||||
#
|
||||
# Freescale MXC Implementations
|
||||
|
@ -178,6 +188,7 @@ CONFIG_ARCH_MXC=y
|
|||
# CONFIG_ARCH_MX2 is not set
|
||||
CONFIG_ARCH_MX3=y
|
||||
CONFIG_ARCH_MX31=y
|
||||
CONFIG_ARCH_MX35=y
|
||||
|
||||
#
|
||||
# MX3 platforms:
|
||||
|
@ -185,12 +196,19 @@ CONFIG_ARCH_MX31=y
|
|||
CONFIG_MACH_MX31ADS=y
|
||||
CONFIG_MACH_MX31ADS_WM1133_EV1=y
|
||||
CONFIG_MACH_PCM037=y
|
||||
CONFIG_MACH_PCM037_EET=y
|
||||
CONFIG_MACH_MX31LITE=y
|
||||
CONFIG_MACH_MX31_3DS=y
|
||||
CONFIG_MACH_MX31MOBOARD=y
|
||||
CONFIG_MACH_MX31LILLY=y
|
||||
CONFIG_MACH_QONG=y
|
||||
CONFIG_MACH_PCM043=y
|
||||
CONFIG_MACH_ARMADILLO5X0=y
|
||||
CONFIG_MACH_MX35_3DS=y
|
||||
CONFIG_MXC_IRQ_PRIOR=y
|
||||
CONFIG_MXC_PWM=y
|
||||
CONFIG_ARCH_HAS_RNGA=y
|
||||
CONFIG_ARCH_MXC_IOMUX_V3=y
|
||||
|
||||
#
|
||||
# Processor Type
|
||||
|
@ -218,6 +236,7 @@ CONFIG_ARM_THUMB=y
|
|||
# CONFIG_CPU_BPREDICT_DISABLE is not set
|
||||
CONFIG_OUTER_CACHE=y
|
||||
CONFIG_CACHE_L2X0=y
|
||||
# CONFIG_ARM_ERRATA_411920 is not set
|
||||
CONFIG_COMMON_CLKDEV=y
|
||||
|
||||
#
|
||||
|
@ -242,7 +261,6 @@ CONFIG_PREEMPT=y
|
|||
CONFIG_HZ=100
|
||||
CONFIG_AEABI=y
|
||||
CONFIG_OABI_COMPAT=y
|
||||
CONFIG_ARCH_FLATMEM_HAS_HOLES=y
|
||||
# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
|
||||
# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
|
||||
# CONFIG_HIGHMEM is not set
|
||||
|
@ -257,10 +275,11 @@ CONFIG_SPLIT_PTLOCK_CPUS=4
|
|||
# CONFIG_PHYS_ADDR_T_64BIT is not set
|
||||
CONFIG_ZONE_DMA_FLAG=0
|
||||
CONFIG_VIRT_TO_BUS=y
|
||||
CONFIG_UNEVICTABLE_LRU=y
|
||||
CONFIG_HAVE_MLOCK=y
|
||||
CONFIG_HAVE_MLOCKED_PAGE_BIT=y
|
||||
CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
|
||||
CONFIG_ALIGNMENT_TRAP=y
|
||||
# CONFIG_UACCESS_WITH_MEMCPY is not set
|
||||
|
||||
#
|
||||
# Boot options
|
||||
|
@ -362,6 +381,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
|
|||
# CONFIG_ECONET is not set
|
||||
# CONFIG_WAN_ROUTER is not set
|
||||
# CONFIG_PHONET is not set
|
||||
# CONFIG_IEEE802154 is not set
|
||||
# CONFIG_NET_SCHED is not set
|
||||
# CONFIG_DCB is not set
|
||||
|
||||
|
@ -465,7 +485,16 @@ CONFIG_MTD_PHYSMAP=y
|
|||
# CONFIG_MTD_DOC2000 is not set
|
||||
# CONFIG_MTD_DOC2001 is not set
|
||||
# CONFIG_MTD_DOC2001PLUS is not set
|
||||
# CONFIG_MTD_NAND is not set
|
||||
CONFIG_MTD_NAND=y
|
||||
# CONFIG_MTD_NAND_VERIFY_WRITE is not set
|
||||
# CONFIG_MTD_NAND_ECC_SMC is not set
|
||||
# CONFIG_MTD_NAND_MUSEUM_IDS is not set
|
||||
# CONFIG_MTD_NAND_GPIO is not set
|
||||
CONFIG_MTD_NAND_IDS=y
|
||||
# CONFIG_MTD_NAND_DISKONCHIP is not set
|
||||
# CONFIG_MTD_NAND_NANDSIM is not set
|
||||
# CONFIG_MTD_NAND_PLATFORM is not set
|
||||
CONFIG_MTD_NAND_MXC=y
|
||||
# CONFIG_MTD_ONENAND is not set
|
||||
|
||||
#
|
||||
|
@ -476,10 +505,30 @@ CONFIG_MTD_PHYSMAP=y
|
|||
#
|
||||
# UBI - Unsorted block images
|
||||
#
|
||||
# CONFIG_MTD_UBI is not set
|
||||
CONFIG_MTD_UBI=y
|
||||
CONFIG_MTD_UBI_WL_THRESHOLD=4096
|
||||
CONFIG_MTD_UBI_BEB_RESERVE=1
|
||||
# CONFIG_MTD_UBI_GLUEBI is not set
|
||||
|
||||
#
|
||||
# UBI debugging options
|
||||
#
|
||||
# CONFIG_MTD_UBI_DEBUG is not set
|
||||
# CONFIG_PARPORT is not set
|
||||
# CONFIG_BLK_DEV is not set
|
||||
# CONFIG_MISC_DEVICES is not set
|
||||
CONFIG_MISC_DEVICES=y
|
||||
# CONFIG_ICS932S401 is not set
|
||||
# CONFIG_ENCLOSURE_SERVICES is not set
|
||||
# CONFIG_ISL29003 is not set
|
||||
# CONFIG_C2PORT is not set
|
||||
|
||||
#
|
||||
# EEPROM support
|
||||
#
|
||||
CONFIG_EEPROM_AT24=y
|
||||
# CONFIG_EEPROM_LEGACY is not set
|
||||
# CONFIG_EEPROM_MAX6875 is not set
|
||||
# CONFIG_EEPROM_93CX6 is not set
|
||||
CONFIG_HAVE_IDE=y
|
||||
# CONFIG_IDE is not set
|
||||
|
||||
|
@ -493,7 +542,6 @@ CONFIG_HAVE_IDE=y
|
|||
# CONFIG_ATA is not set
|
||||
# CONFIG_MD is not set
|
||||
CONFIG_NETDEVICES=y
|
||||
CONFIG_COMPAT_NET_DEV_OPS=y
|
||||
# CONFIG_DUMMY is not set
|
||||
# CONFIG_BONDING is not set
|
||||
# CONFIG_MACVLAN is not set
|
||||
|
@ -528,7 +576,7 @@ CONFIG_MII=y
|
|||
# CONFIG_ETHOC is not set
|
||||
# CONFIG_SMC911X is not set
|
||||
CONFIG_SMSC911X=y
|
||||
# CONFIG_DNET is not set
|
||||
CONFIG_DNET=y
|
||||
# CONFIG_IBM_NEW_EMAC_ZMII is not set
|
||||
# CONFIG_IBM_NEW_EMAC_RGMII is not set
|
||||
# CONFIG_IBM_NEW_EMAC_TAH is not set
|
||||
|
@ -537,8 +585,10 @@ CONFIG_SMSC911X=y
|
|||
# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
|
||||
# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
|
||||
# CONFIG_B44 is not set
|
||||
CONFIG_CS89x0=y
|
||||
CONFIG_CS89x0_NONISA_IRQ=y
|
||||
# CONFIG_CS89x0 is not set
|
||||
# CONFIG_KS8842 is not set
|
||||
CONFIG_FEC=y
|
||||
# CONFIG_FEC2 is not set
|
||||
# CONFIG_NETDEV_1000 is not set
|
||||
# CONFIG_NETDEV_10000 is not set
|
||||
|
||||
|
@ -609,6 +659,7 @@ CONFIG_I2C_HELPER_AUTO=y
|
|||
#
|
||||
# I2C system bus drivers (mostly embedded / system-on-chip)
|
||||
#
|
||||
# CONFIG_I2C_DESIGNWARE is not set
|
||||
# CONFIG_I2C_GPIO is not set
|
||||
CONFIG_I2C_IMX=y
|
||||
# CONFIG_I2C_OCORES is not set
|
||||
|
@ -633,7 +684,6 @@ CONFIG_I2C_IMX=y
|
|||
# CONFIG_SENSORS_PCF8574 is not set
|
||||
# CONFIG_PCF8575 is not set
|
||||
# CONFIG_SENSORS_PCA9539 is not set
|
||||
# CONFIG_SENSORS_MAX6875 is not set
|
||||
# CONFIG_SENSORS_TSL2550 is not set
|
||||
# CONFIG_I2C_DEBUG_CORE is not set
|
||||
# CONFIG_I2C_DEBUG_ALGO is not set
|
||||
|
@ -669,6 +719,7 @@ CONFIG_W1=y
|
|||
#
|
||||
# CONFIG_W1_MASTER_DS2482 is not set
|
||||
CONFIG_W1_MASTER_MXC=y
|
||||
# CONFIG_W1_MASTER_DS1WM is not set
|
||||
# CONFIG_W1_MASTER_GPIO is not set
|
||||
|
||||
#
|
||||
|
@ -703,6 +754,8 @@ CONFIG_SSB_POSSIBLE=y
|
|||
# CONFIG_TPS65010 is not set
|
||||
# CONFIG_TWL4030_CORE is not set
|
||||
# CONFIG_MFD_TMIO is not set
|
||||
# CONFIG_MFD_T7L66XB is not set
|
||||
# CONFIG_MFD_TC6387XB is not set
|
||||
# CONFIG_MFD_TC6393XB is not set
|
||||
# CONFIG_PMIC_DA903X is not set
|
||||
# CONFIG_MFD_WM8400 is not set
|
||||
|
@ -711,10 +764,8 @@ CONFIG_MFD_WM8350_CONFIG_MODE_0=y
|
|||
CONFIG_MFD_WM8352_CONFIG_MODE_0=y
|
||||
CONFIG_MFD_WM8350_I2C=y
|
||||
# CONFIG_MFD_PCF50633 is not set
|
||||
|
||||
#
|
||||
# Multimedia devices
|
||||
#
|
||||
# CONFIG_AB3100_CORE is not set
|
||||
CONFIG_MEDIA_SUPPORT=y
|
||||
|
||||
#
|
||||
# Multimedia core support
|
||||
|
@ -758,8 +809,10 @@ CONFIG_SOC_CAMERA_MT9T031=y
|
|||
CONFIG_SOC_CAMERA_MT9V022=y
|
||||
CONFIG_SOC_CAMERA_TW9910=y
|
||||
# CONFIG_SOC_CAMERA_PLATFORM is not set
|
||||
# CONFIG_SOC_CAMERA_OV772X is not set
|
||||
CONFIG_SOC_CAMERA_OV772X=y
|
||||
CONFIG_MX3_VIDEO=y
|
||||
CONFIG_VIDEO_MX3=y
|
||||
# CONFIG_VIDEO_SH_MOBILE_CEU is not set
|
||||
# CONFIG_RADIO_ADAPTERS is not set
|
||||
# CONFIG_DAB is not set
|
||||
|
||||
|
@ -847,8 +900,11 @@ CONFIG_REGULATOR=y
|
|||
# CONFIG_REGULATOR_DEBUG is not set
|
||||
# CONFIG_REGULATOR_FIXED_VOLTAGE is not set
|
||||
# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set
|
||||
# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set
|
||||
# CONFIG_REGULATOR_BQ24022 is not set
|
||||
# CONFIG_REGULATOR_MAX1586 is not set
|
||||
CONFIG_REGULATOR_WM8350=y
|
||||
# CONFIG_REGULATOR_LP3971 is not set
|
||||
# CONFIG_UIO is not set
|
||||
# CONFIG_STAGING is not set
|
||||
|
||||
|
@ -861,10 +917,12 @@ CONFIG_REGULATOR_WM8350=y
|
|||
# CONFIG_REISERFS_FS is not set
|
||||
# CONFIG_JFS_FS is not set
|
||||
# CONFIG_FS_POSIX_ACL is not set
|
||||
CONFIG_FILE_LOCKING=y
|
||||
# CONFIG_XFS_FS is not set
|
||||
# CONFIG_GFS2_FS is not set
|
||||
# CONFIG_OCFS2_FS is not set
|
||||
# CONFIG_BTRFS_FS is not set
|
||||
CONFIG_FILE_LOCKING=y
|
||||
CONFIG_FSNOTIFY=y
|
||||
# CONFIG_DNOTIFY is not set
|
||||
CONFIG_INOTIFY=y
|
||||
CONFIG_INOTIFY_USER=y
|
||||
|
@ -921,6 +979,12 @@ CONFIG_JFFS2_ZLIB=y
|
|||
# CONFIG_JFFS2_LZO is not set
|
||||
CONFIG_JFFS2_RTIME=y
|
||||
# CONFIG_JFFS2_RUBIN is not set
|
||||
CONFIG_UBIFS_FS=y
|
||||
# CONFIG_UBIFS_FS_XATTR is not set
|
||||
# CONFIG_UBIFS_FS_ADVANCED_COMPR is not set
|
||||
CONFIG_UBIFS_FS_LZO=y
|
||||
CONFIG_UBIFS_FS_ZLIB=y
|
||||
# CONFIG_UBIFS_FS_DEBUG is not set
|
||||
# CONFIG_CRAMFS is not set
|
||||
# CONFIG_SQUASHFS is not set
|
||||
# CONFIG_VXFS_FS is not set
|
||||
|
@ -937,6 +1001,7 @@ CONFIG_NFS_FS=y
|
|||
CONFIG_NFS_V3=y
|
||||
# CONFIG_NFS_V3_ACL is not set
|
||||
CONFIG_NFS_V4=y
|
||||
# CONFIG_NFS_V4_1 is not set
|
||||
CONFIG_ROOT_NFS=y
|
||||
# CONFIG_NFSD is not set
|
||||
CONFIG_LOCKD=y
|
||||
|
@ -979,22 +1044,7 @@ CONFIG_FRAME_WARN=1024
|
|||
CONFIG_SYSCTL_SYSCALL_CHECK=y
|
||||
CONFIG_HAVE_FUNCTION_TRACER=y
|
||||
CONFIG_TRACING_SUPPORT=y
|
||||
|
||||
#
|
||||
# Tracers
|
||||
#
|
||||
# CONFIG_FUNCTION_TRACER is not set
|
||||
# CONFIG_IRQSOFF_TRACER is not set
|
||||
# CONFIG_PREEMPT_TRACER is not set
|
||||
# CONFIG_SCHED_TRACER is not set
|
||||
# CONFIG_CONTEXT_SWITCH_TRACER is not set
|
||||
# CONFIG_EVENT_TRACER is not set
|
||||
# CONFIG_BOOT_TRACER is not set
|
||||
# CONFIG_TRACE_BRANCH_PROFILING is not set
|
||||
# CONFIG_STACK_TRACER is not set
|
||||
# CONFIG_KMEMTRACE is not set
|
||||
# CONFIG_WORKQUEUE_TRACER is not set
|
||||
# CONFIG_BLK_DEV_IO_TRACE is not set
|
||||
# CONFIG_FTRACE is not set
|
||||
# CONFIG_SAMPLES is not set
|
||||
CONFIG_HAVE_ARCH_KGDB=y
|
||||
CONFIG_ARM_UNWIND=y
|
||||
|
@ -1094,9 +1144,9 @@ CONFIG_CRYPTO_DES=y
|
|||
#
|
||||
# Compression
|
||||
#
|
||||
# CONFIG_CRYPTO_DEFLATE is not set
|
||||
CONFIG_CRYPTO_DEFLATE=y
|
||||
# CONFIG_CRYPTO_ZLIB is not set
|
||||
# CONFIG_CRYPTO_LZO is not set
|
||||
CONFIG_CRYPTO_LZO=y
|
||||
|
||||
#
|
||||
# Random Number Generation
|
||||
|
@ -1109,9 +1159,10 @@ CONFIG_CRYPTO_HW=y
|
|||
# Library routines
|
||||
#
|
||||
CONFIG_BITREVERSE=y
|
||||
CONFIG_RATIONAL=y
|
||||
CONFIG_GENERIC_FIND_LAST_BIT=y
|
||||
# CONFIG_CRC_CCITT is not set
|
||||
# CONFIG_CRC16 is not set
|
||||
CONFIG_CRC16=y
|
||||
# CONFIG_CRC_T10DIF is not set
|
||||
# CONFIG_CRC_ITU_T is not set
|
||||
CONFIG_CRC32=y
|
||||
|
@ -1119,6 +1170,8 @@ CONFIG_CRC32=y
|
|||
# CONFIG_LIBCRC32C is not set
|
||||
CONFIG_ZLIB_INFLATE=y
|
||||
CONFIG_ZLIB_DEFLATE=y
|
||||
CONFIG_LZO_COMPRESS=y
|
||||
CONFIG_LZO_DECOMPRESS=y
|
||||
CONFIG_HAS_IOMEM=y
|
||||
CONFIG_HAS_IOPORT=y
|
||||
CONFIG_HAS_DMA=y
|
||||
|
|
|
@ -1107,7 +1107,7 @@ CONFIG_USB_ZERO=m
|
|||
CONFIG_USB_OTG_UTILS=y
|
||||
# CONFIG_USB_GPIO_VBUS is not set
|
||||
# CONFIG_ISP1301_OMAP is not set
|
||||
CONFIG_TWL4030_USB=y
|
||||
# CONFIG_TWL4030_USB is not set
|
||||
# CONFIG_NOP_USB_XCEIV is not set
|
||||
CONFIG_MMC=y
|
||||
# CONFIG_MMC_DEBUG is not set
|
||||
|
|
|
@ -159,8 +159,6 @@ static inline void atomic_clear_mask(unsigned long mask, unsigned long *addr)
|
|||
|
||||
#else /* ARM_ARCH_6 */
|
||||
|
||||
#include <asm/system.h>
|
||||
|
||||
#ifdef CONFIG_SMP
|
||||
#error SMP not supported on pre-ARMv6 CPUs
|
||||
#endif
|
||||
|
|
|
@ -148,7 +148,7 @@ trace:
|
|||
sub r0, r0, #MCOUNT_INSN_SIZE
|
||||
mov lr, pc
|
||||
mov pc, r2
|
||||
mov lr, r1 @ restore lr
|
||||
ldr lr, [fp, #-4] @ restore lr
|
||||
ldmia sp!, {r0-r3, pc}
|
||||
|
||||
#endif /* CONFIG_DYNAMIC_FTRACE */
|
||||
|
|
|
@ -133,7 +133,7 @@ sys_sigaction(int sig, const struct old_sigaction __user *act,
|
|||
}
|
||||
|
||||
#ifdef CONFIG_CRUNCH
|
||||
static int preserve_crunch_context(struct crunch_sigframe *frame)
|
||||
static int preserve_crunch_context(struct crunch_sigframe __user *frame)
|
||||
{
|
||||
char kbuf[sizeof(*frame) + 8];
|
||||
struct crunch_sigframe *kframe;
|
||||
|
@ -146,7 +146,7 @@ static int preserve_crunch_context(struct crunch_sigframe *frame)
|
|||
return __copy_to_user(frame, kframe, sizeof(*frame));
|
||||
}
|
||||
|
||||
static int restore_crunch_context(struct crunch_sigframe *frame)
|
||||
static int restore_crunch_context(struct crunch_sigframe __user *frame)
|
||||
{
|
||||
char kbuf[sizeof(*frame) + 8];
|
||||
struct crunch_sigframe *kframe;
|
||||
|
|
|
@ -37,7 +37,6 @@
|
|||
#include <mach/serial.h>
|
||||
#include <mach/nand.h>
|
||||
#include <mach/mmc.h>
|
||||
#include <mach/common.h>
|
||||
|
||||
#define DAVINCI_ASYNC_EMIF_CONTROL_BASE 0x01e10000
|
||||
#define DAVINCI_ASYNC_EMIF_DATA_CE0_BASE 0x02000000
|
||||
|
|
|
@ -36,7 +36,6 @@
|
|||
#include <mach/serial.h>
|
||||
#include <mach/nand.h>
|
||||
#include <mach/mmc.h>
|
||||
#include <mach/common.h>
|
||||
|
||||
#define DAVINCI_ASYNC_EMIF_CONTROL_BASE 0x01e10000
|
||||
#define DAVINCI_ASYNC_EMIF_DATA_CE0_BASE 0x02000000
|
||||
|
|
|
@ -45,7 +45,6 @@
|
|||
#include <mach/nand.h>
|
||||
#include <mach/mmc.h>
|
||||
#include <mach/emac.h>
|
||||
#include <mach/common.h>
|
||||
|
||||
#define DM644X_EVM_PHY_MASK (0x2)
|
||||
#define DM644X_EVM_MDIO_FREQUENCY (2200000) /* PHY bus frequency */
|
||||
|
|
|
@ -47,7 +47,6 @@
|
|||
#include <mach/i2c.h>
|
||||
#include <mach/mmc.h>
|
||||
#include <mach/emac.h>
|
||||
#include <mach/common.h>
|
||||
|
||||
#define DM646X_EVM_PHY_MASK (0x2)
|
||||
#define DM646X_EVM_MDIO_FREQUENCY (2200000) /* PHY bus frequency */
|
||||
|
|
|
@ -52,7 +52,6 @@
|
|||
#include <mach/serial.h>
|
||||
#include <mach/psc.h>
|
||||
#include <mach/mux.h>
|
||||
#include <mach/common.h>
|
||||
|
||||
#define SFFSDR_PHY_MASK (0x2)
|
||||
#define SFFSDR_MDIO_FREQUENCY (2200000) /* PHY bus frequency */
|
||||
|
|
|
@ -41,9 +41,6 @@
|
|||
#define TS72XX_OPTIONS2_TS9420_BOOT 0x02
|
||||
|
||||
|
||||
#define TS72XX_NOR_PHYS_BASE 0x60000000
|
||||
#define TS72XX_NOR2_PHYS_BASE 0x62000000
|
||||
|
||||
#define TS72XX_NAND1_DATA_PHYS_BASE 0x60000000
|
||||
#define TS72XX_NAND2_DATA_PHYS_BASE 0x70000000
|
||||
#define TS72XX_NAND_DATA_VIRT_BASE 0xfebfc000
|
||||
|
|
|
@ -112,13 +112,16 @@ static void __init ts72xx_map_io(void)
|
|||
}
|
||||
}
|
||||
|
||||
/*************************************************************************
|
||||
* NOR flash (TS-7200 only)
|
||||
*************************************************************************/
|
||||
static struct physmap_flash_data ts72xx_flash_data = {
|
||||
.width = 1,
|
||||
.width = 2,
|
||||
};
|
||||
|
||||
static struct resource ts72xx_flash_resource = {
|
||||
.start = TS72XX_NOR_PHYS_BASE,
|
||||
.end = TS72XX_NOR_PHYS_BASE + SZ_16M - 1,
|
||||
.start = EP93XX_CS6_PHYS_BASE,
|
||||
.end = EP93XX_CS6_PHYS_BASE + SZ_16M - 1,
|
||||
.flags = IORESOURCE_MEM,
|
||||
};
|
||||
|
||||
|
@ -132,6 +135,12 @@ static struct platform_device ts72xx_flash = {
|
|||
.resource = &ts72xx_flash_resource,
|
||||
};
|
||||
|
||||
static void __init ts72xx_register_flash(void)
|
||||
{
|
||||
if (board_is_ts7200())
|
||||
platform_device_register(&ts72xx_flash);
|
||||
}
|
||||
|
||||
static unsigned char ts72xx_rtc_readbyte(unsigned long addr)
|
||||
{
|
||||
__raw_writeb(addr, TS72XX_RTC_INDEX_VIRT_BASE);
|
||||
|
@ -165,8 +174,7 @@ static struct ep93xx_eth_data ts72xx_eth_data = {
|
|||
static void __init ts72xx_init_machine(void)
|
||||
{
|
||||
ep93xx_init_devices();
|
||||
if (board_is_ts7200())
|
||||
platform_device_register(&ts72xx_flash);
|
||||
ts72xx_register_flash();
|
||||
platform_device_register(&ts72xx_rtc_device);
|
||||
|
||||
ep93xx_register_eth(&ts72xx_eth_data, 1);
|
||||
|
|
|
@ -16,6 +16,11 @@
|
|||
|
||||
#include <asm/sizes.h>
|
||||
|
||||
/*
|
||||
* Clocks are derived from MCLK, which is 25Mhz
|
||||
*/
|
||||
#define KS8695_CLOCK_RATE 25000000
|
||||
|
||||
/*
|
||||
* Physical RAM address.
|
||||
*/
|
||||
|
|
|
@ -14,7 +14,8 @@
|
|||
#ifndef __ASM_ARCH_TIMEX_H
|
||||
#define __ASM_ARCH_TIMEX_H
|
||||
|
||||
/* timers are derived from MCLK, which is 25MHz */
|
||||
#define CLOCK_TICK_RATE 25000000
|
||||
#include <mach/hardware.h>
|
||||
|
||||
#define CLOCK_TICK_RATE KS8695_CLOCK_RATE
|
||||
|
||||
#endif
|
||||
|
|
|
@ -245,6 +245,9 @@ static int ks8695_pci_fault(unsigned long addr, unsigned int fsr, struct pt_regs
|
|||
|
||||
static void __init ks8695_pci_preinit(void)
|
||||
{
|
||||
/* make software reset to avoid freeze if PCI bus was messed up */
|
||||
__raw_writel(0x80000000, KS8695_PCI_VA + KS8695_PBCS);
|
||||
|
||||
/* stage 1 initialization, subid, subdevice = 0x0001 */
|
||||
__raw_writel(0x00010001, KS8695_PCI_VA + KS8695_CRCSID);
|
||||
|
||||
|
|
|
@ -19,7 +19,6 @@
|
|||
|
||||
#include <mach/irqs.h>
|
||||
#include <mach/dma.h>
|
||||
#include <mach/irqs.h>
|
||||
#include <mach/mux.h>
|
||||
#include <mach/cpu.h>
|
||||
#include <mach/mcbsp.h>
|
||||
|
|
|
@ -25,6 +25,7 @@
|
|||
#include <linux/spi/spi.h>
|
||||
#include <linux/spi/ads7846.h>
|
||||
#include <linux/i2c/twl4030.h>
|
||||
#include <linux/usb/otg.h>
|
||||
|
||||
#include <mach/hardware.h>
|
||||
#include <asm/mach-types.h>
|
||||
|
@ -307,6 +308,10 @@ static void __init omap3_evm_init(void)
|
|||
ARRAY_SIZE(omap3evm_spi_board_info));
|
||||
|
||||
omap_serial_init();
|
||||
#ifdef CONFIG_NOP_USB_XCEIV
|
||||
/* OMAP3EVM uses ISP1504 phy and so register nop transceiver */
|
||||
usb_nop_xceiv_register();
|
||||
#endif
|
||||
usb_musb_init();
|
||||
ads7846_dev_init();
|
||||
}
|
||||
|
|
|
@ -19,7 +19,6 @@
|
|||
|
||||
#include <mach/irqs.h>
|
||||
#include <mach/dma.h>
|
||||
#include <mach/irqs.h>
|
||||
#include <mach/mux.h>
|
||||
#include <mach/cpu.h>
|
||||
#include <mach/mcbsp.h>
|
||||
|
|
|
@ -155,20 +155,6 @@ static struct platform_device musb_device = {
|
|||
.resource = musb_resources,
|
||||
};
|
||||
|
||||
#ifdef CONFIG_NOP_USB_XCEIV
|
||||
static u64 nop_xceiv_dmamask = DMA_BIT_MASK(32);
|
||||
|
||||
static struct platform_device nop_xceiv_device = {
|
||||
.name = "nop_usb_xceiv",
|
||||
.id = -1,
|
||||
.dev = {
|
||||
.dma_mask = &nop_xceiv_dmamask,
|
||||
.coherent_dma_mask = DMA_BIT_MASK(32),
|
||||
.platform_data = NULL,
|
||||
},
|
||||
};
|
||||
#endif
|
||||
|
||||
void __init usb_musb_init(void)
|
||||
{
|
||||
if (cpu_is_omap243x())
|
||||
|
@ -183,13 +169,6 @@ void __init usb_musb_init(void)
|
|||
*/
|
||||
musb_plat.clock = "ick";
|
||||
|
||||
#ifdef CONFIG_NOP_USB_XCEIV
|
||||
if (platform_device_register(&nop_xceiv_device) < 0) {
|
||||
printk(KERN_ERR "Unable to register NOP-XCEIV device\n");
|
||||
return;
|
||||
}
|
||||
#endif
|
||||
|
||||
if (platform_device_register(&musb_device) < 0) {
|
||||
printk(KERN_ERR "Unable to register HS-USB (MUSB) device\n");
|
||||
return;
|
||||
|
|
|
@ -1141,12 +1141,16 @@ struct power_supply_info em_x270_psy_info = {
|
|||
|
||||
static void em_x270_battery_low(void)
|
||||
{
|
||||
#if defined(CONFIG_APM_EMULATION)
|
||||
apm_queue_event(APM_LOW_BATTERY);
|
||||
#endif
|
||||
}
|
||||
|
||||
static void em_x270_battery_critical(void)
|
||||
{
|
||||
#if defined(CONFIG_APM_EMULATION)
|
||||
apm_queue_event(APM_CRITICAL_SUSPEND);
|
||||
#endif
|
||||
}
|
||||
|
||||
struct da9030_battery_info em_x270_batterty_info = {
|
||||
|
|
|
@ -128,6 +128,10 @@ static unsigned long palmld_pin_config[] __initdata = {
|
|||
GPIO38_GPIO, /* wifi ready */
|
||||
GPIO81_GPIO, /* wifi reset */
|
||||
|
||||
/* FFUART */
|
||||
GPIO34_FFUART_RXD,
|
||||
GPIO39_FFUART_TXD,
|
||||
|
||||
/* HDD */
|
||||
GPIO98_GPIO, /* HDD reset */
|
||||
GPIO115_GPIO, /* HDD power */
|
||||
|
|
|
@ -111,6 +111,10 @@ static unsigned long palmt5_pin_config[] __initdata = {
|
|||
/* PWM */
|
||||
GPIO16_PWM0_OUT,
|
||||
|
||||
/* FFUART */
|
||||
GPIO34_FFUART_RXD,
|
||||
GPIO39_FFUART_TXD,
|
||||
|
||||
/* MISC */
|
||||
GPIO10_GPIO, /* hotsync button */
|
||||
GPIO90_GPIO, /* power detect */
|
||||
|
|
|
@ -127,6 +127,10 @@ static unsigned long palmtx_pin_config[] __initdata = {
|
|||
GPIO76_LCD_PCLK,
|
||||
GPIO77_LCD_BIAS,
|
||||
|
||||
/* FFUART */
|
||||
GPIO34_FFUART_RXD,
|
||||
GPIO39_FFUART_TXD,
|
||||
|
||||
/* MISC. */
|
||||
GPIO10_GPIO, /* hotsync button */
|
||||
GPIO12_GPIO, /* power detect */
|
||||
|
|
|
@ -409,7 +409,7 @@ err1:
|
|||
|
||||
static void treo680_irda_shutdown(struct device *dev)
|
||||
{
|
||||
gpio_free(GPIO_NR_TREO680_AMP_EN);
|
||||
gpio_free(GPIO_NR_TREO680_IR_EN);
|
||||
}
|
||||
|
||||
static struct pxaficp_platform_data treo680_ficp_info = {
|
||||
|
|
|
@ -197,10 +197,12 @@ static void __init zylonite_detect_lcd_panel(void)
|
|||
for (i = 0; i < NUM_LCD_DETECT_PINS; i++) {
|
||||
id = id << 1;
|
||||
gpio = mfp_to_gpio(lcd_detect_pins[i]);
|
||||
gpio_request(gpio, "LCD_ID_PINS");
|
||||
gpio_direction_input(gpio);
|
||||
|
||||
if (gpio_get_value(gpio))
|
||||
id = id | 0x1;
|
||||
gpio_free(gpio);
|
||||
}
|
||||
|
||||
/* lcd id, flush out bit 1 */
|
||||
|
|
|
@ -176,10 +176,12 @@ static void __init zylonite_detect_lcd_panel(void)
|
|||
for (i = 0; i < NUM_LCD_DETECT_PINS; i++) {
|
||||
id = id << 1;
|
||||
gpio = mfp_to_gpio(lcd_detect_pins[i]);
|
||||
gpio_request(gpio, "LCD_ID_PINS");
|
||||
gpio_direction_input(gpio);
|
||||
|
||||
if (gpio_get_value(gpio))
|
||||
id = id | 0x1;
|
||||
gpio_free(gpio);
|
||||
}
|
||||
|
||||
/* lcd id, flush out bit 1 */
|
||||
|
|
|
@ -28,7 +28,7 @@ static inline struct s3c_gpio_chip *s3c_gpiolib_getchip(unsigned int pin)
|
|||
return NULL;
|
||||
|
||||
chip = &s3c24xx_gpios[pin/32];
|
||||
return (S3C2410_GPIO_OFFSET(pin) > chip->chip.ngpio) ? chip : NULL;
|
||||
return (S3C2410_GPIO_OFFSET(pin) < chip->chip.ngpio) ? chip : NULL;
|
||||
}
|
||||
|
||||
#endif /* __ASM_ARCH_GPIO_CORE_H */
|
||||
|
|
|
@ -246,6 +246,10 @@ int pwm_config(struct pwm_device *pwm, int duty_ns, int period_ns)
|
|||
|
||||
tcmp = duty_ns / tin_ns;
|
||||
tcmp = tcnt - tcmp;
|
||||
/* the pwm hw only checks the compare register after a decrement,
|
||||
so the pin never toggles if tcmp = tcnt */
|
||||
if (tcmp == tcnt)
|
||||
tcmp--;
|
||||
|
||||
pwm_dbg(pwm, "tin_ns=%lu, tcmp=%ld/%lu\n", tin_ns, tcmp, tcnt);
|
||||
|
||||
|
|
|
@ -117,8 +117,6 @@ void s3c_pm_save_core(void)
|
|||
* this.
|
||||
*/
|
||||
|
||||
#include <plat/regs-gpio.h>
|
||||
|
||||
static void s3c64xx_cpu_suspend(void)
|
||||
{
|
||||
unsigned long tmp;
|
||||
|
|
|
@ -153,7 +153,7 @@ static unsigned long s3c64xx_clk_arm_round_rate(struct clk *clk,
|
|||
u32 div;
|
||||
|
||||
if (parent < rate)
|
||||
return rate;
|
||||
return parent;
|
||||
|
||||
div = (parent / rate) - 1;
|
||||
if (div > armclk_mask)
|
||||
|
@ -175,7 +175,7 @@ static int s3c64xx_clk_arm_set_rate(struct clk *clk, unsigned long rate)
|
|||
div = clk_get_rate(clk->parent) / rate;
|
||||
|
||||
val = __raw_readl(S3C_CLK_DIV0);
|
||||
val &= armclk_mask;
|
||||
val &= ~armclk_mask;
|
||||
val |= (div - 1);
|
||||
__raw_writel(val, S3C_CLK_DIV0);
|
||||
|
||||
|
|
|
@ -22,7 +22,6 @@
|
|||
#include <linux/sysdev.h>
|
||||
#include <linux/string.h>
|
||||
#include <linux/bitops.h>
|
||||
#include <linux/sysdev.h>
|
||||
#include <linux/irq.h>
|
||||
|
||||
#include <mach/hardware.h>
|
||||
|
|
|
@ -247,7 +247,8 @@ void emulate_io_inst(struct kvm_vcpu *vcpu, u64 padr, u64 ma)
|
|||
vcpu_get_fpreg(vcpu, inst.M9.f2, &v);
|
||||
/* Write high word. FIXME: this is a kludge! */
|
||||
v.u.bits[1] &= 0x3ffff;
|
||||
mmio_access(vcpu, padr + 8, &v.u.bits[1], 8, ma, IOREQ_WRITE);
|
||||
mmio_access(vcpu, padr + 8, (u64 *)&v.u.bits[1], 8,
|
||||
ma, IOREQ_WRITE);
|
||||
data = v.u.bits[0];
|
||||
size = 3;
|
||||
} else if (inst.M10.major == 7 && inst.M10.x6 == 0x3B) {
|
||||
|
@ -265,7 +266,8 @@ void emulate_io_inst(struct kvm_vcpu *vcpu, u64 padr, u64 ma)
|
|||
|
||||
/* Write high word.FIXME: this is a kludge! */
|
||||
v.u.bits[1] &= 0x3ffff;
|
||||
mmio_access(vcpu, padr + 8, &v.u.bits[1], 8, ma, IOREQ_WRITE);
|
||||
mmio_access(vcpu, padr + 8, (u64 *)&v.u.bits[1],
|
||||
8, ma, IOREQ_WRITE);
|
||||
data = v.u.bits[0];
|
||||
size = 3;
|
||||
} else if (inst.M10.major == 7 && inst.M10.x6 == 0x31) {
|
||||
|
|
|
@ -461,7 +461,7 @@ void setreg(unsigned long regnum, unsigned long val,
|
|||
u64 vcpu_get_gr(struct kvm_vcpu *vcpu, unsigned long reg)
|
||||
{
|
||||
struct kvm_pt_regs *regs = vcpu_regs(vcpu);
|
||||
u64 val;
|
||||
unsigned long val;
|
||||
|
||||
if (!reg)
|
||||
return 0;
|
||||
|
@ -469,7 +469,7 @@ u64 vcpu_get_gr(struct kvm_vcpu *vcpu, unsigned long reg)
|
|||
return val;
|
||||
}
|
||||
|
||||
void vcpu_set_gr(struct kvm_vcpu *vcpu, u64 reg, u64 value, int nat)
|
||||
void vcpu_set_gr(struct kvm_vcpu *vcpu, unsigned long reg, u64 value, int nat)
|
||||
{
|
||||
struct kvm_pt_regs *regs = vcpu_regs(vcpu);
|
||||
long sof = (regs->cr_ifs) & 0x7f;
|
||||
|
@ -1072,7 +1072,7 @@ void kvm_ttag(struct kvm_vcpu *vcpu, INST64 inst)
|
|||
vcpu_set_gr(vcpu, inst.M46.r1, tag, 0);
|
||||
}
|
||||
|
||||
int vcpu_tpa(struct kvm_vcpu *vcpu, u64 vadr, u64 *padr)
|
||||
int vcpu_tpa(struct kvm_vcpu *vcpu, u64 vadr, unsigned long *padr)
|
||||
{
|
||||
struct thash_data *data;
|
||||
union ia64_isr visr, pt_isr;
|
||||
|
|
|
@ -686,14 +686,15 @@ static inline int highest_inservice_irq(struct kvm_vcpu *vcpu)
|
|||
return highest_bits((int *)&(VMX(vcpu, insvc[0])));
|
||||
}
|
||||
|
||||
extern void vcpu_get_fpreg(struct kvm_vcpu *vcpu, u64 reg,
|
||||
extern void vcpu_get_fpreg(struct kvm_vcpu *vcpu, unsigned long reg,
|
||||
struct ia64_fpreg *val);
|
||||
extern void vcpu_set_fpreg(struct kvm_vcpu *vcpu, u64 reg,
|
||||
extern void vcpu_set_fpreg(struct kvm_vcpu *vcpu, unsigned long reg,
|
||||
struct ia64_fpreg *val);
|
||||
extern u64 vcpu_get_gr(struct kvm_vcpu *vcpu, u64 reg);
|
||||
extern void vcpu_set_gr(struct kvm_vcpu *vcpu, u64 reg, u64 val, int nat);
|
||||
extern u64 vcpu_get_psr(struct kvm_vcpu *vcpu);
|
||||
extern void vcpu_set_psr(struct kvm_vcpu *vcpu, u64 val);
|
||||
extern u64 vcpu_get_gr(struct kvm_vcpu *vcpu, unsigned long reg);
|
||||
extern void vcpu_set_gr(struct kvm_vcpu *vcpu, unsigned long reg,
|
||||
u64 val, int nat);
|
||||
extern unsigned long vcpu_get_psr(struct kvm_vcpu *vcpu);
|
||||
extern void vcpu_set_psr(struct kvm_vcpu *vcpu, unsigned long val);
|
||||
extern u64 vcpu_thash(struct kvm_vcpu *vcpu, u64 vadr);
|
||||
extern void vcpu_bsw0(struct kvm_vcpu *vcpu);
|
||||
extern void thash_vhpt_insert(struct kvm_vcpu *v, u64 pte,
|
||||
|
|
|
@ -59,7 +59,6 @@ void pcibios_penalize_isa_irq(int irq);
|
|||
#include <linux/slab.h>
|
||||
#include <asm/scatterlist.h>
|
||||
#include <linux/string.h>
|
||||
#include <linux/mm.h>
|
||||
#include <asm/io.h>
|
||||
|
||||
struct pci_dev;
|
||||
|
|
|
@ -34,7 +34,7 @@
|
|||
#define KVM_COALESCED_MMIO_PAGE_OFFSET 1
|
||||
|
||||
/* We don't currently support large pages. */
|
||||
#define KVM_PAGES_PER_HPAGE (1<<31)
|
||||
#define KVM_PAGES_PER_HPAGE (1UL << 31)
|
||||
|
||||
struct kvm;
|
||||
struct kvm_run;
|
||||
|
|
|
@ -7,6 +7,7 @@
|
|||
|
||||
#include <linux/device.h>
|
||||
#include <linux/dma-mapping.h>
|
||||
#include <linux/lmb.h>
|
||||
#include <asm/bug.h>
|
||||
#include <asm/abs_addr.h>
|
||||
|
||||
|
@ -90,11 +91,10 @@ static void dma_direct_unmap_sg(struct device *dev, struct scatterlist *sg,
|
|||
static int dma_direct_dma_supported(struct device *dev, u64 mask)
|
||||
{
|
||||
#ifdef CONFIG_PPC64
|
||||
/* Could be improved to check for memory though it better be
|
||||
* done via some global so platforms can set the limit in case
|
||||
/* Could be improved so platforms can set the limit in case
|
||||
* they have limited DMA windows
|
||||
*/
|
||||
return mask >= DMA_BIT_MASK(32);
|
||||
return mask >= (lmb_end_of_DRAM() - 1);
|
||||
#else
|
||||
return 1;
|
||||
#endif
|
||||
|
|
|
@ -407,7 +407,8 @@ struct power_pmu mpc7450_pmu = {
|
|||
|
||||
static int init_mpc7450_pmu(void)
|
||||
{
|
||||
if (strcmp(cur_cpu_spec->oprofile_cpu_type, "ppc/7450"))
|
||||
if (!cur_cpu_spec->oprofile_cpu_type ||
|
||||
strcmp(cur_cpu_spec->oprofile_cpu_type, "ppc/7450"))
|
||||
return -ENODEV;
|
||||
|
||||
return register_power_pmu(&mpc7450_pmu);
|
||||
|
|
|
@ -518,6 +518,8 @@ void hw_perf_disable(void)
|
|||
struct cpu_hw_counters *cpuhw;
|
||||
unsigned long flags;
|
||||
|
||||
if (!ppmu)
|
||||
return;
|
||||
local_irq_save(flags);
|
||||
cpuhw = &__get_cpu_var(cpu_hw_counters);
|
||||
|
||||
|
@ -572,6 +574,8 @@ void hw_perf_enable(void)
|
|||
int n_lim;
|
||||
int idx;
|
||||
|
||||
if (!ppmu)
|
||||
return;
|
||||
local_irq_save(flags);
|
||||
cpuhw = &__get_cpu_var(cpu_hw_counters);
|
||||
if (!cpuhw->disabled) {
|
||||
|
@ -737,6 +741,8 @@ int hw_perf_group_sched_in(struct perf_counter *group_leader,
|
|||
long i, n, n0;
|
||||
struct perf_counter *sub;
|
||||
|
||||
if (!ppmu)
|
||||
return 0;
|
||||
cpuhw = &__get_cpu_var(cpu_hw_counters);
|
||||
n0 = cpuhw->n_counters;
|
||||
n = collect_events(group_leader, ppmu->n_counter - n0,
|
||||
|
@ -1281,6 +1287,8 @@ void hw_perf_counter_setup(int cpu)
|
|||
{
|
||||
struct cpu_hw_counters *cpuhw = &per_cpu(cpu_hw_counters, cpu);
|
||||
|
||||
if (!ppmu)
|
||||
return;
|
||||
memset(cpuhw, 0, sizeof(*cpuhw));
|
||||
cpuhw->mmcr[0] = MMCR0_FC;
|
||||
}
|
||||
|
|
|
@ -606,7 +606,8 @@ static struct power_pmu power4_pmu = {
|
|||
|
||||
static int init_power4_pmu(void)
|
||||
{
|
||||
if (strcmp(cur_cpu_spec->oprofile_cpu_type, "ppc64/power4"))
|
||||
if (!cur_cpu_spec->oprofile_cpu_type ||
|
||||
strcmp(cur_cpu_spec->oprofile_cpu_type, "ppc64/power4"))
|
||||
return -ENODEV;
|
||||
|
||||
return register_power_pmu(&power4_pmu);
|
||||
|
|
|
@ -678,8 +678,9 @@ static struct power_pmu power5p_pmu = {
|
|||
|
||||
static int init_power5p_pmu(void)
|
||||
{
|
||||
if (strcmp(cur_cpu_spec->oprofile_cpu_type, "ppc64/power5+")
|
||||
&& strcmp(cur_cpu_spec->oprofile_cpu_type, "ppc64/power5++"))
|
||||
if (!cur_cpu_spec->oprofile_cpu_type ||
|
||||
(strcmp(cur_cpu_spec->oprofile_cpu_type, "ppc64/power5+")
|
||||
&& strcmp(cur_cpu_spec->oprofile_cpu_type, "ppc64/power5++")))
|
||||
return -ENODEV;
|
||||
|
||||
return register_power_pmu(&power5p_pmu);
|
||||
|
|
|
@ -618,7 +618,8 @@ static struct power_pmu power5_pmu = {
|
|||
|
||||
static int init_power5_pmu(void)
|
||||
{
|
||||
if (strcmp(cur_cpu_spec->oprofile_cpu_type, "ppc64/power5"))
|
||||
if (!cur_cpu_spec->oprofile_cpu_type ||
|
||||
strcmp(cur_cpu_spec->oprofile_cpu_type, "ppc64/power5"))
|
||||
return -ENODEV;
|
||||
|
||||
return register_power_pmu(&power5_pmu);
|
||||
|
|
|
@ -537,7 +537,8 @@ static struct power_pmu power6_pmu = {
|
|||
|
||||
static int init_power6_pmu(void)
|
||||
{
|
||||
if (strcmp(cur_cpu_spec->oprofile_cpu_type, "ppc64/power6"))
|
||||
if (!cur_cpu_spec->oprofile_cpu_type ||
|
||||
strcmp(cur_cpu_spec->oprofile_cpu_type, "ppc64/power6"))
|
||||
return -ENODEV;
|
||||
|
||||
return register_power_pmu(&power6_pmu);
|
||||
|
|
|
@ -366,7 +366,8 @@ static struct power_pmu power7_pmu = {
|
|||
|
||||
static int init_power7_pmu(void)
|
||||
{
|
||||
if (strcmp(cur_cpu_spec->oprofile_cpu_type, "ppc64/power7"))
|
||||
if (!cur_cpu_spec->oprofile_cpu_type ||
|
||||
strcmp(cur_cpu_spec->oprofile_cpu_type, "ppc64/power7"))
|
||||
return -ENODEV;
|
||||
|
||||
return register_power_pmu(&power7_pmu);
|
||||
|
|
|
@ -488,8 +488,9 @@ static struct power_pmu ppc970_pmu = {
|
|||
|
||||
static int init_ppc970_pmu(void)
|
||||
{
|
||||
if (strcmp(cur_cpu_spec->oprofile_cpu_type, "ppc64/970")
|
||||
&& strcmp(cur_cpu_spec->oprofile_cpu_type, "ppc64/970MP"))
|
||||
if (!cur_cpu_spec->oprofile_cpu_type ||
|
||||
(strcmp(cur_cpu_spec->oprofile_cpu_type, "ppc64/970")
|
||||
&& strcmp(cur_cpu_spec->oprofile_cpu_type, "ppc64/970MP")))
|
||||
return -ENODEV;
|
||||
|
||||
return register_power_pmu(&ppc970_pmu);
|
||||
|
|
|
@ -208,6 +208,9 @@ static noinline __init void detect_machine_type(void)
|
|||
machine_flags |= MACHINE_FLAG_KVM;
|
||||
else
|
||||
machine_flags |= MACHINE_FLAG_VM;
|
||||
|
||||
/* Store machine flags for setting up lowcore early */
|
||||
S390_lowcore.machine_flags = machine_flags;
|
||||
}
|
||||
|
||||
static __init void early_pgm_check_handler(void)
|
||||
|
|
|
@ -386,7 +386,7 @@ no_timer:
|
|||
}
|
||||
__unset_cpu_idle(vcpu);
|
||||
__set_current_state(TASK_RUNNING);
|
||||
remove_wait_queue(&vcpu->wq, &wait);
|
||||
remove_wait_queue(&vcpu->arch.local_int.wq, &wait);
|
||||
spin_unlock_bh(&vcpu->arch.local_int.lock);
|
||||
spin_unlock(&vcpu->arch.local_int.float_int->lock);
|
||||
hrtimer_try_to_cancel(&vcpu->arch.ckc_timer);
|
||||
|
|
|
@ -169,7 +169,7 @@ static int __sigp_set_prefix(struct kvm_vcpu *vcpu, u16 cpu_addr, u32 address,
|
|||
unsigned long *reg)
|
||||
{
|
||||
struct kvm_s390_float_interrupt *fi = &vcpu->kvm->arch.float_int;
|
||||
struct kvm_s390_local_interrupt *li;
|
||||
struct kvm_s390_local_interrupt *li = NULL;
|
||||
struct kvm_s390_interrupt_info *inti;
|
||||
int rc;
|
||||
u8 tmp;
|
||||
|
@ -189,9 +189,10 @@ static int __sigp_set_prefix(struct kvm_vcpu *vcpu, u16 cpu_addr, u32 address,
|
|||
return 2; /* busy */
|
||||
|
||||
spin_lock(&fi->lock);
|
||||
li = fi->local_int[cpu_addr];
|
||||
if (cpu_addr < KVM_MAX_VCPUS)
|
||||
li = fi->local_int[cpu_addr];
|
||||
|
||||
if ((cpu_addr >= KVM_MAX_VCPUS) || (li == NULL)) {
|
||||
if (li == NULL) {
|
||||
rc = 1; /* incorrect state */
|
||||
*reg &= SIGP_STAT_INCORRECT_STATE;
|
||||
kfree(inti);
|
||||
|
|
|
@ -17,11 +17,13 @@ static int x2apic_acpi_madt_oem_check(char *oem_id, char *oem_table_id)
|
|||
return x2apic_enabled();
|
||||
}
|
||||
|
||||
/* Start with all IRQs pointing to boot CPU. IRQ balancing will shift them. */
|
||||
|
||||
/*
|
||||
* need to use more than cpu 0, because we need more vectors when
|
||||
* MSI-X are used.
|
||||
*/
|
||||
static const struct cpumask *x2apic_target_cpus(void)
|
||||
{
|
||||
return cpumask_of(0);
|
||||
return cpu_online_mask;
|
||||
}
|
||||
|
||||
/*
|
||||
|
|
|
@ -27,11 +27,13 @@ static int x2apic_acpi_madt_oem_check(char *oem_id, char *oem_table_id)
|
|||
return 0;
|
||||
}
|
||||
|
||||
/* Start with all IRQs pointing to boot CPU. IRQ balancing will shift them. */
|
||||
|
||||
/*
|
||||
* need to use more than cpu 0, because we need more vectors when
|
||||
* MSI-X are used.
|
||||
*/
|
||||
static const struct cpumask *x2apic_target_cpus(void)
|
||||
{
|
||||
return cpumask_of(0);
|
||||
return cpu_online_mask;
|
||||
}
|
||||
|
||||
static void x2apic_vector_allocation_domain(int cpu, struct cpumask *retmask)
|
||||
|
|
|
@ -354,7 +354,7 @@ void __init efi_init(void)
|
|||
*/
|
||||
c16 = tmp = early_ioremap(efi.systab->fw_vendor, 2);
|
||||
if (c16) {
|
||||
for (i = 0; i < sizeof(vendor) && *c16; ++i)
|
||||
for (i = 0; i < sizeof(vendor) - 1 && *c16; ++i)
|
||||
vendor[i] = *c16++;
|
||||
vendor[i] = '\0';
|
||||
} else
|
||||
|
|
|
@ -405,7 +405,7 @@ EXPORT_SYMBOL(machine_real_restart);
|
|||
#endif /* CONFIG_X86_32 */
|
||||
|
||||
/*
|
||||
* Apple MacBook5,2 (2009 MacBook) needs reboot=p
|
||||
* Some Apple MacBook and MacBookPro's needs reboot=p to be able to reboot
|
||||
*/
|
||||
static int __init set_pci_reboot(const struct dmi_system_id *d)
|
||||
{
|
||||
|
@ -426,6 +426,14 @@ static struct dmi_system_id __initdata pci_reboot_dmi_table[] = {
|
|||
DMI_MATCH(DMI_PRODUCT_NAME, "MacBook5,2"),
|
||||
},
|
||||
},
|
||||
{ /* Handle problems with rebooting on Apple MacBookPro5,1 */
|
||||
.callback = set_pci_reboot,
|
||||
.ident = "Apple MacBookPro5,1",
|
||||
.matches = {
|
||||
DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."),
|
||||
DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro5,1"),
|
||||
},
|
||||
},
|
||||
{ }
|
||||
};
|
||||
|
||||
|
|
|
@ -275,15 +275,20 @@ static unsigned long pit_calibrate_tsc(u32 latch, unsigned long ms, int loopmin)
|
|||
* use the TSC value at the transitions to calculate a pretty
|
||||
* good value for the TSC frequencty.
|
||||
*/
|
||||
static inline int pit_verify_msb(unsigned char val)
|
||||
{
|
||||
/* Ignore LSB */
|
||||
inb(0x42);
|
||||
return inb(0x42) == val;
|
||||
}
|
||||
|
||||
static inline int pit_expect_msb(unsigned char val, u64 *tscp, unsigned long *deltap)
|
||||
{
|
||||
int count;
|
||||
u64 tsc = 0;
|
||||
|
||||
for (count = 0; count < 50000; count++) {
|
||||
/* Ignore LSB */
|
||||
inb(0x42);
|
||||
if (inb(0x42) != val)
|
||||
if (!pit_verify_msb(val))
|
||||
break;
|
||||
tsc = get_cycles();
|
||||
}
|
||||
|
@ -336,8 +341,7 @@ static unsigned long quick_pit_calibrate(void)
|
|||
* to do that is to just read back the 16-bit counter
|
||||
* once from the PIT.
|
||||
*/
|
||||
inb(0x42);
|
||||
inb(0x42);
|
||||
pit_verify_msb(0);
|
||||
|
||||
if (pit_expect_msb(0xff, &tsc, &d1)) {
|
||||
for (i = 1; i <= MAX_QUICK_PIT_ITERATIONS; i++) {
|
||||
|
@ -348,8 +352,19 @@ static unsigned long quick_pit_calibrate(void)
|
|||
* Iterate until the error is less than 500 ppm
|
||||
*/
|
||||
delta -= tsc;
|
||||
if (d1+d2 < delta >> 11)
|
||||
goto success;
|
||||
if (d1+d2 >= delta >> 11)
|
||||
continue;
|
||||
|
||||
/*
|
||||
* Check the PIT one more time to verify that
|
||||
* all TSC reads were stable wrt the PIT.
|
||||
*
|
||||
* This also guarantees serialization of the
|
||||
* last cycle read ('d2') in pit_expect_msb.
|
||||
*/
|
||||
if (!pit_verify_msb(0xfe - i))
|
||||
break;
|
||||
goto success;
|
||||
}
|
||||
}
|
||||
printk("Fast TSC calibration failed\n");
|
||||
|
|
|
@ -441,7 +441,7 @@ vmi_startup_ipi_hook(int phys_apicid, unsigned long start_eip,
|
|||
ap.ds = __USER_DS;
|
||||
ap.es = __USER_DS;
|
||||
ap.fs = __KERNEL_PERCPU;
|
||||
ap.gs = 0;
|
||||
ap.gs = __KERNEL_STACK_CANARY;
|
||||
|
||||
ap.eflags = 0;
|
||||
|
||||
|
|
|
@ -104,6 +104,9 @@ static s64 __kpit_elapsed(struct kvm *kvm)
|
|||
ktime_t remaining;
|
||||
struct kvm_kpit_state *ps = &kvm->arch.vpit->pit_state;
|
||||
|
||||
if (!ps->pit_timer.period)
|
||||
return 0;
|
||||
|
||||
/*
|
||||
* The Counter does not stop when it reaches zero. In
|
||||
* Modes 0, 1, 4, and 5 the Counter ``wraps around'' to
|
||||
|
|
|
@ -489,16 +489,20 @@ static unsigned long *gfn_to_rmap(struct kvm *kvm, gfn_t gfn, int lpage)
|
|||
*
|
||||
* If rmapp bit zero is one, (then rmap & ~1) points to a struct kvm_rmap_desc
|
||||
* containing more mappings.
|
||||
*
|
||||
* Returns the number of rmap entries before the spte was added or zero if
|
||||
* the spte was not added.
|
||||
*
|
||||
*/
|
||||
static void rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn, int lpage)
|
||||
static int rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn, int lpage)
|
||||
{
|
||||
struct kvm_mmu_page *sp;
|
||||
struct kvm_rmap_desc *desc;
|
||||
unsigned long *rmapp;
|
||||
int i;
|
||||
int i, count = 0;
|
||||
|
||||
if (!is_rmap_pte(*spte))
|
||||
return;
|
||||
return count;
|
||||
gfn = unalias_gfn(vcpu->kvm, gfn);
|
||||
sp = page_header(__pa(spte));
|
||||
sp->gfns[spte - sp->spt] = gfn;
|
||||
|
@ -515,8 +519,10 @@ static void rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn, int lpage)
|
|||
} else {
|
||||
rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
|
||||
desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
|
||||
while (desc->shadow_ptes[RMAP_EXT-1] && desc->more)
|
||||
while (desc->shadow_ptes[RMAP_EXT-1] && desc->more) {
|
||||
desc = desc->more;
|
||||
count += RMAP_EXT;
|
||||
}
|
||||
if (desc->shadow_ptes[RMAP_EXT-1]) {
|
||||
desc->more = mmu_alloc_rmap_desc(vcpu);
|
||||
desc = desc->more;
|
||||
|
@ -525,6 +531,7 @@ static void rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn, int lpage)
|
|||
;
|
||||
desc->shadow_ptes[i] = spte;
|
||||
}
|
||||
return count;
|
||||
}
|
||||
|
||||
static void rmap_desc_remove_entry(unsigned long *rmapp,
|
||||
|
@ -754,6 +761,19 @@ static int kvm_age_rmapp(struct kvm *kvm, unsigned long *rmapp)
|
|||
return young;
|
||||
}
|
||||
|
||||
#define RMAP_RECYCLE_THRESHOLD 1000
|
||||
|
||||
static void rmap_recycle(struct kvm_vcpu *vcpu, gfn_t gfn, int lpage)
|
||||
{
|
||||
unsigned long *rmapp;
|
||||
|
||||
gfn = unalias_gfn(vcpu->kvm, gfn);
|
||||
rmapp = gfn_to_rmap(vcpu->kvm, gfn, lpage);
|
||||
|
||||
kvm_unmap_rmapp(vcpu->kvm, rmapp);
|
||||
kvm_flush_remote_tlbs(vcpu->kvm);
|
||||
}
|
||||
|
||||
int kvm_age_hva(struct kvm *kvm, unsigned long hva)
|
||||
{
|
||||
return kvm_handle_hva(kvm, hva, kvm_age_rmapp);
|
||||
|
@ -1407,24 +1427,25 @@ static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp)
|
|||
*/
|
||||
void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages)
|
||||
{
|
||||
int used_pages;
|
||||
|
||||
used_pages = kvm->arch.n_alloc_mmu_pages - kvm->arch.n_free_mmu_pages;
|
||||
used_pages = max(0, used_pages);
|
||||
|
||||
/*
|
||||
* If we set the number of mmu pages to be smaller be than the
|
||||
* number of actived pages , we must to free some mmu pages before we
|
||||
* change the value
|
||||
*/
|
||||
|
||||
if ((kvm->arch.n_alloc_mmu_pages - kvm->arch.n_free_mmu_pages) >
|
||||
kvm_nr_mmu_pages) {
|
||||
int n_used_mmu_pages = kvm->arch.n_alloc_mmu_pages
|
||||
- kvm->arch.n_free_mmu_pages;
|
||||
|
||||
while (n_used_mmu_pages > kvm_nr_mmu_pages) {
|
||||
if (used_pages > kvm_nr_mmu_pages) {
|
||||
while (used_pages > kvm_nr_mmu_pages) {
|
||||
struct kvm_mmu_page *page;
|
||||
|
||||
page = container_of(kvm->arch.active_mmu_pages.prev,
|
||||
struct kvm_mmu_page, link);
|
||||
kvm_mmu_zap_page(kvm, page);
|
||||
n_used_mmu_pages--;
|
||||
used_pages--;
|
||||
}
|
||||
kvm->arch.n_free_mmu_pages = 0;
|
||||
}
|
||||
|
@ -1740,6 +1761,7 @@ static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *shadow_pte,
|
|||
{
|
||||
int was_rmapped = 0;
|
||||
int was_writeble = is_writeble_pte(*shadow_pte);
|
||||
int rmap_count;
|
||||
|
||||
pgprintk("%s: spte %llx access %x write_fault %d"
|
||||
" user_fault %d gfn %lx\n",
|
||||
|
@ -1781,9 +1803,11 @@ static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *shadow_pte,
|
|||
|
||||
page_header_update_slot(vcpu->kvm, shadow_pte, gfn);
|
||||
if (!was_rmapped) {
|
||||
rmap_add(vcpu, shadow_pte, gfn, largepage);
|
||||
rmap_count = rmap_add(vcpu, shadow_pte, gfn, largepage);
|
||||
if (!is_rmap_pte(*shadow_pte))
|
||||
kvm_release_pfn_clean(pfn);
|
||||
if (rmap_count > RMAP_RECYCLE_THRESHOLD)
|
||||
rmap_recycle(vcpu, gfn, largepage);
|
||||
} else {
|
||||
if (was_writeble)
|
||||
kvm_release_pfn_dirty(pfn);
|
||||
|
|
|
@ -711,6 +711,7 @@ static void svm_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
|
|||
svm->vmcb->control.tsc_offset += delta;
|
||||
vcpu->cpu = cpu;
|
||||
kvm_migrate_timers(vcpu);
|
||||
svm->asid_generation = 0;
|
||||
}
|
||||
|
||||
for (i = 0; i < NR_HOST_SAVE_USER_MSRS; i++)
|
||||
|
@ -1031,7 +1032,6 @@ static void new_asid(struct vcpu_svm *svm, struct svm_cpu_data *svm_data)
|
|||
svm->vmcb->control.tlb_ctl = TLB_CONTROL_FLUSH_ALL_ASID;
|
||||
}
|
||||
|
||||
svm->vcpu.cpu = svm_data->cpu;
|
||||
svm->asid_generation = svm_data->asid_generation;
|
||||
svm->vmcb->control.asid = svm_data->next_asid++;
|
||||
}
|
||||
|
@ -2300,8 +2300,8 @@ static void pre_svm_run(struct vcpu_svm *svm)
|
|||
struct svm_cpu_data *svm_data = per_cpu(svm_data, cpu);
|
||||
|
||||
svm->vmcb->control.tlb_ctl = TLB_CONTROL_DO_NOTHING;
|
||||
if (svm->vcpu.cpu != cpu ||
|
||||
svm->asid_generation != svm_data->asid_generation)
|
||||
/* FIXME: handle wraparound of asid_generation */
|
||||
if (svm->asid_generation != svm_data->asid_generation)
|
||||
new_asid(svm, svm_data);
|
||||
}
|
||||
|
||||
|
|
|
@ -3157,8 +3157,8 @@ static void handle_invalid_guest_state(struct kvm_vcpu *vcpu,
|
|||
struct vcpu_vmx *vmx = to_vmx(vcpu);
|
||||
enum emulation_result err = EMULATE_DONE;
|
||||
|
||||
preempt_enable();
|
||||
local_irq_enable();
|
||||
preempt_enable();
|
||||
|
||||
while (!guest_state_valid(vcpu)) {
|
||||
err = emulate_instruction(vcpu, kvm_run, 0, 0, 0);
|
||||
|
@ -3168,7 +3168,7 @@ static void handle_invalid_guest_state(struct kvm_vcpu *vcpu,
|
|||
|
||||
if (err != EMULATE_DONE) {
|
||||
kvm_report_emulation_failure(vcpu, "emulation failure");
|
||||
return;
|
||||
break;
|
||||
}
|
||||
|
||||
if (signal_pending(current))
|
||||
|
@ -3177,8 +3177,8 @@ static void handle_invalid_guest_state(struct kvm_vcpu *vcpu,
|
|||
schedule();
|
||||
}
|
||||
|
||||
local_irq_disable();
|
||||
preempt_disable();
|
||||
local_irq_disable();
|
||||
|
||||
vmx->invalid_state_emulation_result = err;
|
||||
}
|
||||
|
|
|
@ -704,11 +704,48 @@ static bool msr_mtrr_valid(unsigned msr)
|
|||
return false;
|
||||
}
|
||||
|
||||
static bool valid_pat_type(unsigned t)
|
||||
{
|
||||
return t < 8 && (1 << t) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
|
||||
}
|
||||
|
||||
static bool valid_mtrr_type(unsigned t)
|
||||
{
|
||||
return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
|
||||
}
|
||||
|
||||
static bool mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
|
||||
{
|
||||
int i;
|
||||
|
||||
if (!msr_mtrr_valid(msr))
|
||||
return false;
|
||||
|
||||
if (msr == MSR_IA32_CR_PAT) {
|
||||
for (i = 0; i < 8; i++)
|
||||
if (!valid_pat_type((data >> (i * 8)) & 0xff))
|
||||
return false;
|
||||
return true;
|
||||
} else if (msr == MSR_MTRRdefType) {
|
||||
if (data & ~0xcff)
|
||||
return false;
|
||||
return valid_mtrr_type(data & 0xff);
|
||||
} else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
|
||||
for (i = 0; i < 8 ; i++)
|
||||
if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
|
||||
return false;
|
||||
return true;
|
||||
}
|
||||
|
||||
/* variable MTRRs */
|
||||
return valid_mtrr_type(data & 0xff);
|
||||
}
|
||||
|
||||
static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
|
||||
{
|
||||
u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
|
||||
|
||||
if (!msr_mtrr_valid(msr))
|
||||
if (!mtrr_valid(vcpu, msr, data))
|
||||
return 1;
|
||||
|
||||
if (msr == MSR_MTRRdefType) {
|
||||
|
@ -1079,14 +1116,13 @@ long kvm_arch_dev_ioctl(struct file *filp,
|
|||
if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
|
||||
goto out;
|
||||
r = -E2BIG;
|
||||
if (n < num_msrs_to_save)
|
||||
if (n < msr_list.nmsrs)
|
||||
goto out;
|
||||
r = -EFAULT;
|
||||
if (copy_to_user(user_msr_list->indices, &msrs_to_save,
|
||||
num_msrs_to_save * sizeof(u32)))
|
||||
goto out;
|
||||
if (copy_to_user(user_msr_list->indices
|
||||
+ num_msrs_to_save * sizeof(u32),
|
||||
if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
|
||||
&emulated_msrs,
|
||||
ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
|
||||
goto out;
|
||||
|
|
|
@ -144,6 +144,8 @@ static int pty_write(struct tty_struct *tty, const unsigned char *buf,
|
|||
|
||||
static int pty_write_room(struct tty_struct *tty)
|
||||
{
|
||||
if (tty->stopped)
|
||||
return 0;
|
||||
return pty_space(tty->link);
|
||||
}
|
||||
|
||||
|
|
|
@ -566,7 +566,7 @@ int drm_wait_vblank(struct drm_device *dev, void *data,
|
|||
|
||||
ret = drm_vblank_get(dev, crtc);
|
||||
if (ret) {
|
||||
DRM_ERROR("failed to acquire vblank counter, %d\n", ret);
|
||||
DRM_DEBUG("failed to acquire vblank counter, %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
seq = drm_vblank_count(dev, crtc);
|
||||
|
|
|
@ -566,6 +566,8 @@ void drm_mode_connector_list_update(struct drm_connector *connector)
|
|||
found_it = 1;
|
||||
/* if equal delete the probed mode */
|
||||
mode->status = pmode->status;
|
||||
/* Merge type bits together */
|
||||
mode->type |= pmode->type;
|
||||
list_del(&pmode->head);
|
||||
drm_mode_destroy(connector->dev, pmode);
|
||||
break;
|
||||
|
|
|
@ -1186,6 +1186,13 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags)
|
|||
if (ret)
|
||||
goto out_iomapfree;
|
||||
|
||||
dev_priv->wq = create_workqueue("i915");
|
||||
if (dev_priv->wq == NULL) {
|
||||
DRM_ERROR("Failed to create our workqueue.\n");
|
||||
ret = -ENOMEM;
|
||||
goto out_iomapfree;
|
||||
}
|
||||
|
||||
/* enable GEM by default */
|
||||
dev_priv->has_gem = 1;
|
||||
|
||||
|
@ -1211,7 +1218,7 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags)
|
|||
if (!I915_NEED_GFX_HWS(dev)) {
|
||||
ret = i915_init_phys_hws(dev);
|
||||
if (ret != 0)
|
||||
goto out_iomapfree;
|
||||
goto out_workqueue_free;
|
||||
}
|
||||
|
||||
i915_get_mem_freq(dev);
|
||||
|
@ -1245,7 +1252,7 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags)
|
|||
ret = i915_load_modeset_init(dev, prealloc_size, agp_size);
|
||||
if (ret < 0) {
|
||||
DRM_ERROR("failed to init modeset\n");
|
||||
goto out_rmmap;
|
||||
goto out_workqueue_free;
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -1256,6 +1263,8 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags)
|
|||
|
||||
return 0;
|
||||
|
||||
out_workqueue_free:
|
||||
destroy_workqueue(dev_priv->wq);
|
||||
out_iomapfree:
|
||||
io_mapping_free(dev_priv->mm.gtt_mapping);
|
||||
out_rmmap:
|
||||
|
@ -1269,6 +1278,8 @@ int i915_driver_unload(struct drm_device *dev)
|
|||
{
|
||||
struct drm_i915_private *dev_priv = dev->dev_private;
|
||||
|
||||
destroy_workqueue(dev_priv->wq);
|
||||
|
||||
io_mapping_free(dev_priv->mm.gtt_mapping);
|
||||
if (dev_priv->mm.gtt_mtrr >= 0) {
|
||||
mtrr_del(dev_priv->mm.gtt_mtrr, dev->agp->base,
|
||||
|
|
|
@ -219,6 +219,7 @@ typedef struct drm_i915_private {
|
|||
unsigned int lvds_vbt:1;
|
||||
unsigned int int_crt_support:1;
|
||||
unsigned int lvds_use_ssc:1;
|
||||
unsigned int edp_support:1;
|
||||
int lvds_ssc_freq;
|
||||
|
||||
struct drm_i915_fence_reg fence_regs[16]; /* assume 965 */
|
||||
|
@ -229,6 +230,8 @@ typedef struct drm_i915_private {
|
|||
|
||||
spinlock_t error_lock;
|
||||
struct drm_i915_error_state *first_error;
|
||||
struct work_struct error_work;
|
||||
struct workqueue_struct *wq;
|
||||
|
||||
/* Register state */
|
||||
u8 saveLBB;
|
||||
|
@ -888,6 +891,7 @@ extern int i915_wait_ring(struct drm_device * dev, int n, const char *caller);
|
|||
IS_I915GM(dev)))
|
||||
#define SUPPORTS_INTEGRATED_HDMI(dev) (IS_G4X(dev) || IS_IGDNG(dev))
|
||||
#define SUPPORTS_INTEGRATED_DP(dev) (IS_G4X(dev) || IS_IGDNG(dev))
|
||||
#define SUPPORTS_EDP(dev) (IS_IGDNG_M(dev))
|
||||
#define I915_HAS_HOTPLUG(dev) (IS_I945G(dev) || IS_I945GM(dev) || IS_I965G(dev))
|
||||
/* dsparb controlled by hw only */
|
||||
#define DSPARB_HWCONTROL(dev) (IS_G4X(dev) || IS_IGDNG(dev))
|
||||
|
|
|
@ -1570,7 +1570,7 @@ i915_add_request(struct drm_device *dev, struct drm_file *file_priv,
|
|||
}
|
||||
|
||||
if (was_empty && !dev_priv->mm.suspended)
|
||||
schedule_delayed_work(&dev_priv->mm.retire_work, HZ);
|
||||
queue_delayed_work(dev_priv->wq, &dev_priv->mm.retire_work, HZ);
|
||||
return seqno;
|
||||
}
|
||||
|
||||
|
@ -1719,7 +1719,7 @@ i915_gem_retire_work_handler(struct work_struct *work)
|
|||
i915_gem_retire_requests(dev);
|
||||
if (!dev_priv->mm.suspended &&
|
||||
!list_empty(&dev_priv->mm.request_list))
|
||||
schedule_delayed_work(&dev_priv->mm.retire_work, HZ);
|
||||
queue_delayed_work(dev_priv->wq, &dev_priv->mm.retire_work, HZ);
|
||||
mutex_unlock(&dev->struct_mutex);
|
||||
}
|
||||
|
||||
|
|
|
@ -343,6 +343,8 @@ static int i915_error_state(struct seq_file *m, void *unused)
|
|||
|
||||
error = dev_priv->first_error;
|
||||
|
||||
seq_printf(m, "Time: %ld s %ld us\n", error->time.tv_sec,
|
||||
error->time.tv_usec);
|
||||
seq_printf(m, "EIR: 0x%08x\n", error->eir);
|
||||
seq_printf(m, " PGTBL_ER: 0x%08x\n", error->pgtbl_er);
|
||||
seq_printf(m, " INSTPM: 0x%08x\n", error->instpm);
|
||||
|
|
|
@ -190,7 +190,7 @@ u32 i915_get_vblank_counter(struct drm_device *dev, int pipe)
|
|||
low_frame = pipe ? PIPEBFRAMEPIXEL : PIPEAFRAMEPIXEL;
|
||||
|
||||
if (!i915_pipe_enabled(dev, pipe)) {
|
||||
DRM_ERROR("trying to get vblank count for disabled pipe %d\n", pipe);
|
||||
DRM_DEBUG("trying to get vblank count for disabled pipe %d\n", pipe);
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
@ -219,7 +219,7 @@ u32 gm45_get_vblank_counter(struct drm_device *dev, int pipe)
|
|||
int reg = pipe ? PIPEB_FRMCOUNT_GM45 : PIPEA_FRMCOUNT_GM45;
|
||||
|
||||
if (!i915_pipe_enabled(dev, pipe)) {
|
||||
DRM_ERROR("trying to get vblank count for disabled pipe %d\n", pipe);
|
||||
DRM_DEBUG("trying to get vblank count for disabled pipe %d\n", pipe);
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
@ -290,6 +290,35 @@ irqreturn_t igdng_irq_handler(struct drm_device *dev)
|
|||
return ret;
|
||||
}
|
||||
|
||||
/**
|
||||
* i915_error_work_func - do process context error handling work
|
||||
* @work: work struct
|
||||
*
|
||||
* Fire an error uevent so userspace can see that a hang or error
|
||||
* was detected.
|
||||
*/
|
||||
static void i915_error_work_func(struct work_struct *work)
|
||||
{
|
||||
drm_i915_private_t *dev_priv = container_of(work, drm_i915_private_t,
|
||||
error_work);
|
||||
struct drm_device *dev = dev_priv->dev;
|
||||
char *event_string = "ERROR=1";
|
||||
char *envp[] = { event_string, NULL };
|
||||
|
||||
DRM_DEBUG("generating error event\n");
|
||||
|
||||
kobject_uevent_env(&dev->primary->kdev.kobj, KOBJ_CHANGE, envp);
|
||||
}
|
||||
|
||||
/**
|
||||
* i915_capture_error_state - capture an error record for later analysis
|
||||
* @dev: drm device
|
||||
*
|
||||
* Should be called when an error is detected (either a hang or an error
|
||||
* interrupt) to capture error state from the time of the error. Fills
|
||||
* out a structure which becomes available in debugfs for user level tools
|
||||
* to pick up.
|
||||
*/
|
||||
static void i915_capture_error_state(struct drm_device *dev)
|
||||
{
|
||||
struct drm_i915_private *dev_priv = dev->dev_private;
|
||||
|
@ -325,12 +354,137 @@ static void i915_capture_error_state(struct drm_device *dev)
|
|||
error->acthd = I915_READ(ACTHD_I965);
|
||||
}
|
||||
|
||||
do_gettimeofday(&error->time);
|
||||
|
||||
dev_priv->first_error = error;
|
||||
|
||||
out:
|
||||
spin_unlock_irqrestore(&dev_priv->error_lock, flags);
|
||||
}
|
||||
|
||||
/**
|
||||
* i915_handle_error - handle an error interrupt
|
||||
* @dev: drm device
|
||||
*
|
||||
* Do some basic checking of regsiter state at error interrupt time and
|
||||
* dump it to the syslog. Also call i915_capture_error_state() to make
|
||||
* sure we get a record and make it available in debugfs. Fire a uevent
|
||||
* so userspace knows something bad happened (should trigger collection
|
||||
* of a ring dump etc.).
|
||||
*/
|
||||
static void i915_handle_error(struct drm_device *dev)
|
||||
{
|
||||
struct drm_i915_private *dev_priv = dev->dev_private;
|
||||
u32 eir = I915_READ(EIR);
|
||||
u32 pipea_stats = I915_READ(PIPEASTAT);
|
||||
u32 pipeb_stats = I915_READ(PIPEBSTAT);
|
||||
|
||||
i915_capture_error_state(dev);
|
||||
|
||||
printk(KERN_ERR "render error detected, EIR: 0x%08x\n",
|
||||
eir);
|
||||
|
||||
if (IS_G4X(dev)) {
|
||||
if (eir & (GM45_ERROR_MEM_PRIV | GM45_ERROR_CP_PRIV)) {
|
||||
u32 ipeir = I915_READ(IPEIR_I965);
|
||||
|
||||
printk(KERN_ERR " IPEIR: 0x%08x\n",
|
||||
I915_READ(IPEIR_I965));
|
||||
printk(KERN_ERR " IPEHR: 0x%08x\n",
|
||||
I915_READ(IPEHR_I965));
|
||||
printk(KERN_ERR " INSTDONE: 0x%08x\n",
|
||||
I915_READ(INSTDONE_I965));
|
||||
printk(KERN_ERR " INSTPS: 0x%08x\n",
|
||||
I915_READ(INSTPS));
|
||||
printk(KERN_ERR " INSTDONE1: 0x%08x\n",
|
||||
I915_READ(INSTDONE1));
|
||||
printk(KERN_ERR " ACTHD: 0x%08x\n",
|
||||
I915_READ(ACTHD_I965));
|
||||
I915_WRITE(IPEIR_I965, ipeir);
|
||||
(void)I915_READ(IPEIR_I965);
|
||||
}
|
||||
if (eir & GM45_ERROR_PAGE_TABLE) {
|
||||
u32 pgtbl_err = I915_READ(PGTBL_ER);
|
||||
printk(KERN_ERR "page table error\n");
|
||||
printk(KERN_ERR " PGTBL_ER: 0x%08x\n",
|
||||
pgtbl_err);
|
||||
I915_WRITE(PGTBL_ER, pgtbl_err);
|
||||
(void)I915_READ(PGTBL_ER);
|
||||
}
|
||||
}
|
||||
|
||||
if (IS_I9XX(dev)) {
|
||||
if (eir & I915_ERROR_PAGE_TABLE) {
|
||||
u32 pgtbl_err = I915_READ(PGTBL_ER);
|
||||
printk(KERN_ERR "page table error\n");
|
||||
printk(KERN_ERR " PGTBL_ER: 0x%08x\n",
|
||||
pgtbl_err);
|
||||
I915_WRITE(PGTBL_ER, pgtbl_err);
|
||||
(void)I915_READ(PGTBL_ER);
|
||||
}
|
||||
}
|
||||
|
||||
if (eir & I915_ERROR_MEMORY_REFRESH) {
|
||||
printk(KERN_ERR "memory refresh error\n");
|
||||
printk(KERN_ERR "PIPEASTAT: 0x%08x\n",
|
||||
pipea_stats);
|
||||
printk(KERN_ERR "PIPEBSTAT: 0x%08x\n",
|
||||
pipeb_stats);
|
||||
/* pipestat has already been acked */
|
||||
}
|
||||
if (eir & I915_ERROR_INSTRUCTION) {
|
||||
printk(KERN_ERR "instruction error\n");
|
||||
printk(KERN_ERR " INSTPM: 0x%08x\n",
|
||||
I915_READ(INSTPM));
|
||||
if (!IS_I965G(dev)) {
|
||||
u32 ipeir = I915_READ(IPEIR);
|
||||
|
||||
printk(KERN_ERR " IPEIR: 0x%08x\n",
|
||||
I915_READ(IPEIR));
|
||||
printk(KERN_ERR " IPEHR: 0x%08x\n",
|
||||
I915_READ(IPEHR));
|
||||
printk(KERN_ERR " INSTDONE: 0x%08x\n",
|
||||
I915_READ(INSTDONE));
|
||||
printk(KERN_ERR " ACTHD: 0x%08x\n",
|
||||
I915_READ(ACTHD));
|
||||
I915_WRITE(IPEIR, ipeir);
|
||||
(void)I915_READ(IPEIR);
|
||||
} else {
|
||||
u32 ipeir = I915_READ(IPEIR_I965);
|
||||
|
||||
printk(KERN_ERR " IPEIR: 0x%08x\n",
|
||||
I915_READ(IPEIR_I965));
|
||||
printk(KERN_ERR " IPEHR: 0x%08x\n",
|
||||
I915_READ(IPEHR_I965));
|
||||
printk(KERN_ERR " INSTDONE: 0x%08x\n",
|
||||
I915_READ(INSTDONE_I965));
|
||||
printk(KERN_ERR " INSTPS: 0x%08x\n",
|
||||
I915_READ(INSTPS));
|
||||
printk(KERN_ERR " INSTDONE1: 0x%08x\n",
|
||||
I915_READ(INSTDONE1));
|
||||
printk(KERN_ERR " ACTHD: 0x%08x\n",
|
||||
I915_READ(ACTHD_I965));
|
||||
I915_WRITE(IPEIR_I965, ipeir);
|
||||
(void)I915_READ(IPEIR_I965);
|
||||
}
|
||||
}
|
||||
|
||||
I915_WRITE(EIR, eir);
|
||||
(void)I915_READ(EIR);
|
||||
eir = I915_READ(EIR);
|
||||
if (eir) {
|
||||
/*
|
||||
* some errors might have become stuck,
|
||||
* mask them.
|
||||
*/
|
||||
DRM_ERROR("EIR stuck: 0x%08x, masking\n", eir);
|
||||
I915_WRITE(EMR, I915_READ(EMR) | eir);
|
||||
I915_WRITE(IIR, I915_RENDER_COMMAND_PARSER_ERROR_INTERRUPT);
|
||||
}
|
||||
|
||||
queue_work(dev_priv->wq, &dev_priv->error_work);
|
||||
}
|
||||
|
||||
irqreturn_t i915_driver_irq_handler(DRM_IRQ_ARGS)
|
||||
{
|
||||
struct drm_device *dev = (struct drm_device *) arg;
|
||||
|
@ -372,6 +526,9 @@ irqreturn_t i915_driver_irq_handler(DRM_IRQ_ARGS)
|
|||
pipea_stats = I915_READ(PIPEASTAT);
|
||||
pipeb_stats = I915_READ(PIPEBSTAT);
|
||||
|
||||
if (iir & I915_RENDER_COMMAND_PARSER_ERROR_INTERRUPT)
|
||||
i915_handle_error(dev);
|
||||
|
||||
/*
|
||||
* Clear the PIPE(A|B)STAT regs before the IIR
|
||||
*/
|
||||
|
@ -403,86 +560,13 @@ irqreturn_t i915_driver_irq_handler(DRM_IRQ_ARGS)
|
|||
DRM_DEBUG("hotplug event received, stat 0x%08x\n",
|
||||
hotplug_status);
|
||||
if (hotplug_status & dev_priv->hotplug_supported_mask)
|
||||
schedule_work(&dev_priv->hotplug_work);
|
||||
queue_work(dev_priv->wq,
|
||||
&dev_priv->hotplug_work);
|
||||
|
||||
I915_WRITE(PORT_HOTPLUG_STAT, hotplug_status);
|
||||
I915_READ(PORT_HOTPLUG_STAT);
|
||||
}
|
||||
|
||||
if (iir & I915_RENDER_COMMAND_PARSER_ERROR_INTERRUPT) {
|
||||
u32 eir = I915_READ(EIR);
|
||||
|
||||
i915_capture_error_state(dev);
|
||||
|
||||
printk(KERN_ERR "render error detected, EIR: 0x%08x\n",
|
||||
eir);
|
||||
if (eir & I915_ERROR_PAGE_TABLE) {
|
||||
u32 pgtbl_err = I915_READ(PGTBL_ER);
|
||||
printk(KERN_ERR "page table error\n");
|
||||
printk(KERN_ERR " PGTBL_ER: 0x%08x\n",
|
||||
pgtbl_err);
|
||||
I915_WRITE(PGTBL_ER, pgtbl_err);
|
||||
(void)I915_READ(PGTBL_ER);
|
||||
}
|
||||
if (eir & I915_ERROR_MEMORY_REFRESH) {
|
||||
printk(KERN_ERR "memory refresh error\n");
|
||||
printk(KERN_ERR "PIPEASTAT: 0x%08x\n",
|
||||
pipea_stats);
|
||||
printk(KERN_ERR "PIPEBSTAT: 0x%08x\n",
|
||||
pipeb_stats);
|
||||
/* pipestat has already been acked */
|
||||
}
|
||||
if (eir & I915_ERROR_INSTRUCTION) {
|
||||
printk(KERN_ERR "instruction error\n");
|
||||
printk(KERN_ERR " INSTPM: 0x%08x\n",
|
||||
I915_READ(INSTPM));
|
||||
if (!IS_I965G(dev)) {
|
||||
u32 ipeir = I915_READ(IPEIR);
|
||||
|
||||
printk(KERN_ERR " IPEIR: 0x%08x\n",
|
||||
I915_READ(IPEIR));
|
||||
printk(KERN_ERR " IPEHR: 0x%08x\n",
|
||||
I915_READ(IPEHR));
|
||||
printk(KERN_ERR " INSTDONE: 0x%08x\n",
|
||||
I915_READ(INSTDONE));
|
||||
printk(KERN_ERR " ACTHD: 0x%08x\n",
|
||||
I915_READ(ACTHD));
|
||||
I915_WRITE(IPEIR, ipeir);
|
||||
(void)I915_READ(IPEIR);
|
||||
} else {
|
||||
u32 ipeir = I915_READ(IPEIR_I965);
|
||||
|
||||
printk(KERN_ERR " IPEIR: 0x%08x\n",
|
||||
I915_READ(IPEIR_I965));
|
||||
printk(KERN_ERR " IPEHR: 0x%08x\n",
|
||||
I915_READ(IPEHR_I965));
|
||||
printk(KERN_ERR " INSTDONE: 0x%08x\n",
|
||||
I915_READ(INSTDONE_I965));
|
||||
printk(KERN_ERR " INSTPS: 0x%08x\n",
|
||||
I915_READ(INSTPS));
|
||||
printk(KERN_ERR " INSTDONE1: 0x%08x\n",
|
||||
I915_READ(INSTDONE1));
|
||||
printk(KERN_ERR " ACTHD: 0x%08x\n",
|
||||
I915_READ(ACTHD_I965));
|
||||
I915_WRITE(IPEIR_I965, ipeir);
|
||||
(void)I915_READ(IPEIR_I965);
|
||||
}
|
||||
}
|
||||
|
||||
I915_WRITE(EIR, eir);
|
||||
(void)I915_READ(EIR);
|
||||
eir = I915_READ(EIR);
|
||||
if (eir) {
|
||||
/*
|
||||
* some errors might have become stuck,
|
||||
* mask them.
|
||||
*/
|
||||
DRM_ERROR("EIR stuck: 0x%08x, masking\n", eir);
|
||||
I915_WRITE(EMR, I915_READ(EMR) | eir);
|
||||
I915_WRITE(IIR, I915_RENDER_COMMAND_PARSER_ERROR_INTERRUPT);
|
||||
}
|
||||
}
|
||||
|
||||
I915_WRITE(IIR, iir);
|
||||
new_iir = I915_READ(IIR); /* Flush posted writes */
|
||||
|
||||
|
@ -830,6 +914,7 @@ void i915_driver_irq_preinstall(struct drm_device * dev)
|
|||
atomic_set(&dev_priv->irq_received, 0);
|
||||
|
||||
INIT_WORK(&dev_priv->hotplug_work, i915_hotplug_work_func);
|
||||
INIT_WORK(&dev_priv->error_work, i915_error_work_func);
|
||||
|
||||
if (IS_IGDNG(dev)) {
|
||||
igdng_irq_preinstall(dev);
|
||||
|
|
|
@ -1395,6 +1395,7 @@
|
|||
#define TV_V_CHROMA_42 0x684a8
|
||||
|
||||
/* Display Port */
|
||||
#define DP_A 0x64000 /* eDP */
|
||||
#define DP_B 0x64100
|
||||
#define DP_C 0x64200
|
||||
#define DP_D 0x64300
|
||||
|
@ -1437,13 +1438,22 @@
|
|||
/* Mystic DPCD version 1.1 special mode */
|
||||
#define DP_ENHANCED_FRAMING (1 << 18)
|
||||
|
||||
/* eDP */
|
||||
#define DP_PLL_FREQ_270MHZ (0 << 16)
|
||||
#define DP_PLL_FREQ_160MHZ (1 << 16)
|
||||
#define DP_PLL_FREQ_MASK (3 << 16)
|
||||
|
||||
/** locked once port is enabled */
|
||||
#define DP_PORT_REVERSAL (1 << 15)
|
||||
|
||||
/* eDP */
|
||||
#define DP_PLL_ENABLE (1 << 14)
|
||||
|
||||
/** sends the clock on lane 15 of the PEG for debug */
|
||||
#define DP_CLOCK_OUTPUT_ENABLE (1 << 13)
|
||||
|
||||
#define DP_SCRAMBLING_DISABLE (1 << 12)
|
||||
#define DP_SCRAMBLING_DISABLE_IGDNG (1 << 7)
|
||||
|
||||
/** limit RGB values to avoid confusing TVs */
|
||||
#define DP_COLOR_RANGE_16_235 (1 << 8)
|
||||
|
@ -1463,6 +1473,13 @@
|
|||
* is 20 bytes in each direction, hence the 5 fixed
|
||||
* data registers
|
||||
*/
|
||||
#define DPA_AUX_CH_CTL 0x64010
|
||||
#define DPA_AUX_CH_DATA1 0x64014
|
||||
#define DPA_AUX_CH_DATA2 0x64018
|
||||
#define DPA_AUX_CH_DATA3 0x6401c
|
||||
#define DPA_AUX_CH_DATA4 0x64020
|
||||
#define DPA_AUX_CH_DATA5 0x64024
|
||||
|
||||
#define DPB_AUX_CH_CTL 0x64110
|
||||
#define DPB_AUX_CH_DATA1 0x64114
|
||||
#define DPB_AUX_CH_DATA2 0x64118
|
||||
|
@ -1618,7 +1635,7 @@
|
|||
#define I830_FIFO_LINE_SIZE 32
|
||||
#define I945_FIFO_SIZE 127 /* 945 & 965 */
|
||||
#define I915_FIFO_SIZE 95
|
||||
#define I855GM_FIFO_SIZE 255
|
||||
#define I855GM_FIFO_SIZE 127 /* In cachelines */
|
||||
#define I830_FIFO_SIZE 95
|
||||
#define I915_MAX_WM 0x3f
|
||||
|
||||
|
@ -1848,6 +1865,8 @@
|
|||
#define PFA_CTL_1 0x68080
|
||||
#define PFB_CTL_1 0x68880
|
||||
#define PF_ENABLE (1<<31)
|
||||
#define PFA_WIN_SZ 0x68074
|
||||
#define PFB_WIN_SZ 0x68874
|
||||
|
||||
/* legacy palette */
|
||||
#define LGC_PALETTE_A 0x4a000
|
||||
|
@ -2208,4 +2227,28 @@
|
|||
#define PCH_PP_OFF_DELAYS 0xc720c
|
||||
#define PCH_PP_DIVISOR 0xc7210
|
||||
|
||||
#define PCH_DP_B 0xe4100
|
||||
#define PCH_DPB_AUX_CH_CTL 0xe4110
|
||||
#define PCH_DPB_AUX_CH_DATA1 0xe4114
|
||||
#define PCH_DPB_AUX_CH_DATA2 0xe4118
|
||||
#define PCH_DPB_AUX_CH_DATA3 0xe411c
|
||||
#define PCH_DPB_AUX_CH_DATA4 0xe4120
|
||||
#define PCH_DPB_AUX_CH_DATA5 0xe4124
|
||||
|
||||
#define PCH_DP_C 0xe4200
|
||||
#define PCH_DPC_AUX_CH_CTL 0xe4210
|
||||
#define PCH_DPC_AUX_CH_DATA1 0xe4214
|
||||
#define PCH_DPC_AUX_CH_DATA2 0xe4218
|
||||
#define PCH_DPC_AUX_CH_DATA3 0xe421c
|
||||
#define PCH_DPC_AUX_CH_DATA4 0xe4220
|
||||
#define PCH_DPC_AUX_CH_DATA5 0xe4224
|
||||
|
||||
#define PCH_DP_D 0xe4300
|
||||
#define PCH_DPD_AUX_CH_CTL 0xe4310
|
||||
#define PCH_DPD_AUX_CH_DATA1 0xe4314
|
||||
#define PCH_DPD_AUX_CH_DATA2 0xe4318
|
||||
#define PCH_DPD_AUX_CH_DATA3 0xe431c
|
||||
#define PCH_DPD_AUX_CH_DATA4 0xe4320
|
||||
#define PCH_DPD_AUX_CH_DATA5 0xe4324
|
||||
|
||||
#endif /* _I915_REG_H_ */
|
||||
|
|
|
@ -598,7 +598,7 @@ int i915_restore_state(struct drm_device *dev)
|
|||
|
||||
for (i = 0; i < 16; i++) {
|
||||
I915_WRITE(SWF00 + (i << 2), dev_priv->saveSWF0[i]);
|
||||
I915_WRITE(SWF10 + (i << 2), dev_priv->saveSWF1[i+7]);
|
||||
I915_WRITE(SWF10 + (i << 2), dev_priv->saveSWF1[i]);
|
||||
}
|
||||
for (i = 0; i < 3; i++)
|
||||
I915_WRITE(SWF30 + (i << 2), dev_priv->saveSWF2[i]);
|
||||
|
|
|
@ -97,14 +97,13 @@ static void
|
|||
parse_lfp_panel_data(struct drm_i915_private *dev_priv,
|
||||
struct bdb_header *bdb)
|
||||
{
|
||||
struct drm_device *dev = dev_priv->dev;
|
||||
struct bdb_lvds_options *lvds_options;
|
||||
struct bdb_lvds_lfp_data *lvds_lfp_data;
|
||||
struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs;
|
||||
struct bdb_lvds_lfp_data_entry *entry;
|
||||
struct lvds_dvo_timing *dvo_timing;
|
||||
struct drm_display_mode *panel_fixed_mode;
|
||||
int lfp_data_size;
|
||||
int lfp_data_size, dvo_timing_offset;
|
||||
|
||||
/* Defaults if we can't find VBT info */
|
||||
dev_priv->lvds_dither = 0;
|
||||
|
@ -133,14 +132,16 @@ parse_lfp_panel_data(struct drm_i915_private *dev_priv,
|
|||
entry = (struct bdb_lvds_lfp_data_entry *)
|
||||
((uint8_t *)lvds_lfp_data->data + (lfp_data_size *
|
||||
lvds_options->panel_type));
|
||||
dvo_timing_offset = lvds_lfp_data_ptrs->ptr[0].dvo_timing_offset -
|
||||
lvds_lfp_data_ptrs->ptr[0].fp_timing_offset;
|
||||
|
||||
/* On IGDNG mobile, LVDS data block removes panel fitting registers.
|
||||
So dec 2 dword from dvo_timing offset */
|
||||
if (IS_IGDNG(dev))
|
||||
dvo_timing = (struct lvds_dvo_timing *)
|
||||
((u8 *)&entry->dvo_timing - 8);
|
||||
else
|
||||
dvo_timing = &entry->dvo_timing;
|
||||
/*
|
||||
* the size of fp_timing varies on the different platform.
|
||||
* So calculate the DVO timing relative offset in LVDS data
|
||||
* entry to get the DVO timing entry
|
||||
*/
|
||||
dvo_timing = (struct lvds_dvo_timing *)
|
||||
((unsigned char *)entry + dvo_timing_offset);
|
||||
|
||||
panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
|
||||
|
||||
|
@ -295,6 +296,25 @@ parse_sdvo_device_mapping(struct drm_i915_private *dev_priv,
|
|||
}
|
||||
return;
|
||||
}
|
||||
|
||||
static void
|
||||
parse_driver_features(struct drm_i915_private *dev_priv,
|
||||
struct bdb_header *bdb)
|
||||
{
|
||||
struct drm_device *dev = dev_priv->dev;
|
||||
struct bdb_driver_features *driver;
|
||||
|
||||
/* set default for chips without eDP */
|
||||
if (!SUPPORTS_EDP(dev)) {
|
||||
dev_priv->edp_support = 0;
|
||||
return;
|
||||
}
|
||||
|
||||
driver = find_section(bdb, BDB_DRIVER_FEATURES);
|
||||
if (driver && driver->lvds_config == BDB_DRIVER_FEATURE_EDP)
|
||||
dev_priv->edp_support = 1;
|
||||
}
|
||||
|
||||
/**
|
||||
* intel_init_bios - initialize VBIOS settings & find VBT
|
||||
* @dev: DRM device
|
||||
|
@ -345,6 +365,8 @@ intel_init_bios(struct drm_device *dev)
|
|||
parse_lfp_panel_data(dev_priv, bdb);
|
||||
parse_sdvo_panel_data(dev_priv, bdb);
|
||||
parse_sdvo_device_mapping(dev_priv, bdb);
|
||||
parse_driver_features(dev_priv, bdb);
|
||||
|
||||
pci_unmap_rom(pdev, bios);
|
||||
|
||||
return 0;
|
||||
|
|
|
@ -381,6 +381,51 @@ struct bdb_sdvo_lvds_options {
|
|||
} __attribute__((packed));
|
||||
|
||||
|
||||
#define BDB_DRIVER_FEATURE_NO_LVDS 0
|
||||
#define BDB_DRIVER_FEATURE_INT_LVDS 1
|
||||
#define BDB_DRIVER_FEATURE_SDVO_LVDS 2
|
||||
#define BDB_DRIVER_FEATURE_EDP 3
|
||||
|
||||
struct bdb_driver_features {
|
||||
u8 boot_dev_algorithm:1;
|
||||
u8 block_display_switch:1;
|
||||
u8 allow_display_switch:1;
|
||||
u8 hotplug_dvo:1;
|
||||
u8 dual_view_zoom:1;
|
||||
u8 int15h_hook:1;
|
||||
u8 sprite_in_clone:1;
|
||||
u8 primary_lfp_id:1;
|
||||
|
||||
u16 boot_mode_x;
|
||||
u16 boot_mode_y;
|
||||
u8 boot_mode_bpp;
|
||||
u8 boot_mode_refresh;
|
||||
|
||||
u16 enable_lfp_primary:1;
|
||||
u16 selective_mode_pruning:1;
|
||||
u16 dual_frequency:1;
|
||||
u16 render_clock_freq:1; /* 0: high freq; 1: low freq */
|
||||
u16 nt_clone_support:1;
|
||||
u16 power_scheme_ui:1; /* 0: CUI; 1: 3rd party */
|
||||
u16 sprite_display_assign:1; /* 0: secondary; 1: primary */
|
||||
u16 cui_aspect_scaling:1;
|
||||
u16 preserve_aspect_ratio:1;
|
||||
u16 sdvo_device_power_down:1;
|
||||
u16 crt_hotplug:1;
|
||||
u16 lvds_config:2;
|
||||
u16 tv_hotplug:1;
|
||||
u16 hdmi_config:2;
|
||||
|
||||
u8 static_display:1;
|
||||
u8 reserved2:7;
|
||||
u16 legacy_crt_max_x;
|
||||
u16 legacy_crt_max_y;
|
||||
u8 legacy_crt_max_refresh;
|
||||
|
||||
u8 hdmi_termination;
|
||||
u8 custom_vbt_version;
|
||||
} __attribute__((packed));
|
||||
|
||||
bool intel_init_bios(struct drm_device *dev);
|
||||
|
||||
/*
|
||||
|
|
|
@ -156,6 +156,9 @@ static bool intel_igdng_crt_detect_hotplug(struct drm_connector *connector)
|
|||
|
||||
temp = adpa = I915_READ(PCH_ADPA);
|
||||
|
||||
adpa &= ~ADPA_DAC_ENABLE;
|
||||
I915_WRITE(PCH_ADPA, adpa);
|
||||
|
||||
adpa &= ~ADPA_CRT_HOTPLUG_MASK;
|
||||
|
||||
adpa |= (ADPA_CRT_HOTPLUG_PERIOD_128 |
|
||||
|
@ -169,13 +172,14 @@ static bool intel_igdng_crt_detect_hotplug(struct drm_connector *connector)
|
|||
DRM_DEBUG("pch crt adpa 0x%x", adpa);
|
||||
I915_WRITE(PCH_ADPA, adpa);
|
||||
|
||||
/* This might not be needed as not specified in spec...*/
|
||||
udelay(1000);
|
||||
while ((I915_READ(PCH_ADPA) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER) != 0)
|
||||
;
|
||||
|
||||
/* Check the status to see if both blue and green are on now */
|
||||
adpa = I915_READ(PCH_ADPA);
|
||||
if ((adpa & ADPA_CRT_HOTPLUG_MONITOR_MASK) ==
|
||||
ADPA_CRT_HOTPLUG_MONITOR_COLOR)
|
||||
adpa &= ADPA_CRT_HOTPLUG_MONITOR_MASK;
|
||||
if ((adpa == ADPA_CRT_HOTPLUG_MONITOR_COLOR) ||
|
||||
(adpa == ADPA_CRT_HOTPLUG_MONITOR_MONO))
|
||||
ret = true;
|
||||
else
|
||||
ret = false;
|
||||
|
|
Разница между файлами не показана из-за своего большого размера
Загрузить разницу
|
@ -40,6 +40,8 @@
|
|||
|
||||
#define DP_LINK_CONFIGURATION_SIZE 9
|
||||
|
||||
#define IS_eDP(i) ((i)->type == INTEL_OUTPUT_EDP)
|
||||
|
||||
struct intel_dp_priv {
|
||||
uint32_t output_reg;
|
||||
uint32_t DP;
|
||||
|
@ -63,6 +65,19 @@ intel_dp_link_train(struct intel_output *intel_output, uint32_t DP,
|
|||
static void
|
||||
intel_dp_link_down(struct intel_output *intel_output, uint32_t DP);
|
||||
|
||||
void
|
||||
intel_edp_link_config (struct intel_output *intel_output,
|
||||
int *lane_num, int *link_bw)
|
||||
{
|
||||
struct intel_dp_priv *dp_priv = intel_output->dev_priv;
|
||||
|
||||
*lane_num = dp_priv->lane_count;
|
||||
if (dp_priv->link_bw == DP_LINK_BW_1_62)
|
||||
*link_bw = 162000;
|
||||
else if (dp_priv->link_bw == DP_LINK_BW_2_7)
|
||||
*link_bw = 270000;
|
||||
}
|
||||
|
||||
static int
|
||||
intel_dp_max_lane_count(struct intel_output *intel_output)
|
||||
{
|
||||
|
@ -206,7 +221,13 @@ intel_dp_aux_ch(struct intel_output *intel_output,
|
|||
* and would like to run at 2MHz. So, take the
|
||||
* hrawclk value and divide by 2 and use that
|
||||
*/
|
||||
aux_clock_divider = intel_hrawclk(dev) / 2;
|
||||
if (IS_eDP(intel_output))
|
||||
aux_clock_divider = 225; /* eDP input clock at 450Mhz */
|
||||
else if (IS_IGDNG(dev))
|
||||
aux_clock_divider = 62; /* IGDNG: input clock fixed at 125Mhz */
|
||||
else
|
||||
aux_clock_divider = intel_hrawclk(dev) / 2;
|
||||
|
||||
/* Must try at least 3 times according to DP spec */
|
||||
for (try = 0; try < 5; try++) {
|
||||
/* Load the send data into the aux channel data registers */
|
||||
|
@ -236,7 +257,7 @@ intel_dp_aux_ch(struct intel_output *intel_output,
|
|||
}
|
||||
|
||||
/* Clear done status and any errors */
|
||||
I915_WRITE(ch_ctl, (ctl |
|
||||
I915_WRITE(ch_ctl, (status |
|
||||
DP_AUX_CH_CTL_DONE |
|
||||
DP_AUX_CH_CTL_TIME_OUT_ERROR |
|
||||
DP_AUX_CH_CTL_RECEIVE_ERROR));
|
||||
|
@ -295,7 +316,7 @@ intel_dp_aux_native_write(struct intel_output *intel_output,
|
|||
return -1;
|
||||
msg[0] = AUX_NATIVE_WRITE << 4;
|
||||
msg[1] = address >> 8;
|
||||
msg[2] = address;
|
||||
msg[2] = address & 0xff;
|
||||
msg[3] = send_bytes - 1;
|
||||
memcpy(&msg[4], send, send_bytes);
|
||||
msg_bytes = send_bytes + 4;
|
||||
|
@ -387,8 +408,8 @@ intel_dp_i2c_init(struct intel_output *intel_output, const char *name)
|
|||
memset(&dp_priv->adapter, '\0', sizeof (dp_priv->adapter));
|
||||
dp_priv->adapter.owner = THIS_MODULE;
|
||||
dp_priv->adapter.class = I2C_CLASS_DDC;
|
||||
strncpy (dp_priv->adapter.name, name, sizeof dp_priv->adapter.name - 1);
|
||||
dp_priv->adapter.name[sizeof dp_priv->adapter.name - 1] = '\0';
|
||||
strncpy (dp_priv->adapter.name, name, sizeof(dp_priv->adapter.name) - 1);
|
||||
dp_priv->adapter.name[sizeof(dp_priv->adapter.name) - 1] = '\0';
|
||||
dp_priv->adapter.algo_data = &dp_priv->algo;
|
||||
dp_priv->adapter.dev.parent = &intel_output->base.kdev;
|
||||
|
||||
|
@ -493,22 +514,40 @@ intel_dp_set_m_n(struct drm_crtc *crtc, struct drm_display_mode *mode,
|
|||
intel_dp_compute_m_n(3, lane_count,
|
||||
mode->clock, adjusted_mode->clock, &m_n);
|
||||
|
||||
if (intel_crtc->pipe == 0) {
|
||||
I915_WRITE(PIPEA_GMCH_DATA_M,
|
||||
((m_n.tu - 1) << PIPE_GMCH_DATA_M_TU_SIZE_SHIFT) |
|
||||
m_n.gmch_m);
|
||||
I915_WRITE(PIPEA_GMCH_DATA_N,
|
||||
m_n.gmch_n);
|
||||
I915_WRITE(PIPEA_DP_LINK_M, m_n.link_m);
|
||||
I915_WRITE(PIPEA_DP_LINK_N, m_n.link_n);
|
||||
if (IS_IGDNG(dev)) {
|
||||
if (intel_crtc->pipe == 0) {
|
||||
I915_WRITE(TRANSA_DATA_M1,
|
||||
((m_n.tu - 1) << PIPE_GMCH_DATA_M_TU_SIZE_SHIFT) |
|
||||
m_n.gmch_m);
|
||||
I915_WRITE(TRANSA_DATA_N1, m_n.gmch_n);
|
||||
I915_WRITE(TRANSA_DP_LINK_M1, m_n.link_m);
|
||||
I915_WRITE(TRANSA_DP_LINK_N1, m_n.link_n);
|
||||
} else {
|
||||
I915_WRITE(TRANSB_DATA_M1,
|
||||
((m_n.tu - 1) << PIPE_GMCH_DATA_M_TU_SIZE_SHIFT) |
|
||||
m_n.gmch_m);
|
||||
I915_WRITE(TRANSB_DATA_N1, m_n.gmch_n);
|
||||
I915_WRITE(TRANSB_DP_LINK_M1, m_n.link_m);
|
||||
I915_WRITE(TRANSB_DP_LINK_N1, m_n.link_n);
|
||||
}
|
||||
} else {
|
||||
I915_WRITE(PIPEB_GMCH_DATA_M,
|
||||
((m_n.tu - 1) << PIPE_GMCH_DATA_M_TU_SIZE_SHIFT) |
|
||||
m_n.gmch_m);
|
||||
I915_WRITE(PIPEB_GMCH_DATA_N,
|
||||
m_n.gmch_n);
|
||||
I915_WRITE(PIPEB_DP_LINK_M, m_n.link_m);
|
||||
I915_WRITE(PIPEB_DP_LINK_N, m_n.link_n);
|
||||
if (intel_crtc->pipe == 0) {
|
||||
I915_WRITE(PIPEA_GMCH_DATA_M,
|
||||
((m_n.tu - 1) << PIPE_GMCH_DATA_M_TU_SIZE_SHIFT) |
|
||||
m_n.gmch_m);
|
||||
I915_WRITE(PIPEA_GMCH_DATA_N,
|
||||
m_n.gmch_n);
|
||||
I915_WRITE(PIPEA_DP_LINK_M, m_n.link_m);
|
||||
I915_WRITE(PIPEA_DP_LINK_N, m_n.link_n);
|
||||
} else {
|
||||
I915_WRITE(PIPEB_GMCH_DATA_M,
|
||||
((m_n.tu - 1) << PIPE_GMCH_DATA_M_TU_SIZE_SHIFT) |
|
||||
m_n.gmch_m);
|
||||
I915_WRITE(PIPEB_GMCH_DATA_N,
|
||||
m_n.gmch_n);
|
||||
I915_WRITE(PIPEB_DP_LINK_M, m_n.link_m);
|
||||
I915_WRITE(PIPEB_DP_LINK_N, m_n.link_n);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -556,8 +595,38 @@ intel_dp_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode,
|
|||
|
||||
if (intel_crtc->pipe == 1)
|
||||
dp_priv->DP |= DP_PIPEB_SELECT;
|
||||
|
||||
if (IS_eDP(intel_output)) {
|
||||
/* don't miss out required setting for eDP */
|
||||
dp_priv->DP |= DP_PLL_ENABLE;
|
||||
if (adjusted_mode->clock < 200000)
|
||||
dp_priv->DP |= DP_PLL_FREQ_160MHZ;
|
||||
else
|
||||
dp_priv->DP |= DP_PLL_FREQ_270MHZ;
|
||||
}
|
||||
}
|
||||
|
||||
static void igdng_edp_backlight_on (struct drm_device *dev)
|
||||
{
|
||||
struct drm_i915_private *dev_priv = dev->dev_private;
|
||||
u32 pp;
|
||||
|
||||
DRM_DEBUG("\n");
|
||||
pp = I915_READ(PCH_PP_CONTROL);
|
||||
pp |= EDP_BLC_ENABLE;
|
||||
I915_WRITE(PCH_PP_CONTROL, pp);
|
||||
}
|
||||
|
||||
static void igdng_edp_backlight_off (struct drm_device *dev)
|
||||
{
|
||||
struct drm_i915_private *dev_priv = dev->dev_private;
|
||||
u32 pp;
|
||||
|
||||
DRM_DEBUG("\n");
|
||||
pp = I915_READ(PCH_PP_CONTROL);
|
||||
pp &= ~EDP_BLC_ENABLE;
|
||||
I915_WRITE(PCH_PP_CONTROL, pp);
|
||||
}
|
||||
|
||||
static void
|
||||
intel_dp_dpms(struct drm_encoder *encoder, int mode)
|
||||
|
@ -569,11 +638,17 @@ intel_dp_dpms(struct drm_encoder *encoder, int mode)
|
|||
uint32_t dp_reg = I915_READ(dp_priv->output_reg);
|
||||
|
||||
if (mode != DRM_MODE_DPMS_ON) {
|
||||
if (dp_reg & DP_PORT_EN)
|
||||
if (dp_reg & DP_PORT_EN) {
|
||||
intel_dp_link_down(intel_output, dp_priv->DP);
|
||||
if (IS_eDP(intel_output))
|
||||
igdng_edp_backlight_off(dev);
|
||||
}
|
||||
} else {
|
||||
if (!(dp_reg & DP_PORT_EN))
|
||||
if (!(dp_reg & DP_PORT_EN)) {
|
||||
intel_dp_link_train(intel_output, dp_priv->DP, dp_priv->link_configuration);
|
||||
if (IS_eDP(intel_output))
|
||||
igdng_edp_backlight_on(dev);
|
||||
}
|
||||
}
|
||||
dp_priv->dpms_mode = mode;
|
||||
}
|
||||
|
@ -935,6 +1010,23 @@ intel_dp_link_down(struct intel_output *intel_output, uint32_t DP)
|
|||
struct drm_i915_private *dev_priv = dev->dev_private;
|
||||
struct intel_dp_priv *dp_priv = intel_output->dev_priv;
|
||||
|
||||
DRM_DEBUG("\n");
|
||||
|
||||
if (IS_eDP(intel_output)) {
|
||||
DP &= ~DP_PLL_ENABLE;
|
||||
I915_WRITE(dp_priv->output_reg, DP);
|
||||
POSTING_READ(dp_priv->output_reg);
|
||||
udelay(100);
|
||||
}
|
||||
|
||||
DP &= ~DP_LINK_TRAIN_MASK;
|
||||
I915_WRITE(dp_priv->output_reg, DP | DP_LINK_TRAIN_PAT_IDLE);
|
||||
POSTING_READ(dp_priv->output_reg);
|
||||
|
||||
udelay(17000);
|
||||
|
||||
if (IS_eDP(intel_output))
|
||||
DP |= DP_LINK_TRAIN_OFF;
|
||||
I915_WRITE(dp_priv->output_reg, DP & ~DP_PORT_EN);
|
||||
POSTING_READ(dp_priv->output_reg);
|
||||
}
|
||||
|
@ -978,6 +1070,24 @@ intel_dp_check_link_status(struct intel_output *intel_output)
|
|||
intel_dp_link_train(intel_output, dp_priv->DP, dp_priv->link_configuration);
|
||||
}
|
||||
|
||||
static enum drm_connector_status
|
||||
igdng_dp_detect(struct drm_connector *connector)
|
||||
{
|
||||
struct intel_output *intel_output = to_intel_output(connector);
|
||||
struct intel_dp_priv *dp_priv = intel_output->dev_priv;
|
||||
enum drm_connector_status status;
|
||||
|
||||
status = connector_status_disconnected;
|
||||
if (intel_dp_aux_native_read(intel_output,
|
||||
0x000, dp_priv->dpcd,
|
||||
sizeof (dp_priv->dpcd)) == sizeof (dp_priv->dpcd))
|
||||
{
|
||||
if (dp_priv->dpcd[0] != 0)
|
||||
status = connector_status_connected;
|
||||
}
|
||||
return status;
|
||||
}
|
||||
|
||||
/**
|
||||
* Uses CRT_HOTPLUG_EN and CRT_HOTPLUG_STAT to detect DP connection.
|
||||
*
|
||||
|
@ -996,6 +1106,9 @@ intel_dp_detect(struct drm_connector *connector)
|
|||
|
||||
dp_priv->has_audio = false;
|
||||
|
||||
if (IS_IGDNG(dev))
|
||||
return igdng_dp_detect(connector);
|
||||
|
||||
temp = I915_READ(PORT_HOTPLUG_EN);
|
||||
|
||||
I915_WRITE(PORT_HOTPLUG_EN,
|
||||
|
@ -1039,11 +1152,27 @@ intel_dp_detect(struct drm_connector *connector)
|
|||
static int intel_dp_get_modes(struct drm_connector *connector)
|
||||
{
|
||||
struct intel_output *intel_output = to_intel_output(connector);
|
||||
struct drm_device *dev = intel_output->base.dev;
|
||||
struct drm_i915_private *dev_priv = dev->dev_private;
|
||||
int ret;
|
||||
|
||||
/* We should parse the EDID data and find out if it has an audio sink
|
||||
*/
|
||||
|
||||
return intel_ddc_get_modes(intel_output);
|
||||
ret = intel_ddc_get_modes(intel_output);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
/* if eDP has no EDID, try to use fixed panel mode from VBT */
|
||||
if (IS_eDP(intel_output)) {
|
||||
if (dev_priv->panel_fixed_mode != NULL) {
|
||||
struct drm_display_mode *mode;
|
||||
mode = drm_mode_duplicate(dev, dev_priv->panel_fixed_mode);
|
||||
drm_mode_probed_add(connector, mode);
|
||||
return 1;
|
||||
}
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void
|
||||
|
@ -1106,6 +1235,7 @@ intel_dp_init(struct drm_device *dev, int output_reg)
|
|||
struct drm_connector *connector;
|
||||
struct intel_output *intel_output;
|
||||
struct intel_dp_priv *dp_priv;
|
||||
const char *name = NULL;
|
||||
|
||||
intel_output = kcalloc(sizeof(struct intel_output) +
|
||||
sizeof(struct intel_dp_priv), 1, GFP_KERNEL);
|
||||
|
@ -1119,7 +1249,10 @@ intel_dp_init(struct drm_device *dev, int output_reg)
|
|||
DRM_MODE_CONNECTOR_DisplayPort);
|
||||
drm_connector_helper_add(connector, &intel_dp_connector_helper_funcs);
|
||||
|
||||
intel_output->type = INTEL_OUTPUT_DISPLAYPORT;
|
||||
if (output_reg == DP_A)
|
||||
intel_output->type = INTEL_OUTPUT_EDP;
|
||||
else
|
||||
intel_output->type = INTEL_OUTPUT_DISPLAYPORT;
|
||||
|
||||
connector->interlace_allowed = true;
|
||||
connector->doublescan_allowed = 0;
|
||||
|
@ -1139,12 +1272,41 @@ intel_dp_init(struct drm_device *dev, int output_reg)
|
|||
drm_sysfs_connector_add(connector);
|
||||
|
||||
/* Set up the DDC bus. */
|
||||
intel_dp_i2c_init(intel_output,
|
||||
(output_reg == DP_B) ? "DPDDC-B" :
|
||||
(output_reg == DP_C) ? "DPDDC-C" : "DPDDC-D");
|
||||
switch (output_reg) {
|
||||
case DP_A:
|
||||
name = "DPDDC-A";
|
||||
break;
|
||||
case DP_B:
|
||||
case PCH_DP_B:
|
||||
name = "DPDDC-B";
|
||||
break;
|
||||
case DP_C:
|
||||
case PCH_DP_C:
|
||||
name = "DPDDC-C";
|
||||
break;
|
||||
case DP_D:
|
||||
case PCH_DP_D:
|
||||
name = "DPDDC-D";
|
||||
break;
|
||||
}
|
||||
|
||||
intel_dp_i2c_init(intel_output, name);
|
||||
|
||||
intel_output->ddc_bus = &dp_priv->adapter;
|
||||
intel_output->hot_plug = intel_dp_hot_plug;
|
||||
|
||||
if (output_reg == DP_A) {
|
||||
/* initialize panel mode from VBT if available for eDP */
|
||||
if (dev_priv->lfp_lvds_vbt_mode) {
|
||||
dev_priv->panel_fixed_mode =
|
||||
drm_mode_duplicate(dev, dev_priv->lfp_lvds_vbt_mode);
|
||||
if (dev_priv->panel_fixed_mode) {
|
||||
dev_priv->panel_fixed_mode->type |=
|
||||
DRM_MODE_TYPE_PREFERRED;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/* For G4X desktop chip, PEG_BAND_GAP_DATA 3:0 must first be written
|
||||
* 0xd. Failure to do so will result in spurious interrupts being
|
||||
* generated on the port when a cable is not attached.
|
||||
|
|
|
@ -55,6 +55,7 @@
|
|||
#define INTEL_OUTPUT_TVOUT 5
|
||||
#define INTEL_OUTPUT_HDMI 6
|
||||
#define INTEL_OUTPUT_DISPLAYPORT 7
|
||||
#define INTEL_OUTPUT_EDP 8
|
||||
|
||||
#define INTEL_DVO_CHIP_NONE 0
|
||||
#define INTEL_DVO_CHIP_LVDS 1
|
||||
|
@ -121,6 +122,8 @@ extern void intel_dp_init(struct drm_device *dev, int dp_reg);
|
|||
void
|
||||
intel_dp_set_m_n(struct drm_crtc *crtc, struct drm_display_mode *mode,
|
||||
struct drm_display_mode *adjusted_mode);
|
||||
extern void intel_edp_link_config (struct intel_output *, int *, int *);
|
||||
|
||||
|
||||
extern void intel_crtc_load_lut(struct drm_crtc *crtc);
|
||||
extern void intel_encoder_prepare (struct drm_encoder *encoder);
|
||||
|
|
|
@ -130,16 +130,17 @@ static bool intel_hdmi_mode_fixup(struct drm_encoder *encoder,
|
|||
}
|
||||
|
||||
static enum drm_connector_status
|
||||
intel_hdmi_edid_detect(struct drm_connector *connector)
|
||||
intel_hdmi_detect(struct drm_connector *connector)
|
||||
{
|
||||
struct intel_output *intel_output = to_intel_output(connector);
|
||||
struct intel_hdmi_priv *hdmi_priv = intel_output->dev_priv;
|
||||
struct edid *edid = NULL;
|
||||
enum drm_connector_status status = connector_status_disconnected;
|
||||
|
||||
hdmi_priv->has_hdmi_sink = false;
|
||||
edid = drm_get_edid(&intel_output->base,
|
||||
intel_output->ddc_bus);
|
||||
hdmi_priv->has_hdmi_sink = false;
|
||||
|
||||
if (edid) {
|
||||
if (edid->input & DRM_EDID_INPUT_DIGITAL) {
|
||||
status = connector_status_connected;
|
||||
|
@ -148,67 +149,10 @@ intel_hdmi_edid_detect(struct drm_connector *connector)
|
|||
intel_output->base.display_info.raw_edid = NULL;
|
||||
kfree(edid);
|
||||
}
|
||||
|
||||
return status;
|
||||
}
|
||||
|
||||
static enum drm_connector_status
|
||||
igdng_hdmi_detect(struct drm_connector *connector)
|
||||
{
|
||||
struct intel_output *intel_output = to_intel_output(connector);
|
||||
struct intel_hdmi_priv *hdmi_priv = intel_output->dev_priv;
|
||||
|
||||
/* FIXME hotplug detect */
|
||||
|
||||
hdmi_priv->has_hdmi_sink = false;
|
||||
return intel_hdmi_edid_detect(connector);
|
||||
}
|
||||
|
||||
static enum drm_connector_status
|
||||
intel_hdmi_detect(struct drm_connector *connector)
|
||||
{
|
||||
struct drm_device *dev = connector->dev;
|
||||
struct drm_i915_private *dev_priv = dev->dev_private;
|
||||
struct intel_output *intel_output = to_intel_output(connector);
|
||||
struct intel_hdmi_priv *hdmi_priv = intel_output->dev_priv;
|
||||
u32 temp, bit;
|
||||
|
||||
if (IS_IGDNG(dev))
|
||||
return igdng_hdmi_detect(connector);
|
||||
|
||||
temp = I915_READ(PORT_HOTPLUG_EN);
|
||||
|
||||
switch (hdmi_priv->sdvox_reg) {
|
||||
case SDVOB:
|
||||
temp |= HDMIB_HOTPLUG_INT_EN;
|
||||
break;
|
||||
case SDVOC:
|
||||
temp |= HDMIC_HOTPLUG_INT_EN;
|
||||
break;
|
||||
default:
|
||||
return connector_status_unknown;
|
||||
}
|
||||
|
||||
I915_WRITE(PORT_HOTPLUG_EN, temp);
|
||||
|
||||
POSTING_READ(PORT_HOTPLUG_EN);
|
||||
|
||||
switch (hdmi_priv->sdvox_reg) {
|
||||
case SDVOB:
|
||||
bit = HDMIB_HOTPLUG_INT_STATUS;
|
||||
break;
|
||||
case SDVOC:
|
||||
bit = HDMIC_HOTPLUG_INT_STATUS;
|
||||
break;
|
||||
default:
|
||||
return connector_status_unknown;
|
||||
}
|
||||
|
||||
if ((I915_READ(PORT_HOTPLUG_STAT) & bit) != 0)
|
||||
return intel_hdmi_edid_detect(connector);
|
||||
else
|
||||
return connector_status_disconnected;
|
||||
}
|
||||
|
||||
static int intel_hdmi_get_modes(struct drm_connector *connector)
|
||||
{
|
||||
struct intel_output *intel_output = to_intel_output(connector);
|
||||
|
|
|
@ -778,6 +778,14 @@ static const struct dmi_system_id intel_no_lvds[] = {
|
|||
DMI_MATCH(DMI_PRODUCT_NAME, "i965GMx-IF"),
|
||||
},
|
||||
},
|
||||
{
|
||||
.callback = intel_no_lvds_dmi_callback,
|
||||
.ident = "AOpen Mini PC MP915",
|
||||
.matches = {
|
||||
DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
|
||||
DMI_MATCH(DMI_BOARD_NAME, "i915GMx-F"),
|
||||
},
|
||||
},
|
||||
{
|
||||
.callback = intel_no_lvds_dmi_callback,
|
||||
.ident = "Aopen i945GTt-VFA",
|
||||
|
@ -884,6 +892,10 @@ void intel_lvds_init(struct drm_device *dev)
|
|||
if (IS_IGDNG(dev)) {
|
||||
if ((I915_READ(PCH_LVDS) & LVDS_DETECTED) == 0)
|
||||
return;
|
||||
if (dev_priv->edp_support) {
|
||||
DRM_DEBUG("disable LVDS for eDP support\n");
|
||||
return;
|
||||
}
|
||||
gpio = PCH_GPIOC;
|
||||
}
|
||||
|
||||
|
|
|
@ -31,6 +31,7 @@
|
|||
#include "drm.h"
|
||||
#include "drm_crtc.h"
|
||||
#include "intel_drv.h"
|
||||
#include "drm_edid.h"
|
||||
#include "i915_drm.h"
|
||||
#include "i915_drv.h"
|
||||
#include "intel_sdvo_regs.h"
|
||||
|
@ -55,6 +56,12 @@ struct intel_sdvo_priv {
|
|||
/* Pixel clock limitations reported by the SDVO device, in kHz */
|
||||
int pixel_clock_min, pixel_clock_max;
|
||||
|
||||
/*
|
||||
* For multiple function SDVO device,
|
||||
* this is for current attached outputs.
|
||||
*/
|
||||
uint16_t attached_output;
|
||||
|
||||
/**
|
||||
* This is set if we're going to treat the device as TV-out.
|
||||
*
|
||||
|
@ -114,6 +121,9 @@ struct intel_sdvo_priv {
|
|||
u32 save_SDVOX;
|
||||
};
|
||||
|
||||
static bool
|
||||
intel_sdvo_output_setup(struct intel_output *intel_output, uint16_t flags);
|
||||
|
||||
/**
|
||||
* Writes the SDVOB or SDVOC with the given value, but always writes both
|
||||
* SDVOB and SDVOC to work around apparent hardware issues (according to
|
||||
|
@ -1435,41 +1445,96 @@ void intel_sdvo_set_hotplug(struct drm_connector *connector, int on)
|
|||
intel_sdvo_read_response(intel_output, &response, 2);
|
||||
}
|
||||
|
||||
static void
|
||||
intel_sdvo_hdmi_sink_detect(struct drm_connector *connector)
|
||||
static bool
|
||||
intel_sdvo_multifunc_encoder(struct intel_output *intel_output)
|
||||
{
|
||||
struct intel_sdvo_priv *sdvo_priv = intel_output->dev_priv;
|
||||
int caps = 0;
|
||||
|
||||
if (sdvo_priv->caps.output_flags &
|
||||
(SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1))
|
||||
caps++;
|
||||
if (sdvo_priv->caps.output_flags &
|
||||
(SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1))
|
||||
caps++;
|
||||
if (sdvo_priv->caps.output_flags &
|
||||
(SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_SVID0))
|
||||
caps++;
|
||||
if (sdvo_priv->caps.output_flags &
|
||||
(SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_CVBS1))
|
||||
caps++;
|
||||
if (sdvo_priv->caps.output_flags &
|
||||
(SDVO_OUTPUT_YPRPB0 | SDVO_OUTPUT_YPRPB1))
|
||||
caps++;
|
||||
|
||||
if (sdvo_priv->caps.output_flags &
|
||||
(SDVO_OUTPUT_SCART0 | SDVO_OUTPUT_SCART1))
|
||||
caps++;
|
||||
|
||||
if (sdvo_priv->caps.output_flags &
|
||||
(SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1))
|
||||
caps++;
|
||||
|
||||
return (caps > 1);
|
||||
}
|
||||
|
||||
enum drm_connector_status
|
||||
intel_sdvo_hdmi_sink_detect(struct drm_connector *connector, u16 response)
|
||||
{
|
||||
struct intel_output *intel_output = to_intel_output(connector);
|
||||
struct intel_sdvo_priv *sdvo_priv = intel_output->dev_priv;
|
||||
enum drm_connector_status status = connector_status_connected;
|
||||
struct edid *edid = NULL;
|
||||
|
||||
edid = drm_get_edid(&intel_output->base,
|
||||
intel_output->ddc_bus);
|
||||
if (edid != NULL) {
|
||||
sdvo_priv->is_hdmi = drm_detect_hdmi_monitor(edid);
|
||||
/* Don't report the output as connected if it's a DVI-I
|
||||
* connector with a non-digital EDID coming out.
|
||||
*/
|
||||
if (response & (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)) {
|
||||
if (edid->input & DRM_EDID_INPUT_DIGITAL)
|
||||
sdvo_priv->is_hdmi =
|
||||
drm_detect_hdmi_monitor(edid);
|
||||
else
|
||||
status = connector_status_disconnected;
|
||||
}
|
||||
|
||||
kfree(edid);
|
||||
intel_output->base.display_info.raw_edid = NULL;
|
||||
}
|
||||
|
||||
} else if (response & (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1))
|
||||
status = connector_status_disconnected;
|
||||
|
||||
return status;
|
||||
}
|
||||
|
||||
static enum drm_connector_status intel_sdvo_detect(struct drm_connector *connector)
|
||||
{
|
||||
u8 response[2];
|
||||
uint16_t response;
|
||||
u8 status;
|
||||
struct intel_output *intel_output = to_intel_output(connector);
|
||||
struct intel_sdvo_priv *sdvo_priv = intel_output->dev_priv;
|
||||
|
||||
intel_sdvo_write_cmd(intel_output, SDVO_CMD_GET_ATTACHED_DISPLAYS, NULL, 0);
|
||||
status = intel_sdvo_read_response(intel_output, &response, 2);
|
||||
|
||||
DRM_DEBUG("SDVO response %d %d\n", response[0], response[1]);
|
||||
DRM_DEBUG("SDVO response %d %d\n", response & 0xff, response >> 8);
|
||||
|
||||
if (status != SDVO_CMD_STATUS_SUCCESS)
|
||||
return connector_status_unknown;
|
||||
|
||||
if ((response[0] != 0) || (response[1] != 0)) {
|
||||
intel_sdvo_hdmi_sink_detect(connector);
|
||||
return connector_status_connected;
|
||||
} else
|
||||
if (response == 0)
|
||||
return connector_status_disconnected;
|
||||
|
||||
if (intel_sdvo_multifunc_encoder(intel_output) &&
|
||||
sdvo_priv->attached_output != response) {
|
||||
if (sdvo_priv->controlled_output != response &&
|
||||
intel_sdvo_output_setup(intel_output, response) != true)
|
||||
return connector_status_unknown;
|
||||
sdvo_priv->attached_output = response;
|
||||
}
|
||||
return intel_sdvo_hdmi_sink_detect(connector, response);
|
||||
}
|
||||
|
||||
static void intel_sdvo_get_ddc_modes(struct drm_connector *connector)
|
||||
|
@ -1866,16 +1931,101 @@ intel_sdvo_get_slave_addr(struct drm_device *dev, int output_device)
|
|||
return 0x72;
|
||||
}
|
||||
|
||||
static bool
|
||||
intel_sdvo_output_setup(struct intel_output *intel_output, uint16_t flags)
|
||||
{
|
||||
struct drm_connector *connector = &intel_output->base;
|
||||
struct drm_encoder *encoder = &intel_output->enc;
|
||||
struct intel_sdvo_priv *sdvo_priv = intel_output->dev_priv;
|
||||
bool ret = true, registered = false;
|
||||
|
||||
sdvo_priv->is_tv = false;
|
||||
intel_output->needs_tv_clock = false;
|
||||
sdvo_priv->is_lvds = false;
|
||||
|
||||
if (device_is_registered(&connector->kdev)) {
|
||||
drm_sysfs_connector_remove(connector);
|
||||
registered = true;
|
||||
}
|
||||
|
||||
if (flags &
|
||||
(SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)) {
|
||||
if (sdvo_priv->caps.output_flags & SDVO_OUTPUT_TMDS0)
|
||||
sdvo_priv->controlled_output = SDVO_OUTPUT_TMDS0;
|
||||
else
|
||||
sdvo_priv->controlled_output = SDVO_OUTPUT_TMDS1;
|
||||
|
||||
encoder->encoder_type = DRM_MODE_ENCODER_TMDS;
|
||||
connector->connector_type = DRM_MODE_CONNECTOR_DVID;
|
||||
|
||||
if (intel_sdvo_get_supp_encode(intel_output,
|
||||
&sdvo_priv->encode) &&
|
||||
intel_sdvo_get_digital_encoding_mode(intel_output) &&
|
||||
sdvo_priv->is_hdmi) {
|
||||
/* enable hdmi encoding mode if supported */
|
||||
intel_sdvo_set_encode(intel_output, SDVO_ENCODE_HDMI);
|
||||
intel_sdvo_set_colorimetry(intel_output,
|
||||
SDVO_COLORIMETRY_RGB256);
|
||||
connector->connector_type = DRM_MODE_CONNECTOR_HDMIA;
|
||||
}
|
||||
} else if (flags & SDVO_OUTPUT_SVID0) {
|
||||
|
||||
sdvo_priv->controlled_output = SDVO_OUTPUT_SVID0;
|
||||
encoder->encoder_type = DRM_MODE_ENCODER_TVDAC;
|
||||
connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO;
|
||||
sdvo_priv->is_tv = true;
|
||||
intel_output->needs_tv_clock = true;
|
||||
} else if (flags & SDVO_OUTPUT_RGB0) {
|
||||
|
||||
sdvo_priv->controlled_output = SDVO_OUTPUT_RGB0;
|
||||
encoder->encoder_type = DRM_MODE_ENCODER_DAC;
|
||||
connector->connector_type = DRM_MODE_CONNECTOR_VGA;
|
||||
} else if (flags & SDVO_OUTPUT_RGB1) {
|
||||
|
||||
sdvo_priv->controlled_output = SDVO_OUTPUT_RGB1;
|
||||
encoder->encoder_type = DRM_MODE_ENCODER_DAC;
|
||||
connector->connector_type = DRM_MODE_CONNECTOR_VGA;
|
||||
} else if (flags & SDVO_OUTPUT_LVDS0) {
|
||||
|
||||
sdvo_priv->controlled_output = SDVO_OUTPUT_LVDS0;
|
||||
encoder->encoder_type = DRM_MODE_ENCODER_LVDS;
|
||||
connector->connector_type = DRM_MODE_CONNECTOR_LVDS;
|
||||
sdvo_priv->is_lvds = true;
|
||||
} else if (flags & SDVO_OUTPUT_LVDS1) {
|
||||
|
||||
sdvo_priv->controlled_output = SDVO_OUTPUT_LVDS1;
|
||||
encoder->encoder_type = DRM_MODE_ENCODER_LVDS;
|
||||
connector->connector_type = DRM_MODE_CONNECTOR_LVDS;
|
||||
sdvo_priv->is_lvds = true;
|
||||
} else {
|
||||
|
||||
unsigned char bytes[2];
|
||||
|
||||
sdvo_priv->controlled_output = 0;
|
||||
memcpy(bytes, &sdvo_priv->caps.output_flags, 2);
|
||||
DRM_DEBUG_KMS(I915_SDVO,
|
||||
"%s: Unknown SDVO output type (0x%02x%02x)\n",
|
||||
SDVO_NAME(sdvo_priv),
|
||||
bytes[0], bytes[1]);
|
||||
ret = false;
|
||||
}
|
||||
|
||||
if (ret && registered)
|
||||
ret = drm_sysfs_connector_add(connector) == 0 ? true : false;
|
||||
|
||||
|
||||
return ret;
|
||||
|
||||
}
|
||||
|
||||
bool intel_sdvo_init(struct drm_device *dev, int output_device)
|
||||
{
|
||||
struct drm_connector *connector;
|
||||
struct intel_output *intel_output;
|
||||
struct intel_sdvo_priv *sdvo_priv;
|
||||
|
||||
int connector_type;
|
||||
u8 ch[0x40];
|
||||
int i;
|
||||
int encoder_type;
|
||||
|
||||
intel_output = kcalloc(sizeof(struct intel_output)+sizeof(struct intel_sdvo_priv), 1, GFP_KERNEL);
|
||||
if (!intel_output) {
|
||||
|
@ -1925,88 +2075,28 @@ bool intel_sdvo_init(struct drm_device *dev, int output_device)
|
|||
intel_output->ddc_bus->algo = &intel_sdvo_i2c_bit_algo;
|
||||
|
||||
/* In defaut case sdvo lvds is false */
|
||||
sdvo_priv->is_lvds = false;
|
||||
intel_sdvo_get_capabilities(intel_output, &sdvo_priv->caps);
|
||||
|
||||
if (sdvo_priv->caps.output_flags &
|
||||
(SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)) {
|
||||
if (sdvo_priv->caps.output_flags & SDVO_OUTPUT_TMDS0)
|
||||
sdvo_priv->controlled_output = SDVO_OUTPUT_TMDS0;
|
||||
else
|
||||
sdvo_priv->controlled_output = SDVO_OUTPUT_TMDS1;
|
||||
|
||||
encoder_type = DRM_MODE_ENCODER_TMDS;
|
||||
connector_type = DRM_MODE_CONNECTOR_DVID;
|
||||
|
||||
if (intel_sdvo_get_supp_encode(intel_output,
|
||||
&sdvo_priv->encode) &&
|
||||
intel_sdvo_get_digital_encoding_mode(intel_output) &&
|
||||
sdvo_priv->is_hdmi) {
|
||||
/* enable hdmi encoding mode if supported */
|
||||
intel_sdvo_set_encode(intel_output, SDVO_ENCODE_HDMI);
|
||||
intel_sdvo_set_colorimetry(intel_output,
|
||||
SDVO_COLORIMETRY_RGB256);
|
||||
connector_type = DRM_MODE_CONNECTOR_HDMIA;
|
||||
}
|
||||
}
|
||||
else if (sdvo_priv->caps.output_flags & SDVO_OUTPUT_SVID0)
|
||||
{
|
||||
sdvo_priv->controlled_output = SDVO_OUTPUT_SVID0;
|
||||
encoder_type = DRM_MODE_ENCODER_TVDAC;
|
||||
connector_type = DRM_MODE_CONNECTOR_SVIDEO;
|
||||
sdvo_priv->is_tv = true;
|
||||
intel_output->needs_tv_clock = true;
|
||||
}
|
||||
else if (sdvo_priv->caps.output_flags & SDVO_OUTPUT_RGB0)
|
||||
{
|
||||
sdvo_priv->controlled_output = SDVO_OUTPUT_RGB0;
|
||||
encoder_type = DRM_MODE_ENCODER_DAC;
|
||||
connector_type = DRM_MODE_CONNECTOR_VGA;
|
||||
}
|
||||
else if (sdvo_priv->caps.output_flags & SDVO_OUTPUT_RGB1)
|
||||
{
|
||||
sdvo_priv->controlled_output = SDVO_OUTPUT_RGB1;
|
||||
encoder_type = DRM_MODE_ENCODER_DAC;
|
||||
connector_type = DRM_MODE_CONNECTOR_VGA;
|
||||
}
|
||||
else if (sdvo_priv->caps.output_flags & SDVO_OUTPUT_LVDS0)
|
||||
{
|
||||
sdvo_priv->controlled_output = SDVO_OUTPUT_LVDS0;
|
||||
encoder_type = DRM_MODE_ENCODER_LVDS;
|
||||
connector_type = DRM_MODE_CONNECTOR_LVDS;
|
||||
sdvo_priv->is_lvds = true;
|
||||
}
|
||||
else if (sdvo_priv->caps.output_flags & SDVO_OUTPUT_LVDS1)
|
||||
{
|
||||
sdvo_priv->controlled_output = SDVO_OUTPUT_LVDS1;
|
||||
encoder_type = DRM_MODE_ENCODER_LVDS;
|
||||
connector_type = DRM_MODE_CONNECTOR_LVDS;
|
||||
sdvo_priv->is_lvds = true;
|
||||
}
|
||||
else
|
||||
{
|
||||
unsigned char bytes[2];
|
||||
|
||||
sdvo_priv->controlled_output = 0;
|
||||
memcpy (bytes, &sdvo_priv->caps.output_flags, 2);
|
||||
DRM_DEBUG_KMS(I915_SDVO,
|
||||
"%s: Unknown SDVO output type (0x%02x%02x)\n",
|
||||
SDVO_NAME(sdvo_priv),
|
||||
bytes[0], bytes[1]);
|
||||
encoder_type = DRM_MODE_ENCODER_NONE;
|
||||
connector_type = DRM_MODE_CONNECTOR_Unknown;
|
||||
if (intel_sdvo_output_setup(intel_output,
|
||||
sdvo_priv->caps.output_flags) != true) {
|
||||
DRM_DEBUG("SDVO output failed to setup on SDVO%c\n",
|
||||
output_device == SDVOB ? 'B' : 'C');
|
||||
goto err_i2c;
|
||||
}
|
||||
|
||||
|
||||
connector = &intel_output->base;
|
||||
drm_connector_init(dev, connector, &intel_sdvo_connector_funcs,
|
||||
connector_type);
|
||||
connector->connector_type);
|
||||
|
||||
drm_connector_helper_add(connector, &intel_sdvo_connector_helper_funcs);
|
||||
connector->interlace_allowed = 0;
|
||||
connector->doublescan_allowed = 0;
|
||||
connector->display_info.subpixel_order = SubPixelHorizontalRGB;
|
||||
|
||||
drm_encoder_init(dev, &intel_output->enc, &intel_sdvo_enc_funcs, encoder_type);
|
||||
drm_encoder_init(dev, &intel_output->enc,
|
||||
&intel_sdvo_enc_funcs, intel_output->enc.encoder_type);
|
||||
|
||||
drm_encoder_helper_add(&intel_output->enc, &intel_sdvo_helper_funcs);
|
||||
|
||||
drm_mode_connector_attach_encoder(&intel_output->base, &intel_output->enc);
|
||||
|
|
|
@ -1490,6 +1490,27 @@ static struct input_res {
|
|||
{"1920x1080", 1920, 1080},
|
||||
};
|
||||
|
||||
/*
|
||||
* Chose preferred mode according to line number of TV format
|
||||
*/
|
||||
static void
|
||||
intel_tv_chose_preferred_modes(struct drm_connector *connector,
|
||||
struct drm_display_mode *mode_ptr)
|
||||
{
|
||||
struct intel_output *intel_output = to_intel_output(connector);
|
||||
const struct tv_mode *tv_mode = intel_tv_mode_find(intel_output);
|
||||
|
||||
if (tv_mode->nbr_end < 480 && mode_ptr->vdisplay == 480)
|
||||
mode_ptr->type |= DRM_MODE_TYPE_PREFERRED;
|
||||
else if (tv_mode->nbr_end > 480) {
|
||||
if (tv_mode->progressive == true && tv_mode->nbr_end < 720) {
|
||||
if (mode_ptr->vdisplay == 720)
|
||||
mode_ptr->type |= DRM_MODE_TYPE_PREFERRED;
|
||||
} else if (mode_ptr->vdisplay == 1080)
|
||||
mode_ptr->type |= DRM_MODE_TYPE_PREFERRED;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* Stub get_modes function.
|
||||
*
|
||||
|
@ -1544,6 +1565,7 @@ intel_tv_get_modes(struct drm_connector *connector)
|
|||
mode_ptr->clock = (int) tmp;
|
||||
|
||||
mode_ptr->type = DRM_MODE_TYPE_DRIVER;
|
||||
intel_tv_chose_preferred_modes(connector, mode_ptr);
|
||||
drm_mode_probed_add(connector, mode_ptr);
|
||||
count++;
|
||||
}
|
||||
|
|
|
@ -384,8 +384,9 @@ static void r600_cp_load_microcode(drm_radeon_private_t *dev_priv)
|
|||
DRM_INFO("Loading RV670 PFP Microcode\n");
|
||||
for (i = 0; i < PFP_UCODE_SIZE; i++)
|
||||
RADEON_WRITE(R600_CP_PFP_UCODE_DATA, RV670_pfp_microcode[i]);
|
||||
} else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS780)) {
|
||||
DRM_INFO("Loading RS780 CP Microcode\n");
|
||||
} else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS780) ||
|
||||
((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS880)) {
|
||||
DRM_INFO("Loading RS780/RS880 CP Microcode\n");
|
||||
for (i = 0; i < PM4_UCODE_SIZE; i++) {
|
||||
RADEON_WRITE(R600_CP_ME_RAM_DATA,
|
||||
RS780_cp_microcode[i][0]);
|
||||
|
@ -396,7 +397,7 @@ static void r600_cp_load_microcode(drm_radeon_private_t *dev_priv)
|
|||
}
|
||||
|
||||
RADEON_WRITE(R600_CP_PFP_UCODE_ADDR, 0);
|
||||
DRM_INFO("Loading RS780 PFP Microcode\n");
|
||||
DRM_INFO("Loading RS780/RS880 PFP Microcode\n");
|
||||
for (i = 0; i < PFP_UCODE_SIZE; i++)
|
||||
RADEON_WRITE(R600_CP_PFP_UCODE_DATA, RS780_pfp_microcode[i]);
|
||||
}
|
||||
|
@ -783,6 +784,7 @@ static void r600_gfx_init(struct drm_device *dev,
|
|||
break;
|
||||
case CHIP_RV610:
|
||||
case CHIP_RS780:
|
||||
case CHIP_RS880:
|
||||
case CHIP_RV620:
|
||||
dev_priv->r600_max_pipes = 1;
|
||||
dev_priv->r600_max_tile_pipes = 1;
|
||||
|
@ -917,7 +919,8 @@ static void r600_gfx_init(struct drm_device *dev,
|
|||
((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV630) ||
|
||||
((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV610) ||
|
||||
((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV620) ||
|
||||
((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS780))
|
||||
((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS780) ||
|
||||
((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS880))
|
||||
RADEON_WRITE(R600_DB_DEBUG, R600_PREZ_MUST_WAIT_FOR_POSTZ_DONE);
|
||||
else
|
||||
RADEON_WRITE(R600_DB_DEBUG, 0);
|
||||
|
@ -935,7 +938,8 @@ static void r600_gfx_init(struct drm_device *dev,
|
|||
sq_ms_fifo_sizes = RADEON_READ(R600_SQ_MS_FIFO_SIZES);
|
||||
if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV610) ||
|
||||
((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV620) ||
|
||||
((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS780)) {
|
||||
((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS780) ||
|
||||
((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS880)) {
|
||||
sq_ms_fifo_sizes = (R600_CACHE_FIFO_SIZE(0xa) |
|
||||
R600_FETCH_FIFO_HIWATER(0xa) |
|
||||
R600_DONE_FIFO_HIWATER(0xe0) |
|
||||
|
@ -978,7 +982,8 @@ static void r600_gfx_init(struct drm_device *dev,
|
|||
R600_NUM_ES_STACK_ENTRIES(0));
|
||||
} else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV610) ||
|
||||
((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV620) ||
|
||||
((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS780)) {
|
||||
((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS780) ||
|
||||
((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS880)) {
|
||||
/* no vertex cache */
|
||||
sq_config &= ~R600_VC_ENABLE;
|
||||
|
||||
|
@ -1035,7 +1040,8 @@ static void r600_gfx_init(struct drm_device *dev,
|
|||
|
||||
if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV610) ||
|
||||
((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV620) ||
|
||||
((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS780))
|
||||
((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS780) ||
|
||||
((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS880))
|
||||
RADEON_WRITE(R600_VGT_CACHE_INVALIDATION, R600_CACHE_INVALIDATION(R600_TC_ONLY));
|
||||
else
|
||||
RADEON_WRITE(R600_VGT_CACHE_INVALIDATION, R600_CACHE_INVALIDATION(R600_VC_AND_TC));
|
||||
|
@ -1078,6 +1084,7 @@ static void r600_gfx_init(struct drm_device *dev,
|
|||
break;
|
||||
case CHIP_RV610:
|
||||
case CHIP_RS780:
|
||||
case CHIP_RS880:
|
||||
case CHIP_RV620:
|
||||
gs_prim_buffer_depth = 32;
|
||||
break;
|
||||
|
@ -1123,6 +1130,7 @@ static void r600_gfx_init(struct drm_device *dev,
|
|||
switch (dev_priv->flags & RADEON_FAMILY_MASK) {
|
||||
case CHIP_RV610:
|
||||
case CHIP_RS780:
|
||||
case CHIP_RS880:
|
||||
case CHIP_RV620:
|
||||
tc_cntl = R600_TC_L2_SIZE(8);
|
||||
break;
|
||||
|
|
|
@ -152,7 +152,9 @@ int radeon_mc_setup(struct radeon_device *rdev)
|
|||
}
|
||||
} else {
|
||||
rdev->mc.vram_location = 0;
|
||||
rdev->mc.gtt_location = rdev->mc.mc_vram_size;
|
||||
tmp = rdev->mc.mc_vram_size;
|
||||
tmp = (tmp + rdev->mc.gtt_size - 1) & ~(rdev->mc.gtt_size - 1);
|
||||
rdev->mc.gtt_location = tmp;
|
||||
}
|
||||
DRM_INFO("radeon: VRAM %uM\n", rdev->mc.real_vram_size >> 20);
|
||||
DRM_INFO("radeon: VRAM from 0x%08X to 0x%08X\n",
|
||||
|
|
|
@ -143,6 +143,7 @@ enum radeon_family {
|
|||
CHIP_RV635,
|
||||
CHIP_RV670,
|
||||
CHIP_RS780,
|
||||
CHIP_RS880,
|
||||
CHIP_RV770,
|
||||
CHIP_RV730,
|
||||
CHIP_RV710,
|
||||
|
|
|
@ -106,7 +106,7 @@ static inline uint32_t radeon_object_flags_from_domain(uint32_t domain)
|
|||
flags |= TTM_PL_FLAG_VRAM | TTM_PL_FLAG_WC | TTM_PL_FLAG_UNCACHED;
|
||||
}
|
||||
if (domain & RADEON_GEM_DOMAIN_GTT) {
|
||||
flags |= TTM_PL_FLAG_TT | TTM_PL_FLAG_WC | TTM_PL_FLAG_UNCACHED;
|
||||
flags |= TTM_PL_FLAG_TT | TTM_PL_MASK_CACHING;
|
||||
}
|
||||
if (domain & RADEON_GEM_DOMAIN_CPU) {
|
||||
flags |= TTM_PL_FLAG_SYSTEM | TTM_PL_MASK_CACHING;
|
||||
|
|
|
@ -27,6 +27,7 @@ struct matrix_keypad {
|
|||
const struct matrix_keypad_platform_data *pdata;
|
||||
struct input_dev *input_dev;
|
||||
unsigned short *keycodes;
|
||||
unsigned int row_shift;
|
||||
|
||||
uint32_t last_key_state[MATRIX_MAX_COLS];
|
||||
struct delayed_work work;
|
||||
|
@ -136,7 +137,7 @@ static void matrix_keypad_scan(struct work_struct *work)
|
|||
if ((bits_changed & (1 << row)) == 0)
|
||||
continue;
|
||||
|
||||
code = (row << 4) + col;
|
||||
code = MATRIX_SCAN_CODE(row, col, keypad->row_shift);
|
||||
input_event(input_dev, EV_MSC, MSC_SCAN, code);
|
||||
input_report_key(input_dev,
|
||||
keypad->keycodes[code],
|
||||
|
@ -317,6 +318,7 @@ static int __devinit matrix_keypad_probe(struct platform_device *pdev)
|
|||
struct matrix_keypad *keypad;
|
||||
struct input_dev *input_dev;
|
||||
unsigned short *keycodes;
|
||||
unsigned int row_shift;
|
||||
int i;
|
||||
int err;
|
||||
|
||||
|
@ -332,14 +334,11 @@ static int __devinit matrix_keypad_probe(struct platform_device *pdev)
|
|||
return -EINVAL;
|
||||
}
|
||||
|
||||
if (!keymap_data->max_keymap_size) {
|
||||
dev_err(&pdev->dev, "invalid keymap data supplied\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
row_shift = get_count_order(pdata->num_col_gpios);
|
||||
|
||||
keypad = kzalloc(sizeof(struct matrix_keypad), GFP_KERNEL);
|
||||
keycodes = kzalloc(keymap_data->max_keymap_size *
|
||||
sizeof(keypad->keycodes),
|
||||
keycodes = kzalloc((pdata->num_row_gpios << row_shift) *
|
||||
sizeof(*keycodes),
|
||||
GFP_KERNEL);
|
||||
input_dev = input_allocate_device();
|
||||
if (!keypad || !keycodes || !input_dev) {
|
||||
|
@ -350,6 +349,7 @@ static int __devinit matrix_keypad_probe(struct platform_device *pdev)
|
|||
keypad->input_dev = input_dev;
|
||||
keypad->pdata = pdata;
|
||||
keypad->keycodes = keycodes;
|
||||
keypad->row_shift = row_shift;
|
||||
keypad->stopped = true;
|
||||
INIT_DELAYED_WORK(&keypad->work, matrix_keypad_scan);
|
||||
spin_lock_init(&keypad->lock);
|
||||
|
@ -363,7 +363,7 @@ static int __devinit matrix_keypad_probe(struct platform_device *pdev)
|
|||
|
||||
input_dev->keycode = keycodes;
|
||||
input_dev->keycodesize = sizeof(*keycodes);
|
||||
input_dev->keycodemax = keymap_data->max_keymap_size;
|
||||
input_dev->keycodemax = pdata->num_row_gpios << keypad->row_shift;
|
||||
|
||||
for (i = 0; i < keymap_data->keymap_size; i++) {
|
||||
unsigned int key = keymap_data->keymap[i];
|
||||
|
@ -371,7 +371,7 @@ static int __devinit matrix_keypad_probe(struct platform_device *pdev)
|
|||
unsigned int col = KEY_COL(key);
|
||||
unsigned short code = KEY_VAL(key);
|
||||
|
||||
keycodes[(row << 4) + col] = code;
|
||||
keycodes[MATRIX_SCAN_CODE(row, col, row_shift)] = code;
|
||||
__set_bit(code, input_dev->keybit);
|
||||
}
|
||||
__clear_bit(KEY_RESERVED, input_dev->keybit);
|
||||
|
|
|
@ -611,6 +611,20 @@ static struct key_entry keymap_wistron_generic[] __initdata = {
|
|||
{ KE_END, 0 }
|
||||
};
|
||||
|
||||
static struct key_entry keymap_prestigio[] __initdata = {
|
||||
{ KE_KEY, 0x11, {KEY_PROG1} },
|
||||
{ KE_KEY, 0x12, {KEY_PROG2} },
|
||||
{ KE_WIFI, 0x30 },
|
||||
{ KE_KEY, 0x22, {KEY_REWIND} },
|
||||
{ KE_KEY, 0x23, {KEY_FORWARD} },
|
||||
{ KE_KEY, 0x24, {KEY_PLAYPAUSE} },
|
||||
{ KE_KEY, 0x25, {KEY_STOPCD} },
|
||||
{ KE_KEY, 0x31, {KEY_MAIL} },
|
||||
{ KE_KEY, 0x36, {KEY_WWW} },
|
||||
{ KE_END, 0 }
|
||||
};
|
||||
|
||||
|
||||
/*
|
||||
* If your machine is not here (which is currently rather likely), please send
|
||||
* a list of buttons and their key codes (reported when loading this module
|
||||
|
@ -971,6 +985,8 @@ static int __init select_keymap(void)
|
|||
if (keymap_name != NULL) {
|
||||
if (strcmp (keymap_name, "1557/MS2141") == 0)
|
||||
keymap = keymap_wistron_ms2141;
|
||||
else if (strcmp (keymap_name, "prestigio") == 0)
|
||||
keymap = keymap_prestigio;
|
||||
else if (strcmp (keymap_name, "generic") == 0)
|
||||
keymap = keymap_wistron_generic;
|
||||
else {
|
||||
|
|
|
@ -77,6 +77,14 @@ static struct dmi_system_id __initdata i8042_dmi_noloop_table[] = {
|
|||
DMI_MATCH(DMI_BOARD_VERSION, "Rev E"),
|
||||
},
|
||||
},
|
||||
{
|
||||
.ident = "ASUS G1S",
|
||||
.matches = {
|
||||
DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer Inc."),
|
||||
DMI_MATCH(DMI_BOARD_NAME, "G1S"),
|
||||
DMI_MATCH(DMI_BOARD_VERSION, "1.0"),
|
||||
},
|
||||
},
|
||||
{
|
||||
/* AUX LOOP command does not raise AUX IRQ */
|
||||
.ident = "ASUS P65UP5",
|
||||
|
|
|
@ -234,7 +234,7 @@ static int __devinit sdhci_of_probe(struct of_device *ofdev,
|
|||
return -ENODEV;
|
||||
|
||||
host = sdhci_alloc_host(&ofdev->dev, sizeof(*of_host));
|
||||
if (!host)
|
||||
if (IS_ERR(host))
|
||||
return -ENOMEM;
|
||||
|
||||
of_host = sdhci_priv(host);
|
||||
|
|
|
@ -284,13 +284,6 @@ config MTD_L440GX
|
|||
|
||||
BE VERY CAREFUL.
|
||||
|
||||
config MTD_SBC8240
|
||||
tristate "Flash device on SBC8240"
|
||||
depends on MTD_JEDECPROBE && 8260
|
||||
help
|
||||
Flash access on the SBC8240 board from Wind River. See
|
||||
<http://www.windriver.com/products/sbc8240/>
|
||||
|
||||
config MTD_TQM8XXL
|
||||
tristate "CFI Flash device mapped on TQM8XXL"
|
||||
depends on MTD_CFI && TQM8xxL
|
||||
|
|
|
@ -50,7 +50,6 @@ obj-$(CONFIG_MTD_UCLINUX) += uclinux.o
|
|||
obj-$(CONFIG_MTD_NETtel) += nettel.o
|
||||
obj-$(CONFIG_MTD_SCB2_FLASH) += scb2_flash.o
|
||||
obj-$(CONFIG_MTD_H720X) += h720x-flash.o
|
||||
obj-$(CONFIG_MTD_SBC8240) += sbc8240.o
|
||||
obj-$(CONFIG_MTD_IXP4XX) += ixp4xx.o
|
||||
obj-$(CONFIG_MTD_IXP2000) += ixp2000.o
|
||||
obj-$(CONFIG_MTD_WRSBC8260) += wr_sbc82xx_flash.o
|
||||
|
|
|
@ -1,250 +0,0 @@
|
|||
/*
|
||||
* Handle mapping of the flash memory access routines on the SBC8240 board.
|
||||
*
|
||||
* Carolyn Smith, Tektronix, Inc.
|
||||
*
|
||||
* This code is GPLed
|
||||
*/
|
||||
|
||||
/*
|
||||
* The SBC8240 has 2 flash banks.
|
||||
* Bank 0 is a 512 KiB AMD AM29F040B; 8 x 64 KiB sectors.
|
||||
* It contains the U-Boot code (7 sectors) and the environment (1 sector).
|
||||
* Bank 1 is 4 x 1 MiB AMD AM29LV800BT; 15 x 64 KiB sectors, 1 x 32 KiB sector,
|
||||
* 2 x 8 KiB sectors, 1 x 16 KiB sectors.
|
||||
* Both parts are JEDEC compatible.
|
||||
*/
|
||||
|
||||
#include <linux/module.h>
|
||||
#include <linux/types.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <asm/io.h>
|
||||
|
||||
#include <linux/mtd/mtd.h>
|
||||
#include <linux/mtd/map.h>
|
||||
#include <linux/mtd/cfi.h>
|
||||
|
||||
#ifdef CONFIG_MTD_PARTITIONS
|
||||
#include <linux/mtd/partitions.h>
|
||||
#endif
|
||||
|
||||
#define DEBUG
|
||||
|
||||
#ifdef DEBUG
|
||||
# define debugk(fmt,args...) printk(fmt ,##args)
|
||||
#else
|
||||
# define debugk(fmt,args...)
|
||||
#endif
|
||||
|
||||
|
||||
#define WINDOW_ADDR0 0xFFF00000 /* 512 KiB */
|
||||
#define WINDOW_SIZE0 0x00080000
|
||||
#define BUSWIDTH0 1
|
||||
|
||||
#define WINDOW_ADDR1 0xFF000000 /* 4 MiB */
|
||||
#define WINDOW_SIZE1 0x00400000
|
||||
#define BUSWIDTH1 8
|
||||
|
||||
#define MSG_PREFIX "sbc8240:" /* prefix for our printk()'s */
|
||||
#define MTDID "sbc8240-%d" /* for mtdparts= partitioning */
|
||||
|
||||
|
||||
static struct map_info sbc8240_map[2] = {
|
||||
{
|
||||
.name = "sbc8240 Flash Bank #0",
|
||||
.size = WINDOW_SIZE0,
|
||||
.bankwidth = BUSWIDTH0,
|
||||
},
|
||||
{
|
||||
.name = "sbc8240 Flash Bank #1",
|
||||
.size = WINDOW_SIZE1,
|
||||
.bankwidth = BUSWIDTH1,
|
||||
}
|
||||
};
|
||||
|
||||
#define NUM_FLASH_BANKS ARRAY_SIZE(sbc8240_map)
|
||||
|
||||
/*
|
||||
* The following defines the partition layout of SBC8240 boards.
|
||||
*
|
||||
* See include/linux/mtd/partitions.h for definition of the
|
||||
* mtd_partition structure.
|
||||
*
|
||||
* The *_max_flash_size is the maximum possible mapped flash size
|
||||
* which is not necessarily the actual flash size. It must correspond
|
||||
* to the value specified in the mapping definition defined by the
|
||||
* "struct map_desc *_io_desc" for the corresponding machine.
|
||||
*/
|
||||
|
||||
#ifdef CONFIG_MTD_PARTITIONS
|
||||
|
||||
static struct mtd_partition sbc8240_uboot_partitions [] = {
|
||||
/* Bank 0 */
|
||||
{
|
||||
.name = "U-boot", /* U-Boot Firmware */
|
||||
.offset = 0,
|
||||
.size = 0x00070000, /* 7 x 64 KiB sectors */
|
||||
.mask_flags = MTD_WRITEABLE, /* force read-only */
|
||||
},
|
||||
{
|
||||
.name = "environment", /* U-Boot environment */
|
||||
.offset = 0x00070000,
|
||||
.size = 0x00010000, /* 1 x 64 KiB sector */
|
||||
},
|
||||
};
|
||||
|
||||
static struct mtd_partition sbc8240_fs_partitions [] = {
|
||||
{
|
||||
.name = "jffs", /* JFFS filesystem */
|
||||
.offset = 0,
|
||||
.size = 0x003C0000, /* 4 * 15 * 64KiB */
|
||||
},
|
||||
{
|
||||
.name = "tmp32",
|
||||
.offset = 0x003C0000,
|
||||
.size = 0x00020000, /* 4 * 32KiB */
|
||||
},
|
||||
{
|
||||
.name = "tmp8a",
|
||||
.offset = 0x003E0000,
|
||||
.size = 0x00008000, /* 4 * 8KiB */
|
||||
},
|
||||
{
|
||||
.name = "tmp8b",
|
||||
.offset = 0x003E8000,
|
||||
.size = 0x00008000, /* 4 * 8KiB */
|
||||
},
|
||||
{
|
||||
.name = "tmp16",
|
||||
.offset = 0x003F0000,
|
||||
.size = 0x00010000, /* 4 * 16KiB */
|
||||
}
|
||||
};
|
||||
|
||||
/* trivial struct to describe partition information */
|
||||
struct mtd_part_def
|
||||
{
|
||||
int nums;
|
||||
unsigned char *type;
|
||||
struct mtd_partition* mtd_part;
|
||||
};
|
||||
|
||||
static struct mtd_info *sbc8240_mtd[NUM_FLASH_BANKS];
|
||||
static struct mtd_part_def sbc8240_part_banks[NUM_FLASH_BANKS];
|
||||
|
||||
|
||||
#endif /* CONFIG_MTD_PARTITIONS */
|
||||
|
||||
|
||||
static int __init init_sbc8240_mtd (void)
|
||||
{
|
||||
static struct _cjs {
|
||||
u_long addr;
|
||||
u_long size;
|
||||
} pt[NUM_FLASH_BANKS] = {
|
||||
{
|
||||
.addr = WINDOW_ADDR0,
|
||||
.size = WINDOW_SIZE0
|
||||
},
|
||||
{
|
||||
.addr = WINDOW_ADDR1,
|
||||
.size = WINDOW_SIZE1
|
||||
},
|
||||
};
|
||||
|
||||
int devicesfound = 0;
|
||||
int i,j;
|
||||
|
||||
for (i = 0; i < NUM_FLASH_BANKS; i++) {
|
||||
printk (KERN_NOTICE MSG_PREFIX
|
||||
"Probing 0x%08lx at 0x%08lx\n", pt[i].size, pt[i].addr);
|
||||
|
||||
sbc8240_map[i].map_priv_1 =
|
||||
(unsigned long) ioremap (pt[i].addr, pt[i].size);
|
||||
if (!sbc8240_map[i].map_priv_1) {
|
||||
printk (MSG_PREFIX "failed to ioremap\n");
|
||||
for (j = 0; j < i; j++) {
|
||||
iounmap((void *) sbc8240_map[j].map_priv_1);
|
||||
sbc8240_map[j].map_priv_1 = 0;
|
||||
}
|
||||
return -EIO;
|
||||
}
|
||||
simple_map_init(&sbc8240_mtd[i]);
|
||||
|
||||
sbc8240_mtd[i] = do_map_probe("jedec_probe", &sbc8240_map[i]);
|
||||
|
||||
if (sbc8240_mtd[i]) {
|
||||
sbc8240_mtd[i]->module = THIS_MODULE;
|
||||
devicesfound++;
|
||||
} else {
|
||||
if (sbc8240_map[i].map_priv_1) {
|
||||
iounmap((void *) sbc8240_map[i].map_priv_1);
|
||||
sbc8240_map[i].map_priv_1 = 0;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
if (!devicesfound) {
|
||||
printk(KERN_NOTICE MSG_PREFIX
|
||||
"No suppported flash chips found!\n");
|
||||
return -ENXIO;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_MTD_PARTITIONS
|
||||
sbc8240_part_banks[0].mtd_part = sbc8240_uboot_partitions;
|
||||
sbc8240_part_banks[0].type = "static image";
|
||||
sbc8240_part_banks[0].nums = ARRAY_SIZE(sbc8240_uboot_partitions);
|
||||
sbc8240_part_banks[1].mtd_part = sbc8240_fs_partitions;
|
||||
sbc8240_part_banks[1].type = "static file system";
|
||||
sbc8240_part_banks[1].nums = ARRAY_SIZE(sbc8240_fs_partitions);
|
||||
|
||||
for (i = 0; i < NUM_FLASH_BANKS; i++) {
|
||||
|
||||
if (!sbc8240_mtd[i]) continue;
|
||||
if (sbc8240_part_banks[i].nums == 0) {
|
||||
printk (KERN_NOTICE MSG_PREFIX
|
||||
"No partition info available, registering whole device\n");
|
||||
add_mtd_device(sbc8240_mtd[i]);
|
||||
} else {
|
||||
printk (KERN_NOTICE MSG_PREFIX
|
||||
"Using %s partition definition\n", sbc8240_part_banks[i].mtd_part->name);
|
||||
add_mtd_partitions (sbc8240_mtd[i],
|
||||
sbc8240_part_banks[i].mtd_part,
|
||||
sbc8240_part_banks[i].nums);
|
||||
}
|
||||
}
|
||||
#else
|
||||
printk(KERN_NOTICE MSG_PREFIX
|
||||
"Registering %d flash banks at once\n", devicesfound);
|
||||
|
||||
for (i = 0; i < devicesfound; i++) {
|
||||
add_mtd_device(sbc8240_mtd[i]);
|
||||
}
|
||||
#endif /* CONFIG_MTD_PARTITIONS */
|
||||
|
||||
return devicesfound == 0 ? -ENXIO : 0;
|
||||
}
|
||||
|
||||
static void __exit cleanup_sbc8240_mtd (void)
|
||||
{
|
||||
int i;
|
||||
|
||||
for (i = 0; i < NUM_FLASH_BANKS; i++) {
|
||||
if (sbc8240_mtd[i]) {
|
||||
del_mtd_device (sbc8240_mtd[i]);
|
||||
map_destroy (sbc8240_mtd[i]);
|
||||
}
|
||||
if (sbc8240_map[i].map_priv_1) {
|
||||
iounmap ((void *) sbc8240_map[i].map_priv_1);
|
||||
sbc8240_map[i].map_priv_1 = 0;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
module_init (init_sbc8240_mtd);
|
||||
module_exit (cleanup_sbc8240_mtd);
|
||||
|
||||
MODULE_LICENSE ("GPL");
|
||||
MODULE_AUTHOR ("Carolyn Smith <carolyn.smith@tektronix.com>");
|
||||
MODULE_DESCRIPTION ("MTD map driver for SBC8240 boards");
|
||||
|
|
@ -144,7 +144,7 @@ static int blktrans_open(struct block_device *bdev, fmode_t mode)
|
|||
struct mtd_blktrans_ops *tr = dev->tr;
|
||||
int ret = -ENODEV;
|
||||
|
||||
if (!try_module_get(dev->mtd->owner))
|
||||
if (!get_mtd_device(NULL, dev->mtd->index))
|
||||
goto out;
|
||||
|
||||
if (!try_module_get(tr->owner))
|
||||
|
@ -158,7 +158,7 @@ static int blktrans_open(struct block_device *bdev, fmode_t mode)
|
|||
ret = 0;
|
||||
if (tr->open && (ret = tr->open(dev))) {
|
||||
dev->mtd->usecount--;
|
||||
module_put(dev->mtd->owner);
|
||||
put_mtd_device(dev->mtd);
|
||||
out_tr:
|
||||
module_put(tr->owner);
|
||||
}
|
||||
|
@ -177,7 +177,7 @@ static int blktrans_release(struct gendisk *disk, fmode_t mode)
|
|||
|
||||
if (!ret) {
|
||||
dev->mtd->usecount--;
|
||||
module_put(dev->mtd->owner);
|
||||
put_mtd_device(dev->mtd);
|
||||
module_put(tr->owner);
|
||||
}
|
||||
|
||||
|
|
|
@ -29,6 +29,8 @@ static struct mtdblk_dev {
|
|||
enum { STATE_EMPTY, STATE_CLEAN, STATE_DIRTY } cache_state;
|
||||
} *mtdblks[MAX_MTD_DEVICES];
|
||||
|
||||
static struct mutex mtdblks_lock;
|
||||
|
||||
/*
|
||||
* Cache stuff...
|
||||
*
|
||||
|
@ -270,15 +272,19 @@ static int mtdblock_open(struct mtd_blktrans_dev *mbd)
|
|||
|
||||
DEBUG(MTD_DEBUG_LEVEL1,"mtdblock_open\n");
|
||||
|
||||
mutex_lock(&mtdblks_lock);
|
||||
if (mtdblks[dev]) {
|
||||
mtdblks[dev]->count++;
|
||||
mutex_unlock(&mtdblks_lock);
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* OK, it's not open. Create cache info for it */
|
||||
mtdblk = kzalloc(sizeof(struct mtdblk_dev), GFP_KERNEL);
|
||||
if (!mtdblk)
|
||||
if (!mtdblk) {
|
||||
mutex_unlock(&mtdblks_lock);
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
mtdblk->count = 1;
|
||||
mtdblk->mtd = mtd;
|
||||
|
@ -291,6 +297,7 @@ static int mtdblock_open(struct mtd_blktrans_dev *mbd)
|
|||
}
|
||||
|
||||
mtdblks[dev] = mtdblk;
|
||||
mutex_unlock(&mtdblks_lock);
|
||||
|
||||
DEBUG(MTD_DEBUG_LEVEL1, "ok\n");
|
||||
|
||||
|
@ -304,6 +311,8 @@ static int mtdblock_release(struct mtd_blktrans_dev *mbd)
|
|||
|
||||
DEBUG(MTD_DEBUG_LEVEL1, "mtdblock_release\n");
|
||||
|
||||
mutex_lock(&mtdblks_lock);
|
||||
|
||||
mutex_lock(&mtdblk->cache_mutex);
|
||||
write_cached_data(mtdblk);
|
||||
mutex_unlock(&mtdblk->cache_mutex);
|
||||
|
@ -316,6 +325,9 @@ static int mtdblock_release(struct mtd_blktrans_dev *mbd)
|
|||
vfree(mtdblk->cache_data);
|
||||
kfree(mtdblk);
|
||||
}
|
||||
|
||||
mutex_unlock(&mtdblks_lock);
|
||||
|
||||
DEBUG(MTD_DEBUG_LEVEL1, "ok\n");
|
||||
|
||||
return 0;
|
||||
|
@ -376,6 +388,8 @@ static struct mtd_blktrans_ops mtdblock_tr = {
|
|||
|
||||
static int __init init_mtdblock(void)
|
||||
{
|
||||
mutex_init(&mtdblks_lock);
|
||||
|
||||
return register_mtd_blktrans(&mtdblock_tr);
|
||||
}
|
||||
|
||||
|
|
|
@ -65,8 +65,8 @@ static void mtd_release(struct device *dev)
|
|||
static int mtd_cls_suspend(struct device *dev, pm_message_t state)
|
||||
{
|
||||
struct mtd_info *mtd = dev_to_mtd(dev);
|
||||
|
||||
if (mtd->suspend)
|
||||
|
||||
if (mtd && mtd->suspend)
|
||||
return mtd->suspend(mtd);
|
||||
else
|
||||
return 0;
|
||||
|
@ -76,7 +76,7 @@ static int mtd_cls_resume(struct device *dev)
|
|||
{
|
||||
struct mtd_info *mtd = dev_to_mtd(dev);
|
||||
|
||||
if (mtd->resume)
|
||||
if (mtd && mtd->resume)
|
||||
mtd->resume(mtd);
|
||||
return 0;
|
||||
}
|
||||
|
@ -298,6 +298,7 @@ int add_mtd_device(struct mtd_info *mtd)
|
|||
mtd->dev.class = &mtd_class;
|
||||
mtd->dev.devt = MTD_DEVT(i);
|
||||
dev_set_name(&mtd->dev, "mtd%d", i);
|
||||
dev_set_drvdata(&mtd->dev, mtd);
|
||||
if (device_register(&mtd->dev) != 0) {
|
||||
mtd_table[i] = NULL;
|
||||
break;
|
||||
|
|
|
@ -266,7 +266,7 @@ static inline int omap2_onenand_bufferram_offset(struct mtd_info *mtd, int area)
|
|||
|
||||
if (ONENAND_CURRENT_BUFFERRAM(this)) {
|
||||
if (area == ONENAND_DATARAM)
|
||||
return mtd->writesize;
|
||||
return this->writesize;
|
||||
if (area == ONENAND_SPARERAM)
|
||||
return mtd->oobsize;
|
||||
}
|
||||
|
@ -770,6 +770,7 @@ static int __devexit omap2_onenand_remove(struct platform_device *pdev)
|
|||
}
|
||||
iounmap(c->onenand.base);
|
||||
release_mem_region(c->phys_base, ONENAND_IO_SIZE);
|
||||
gpmc_cs_free(c->gpmc_cs);
|
||||
kfree(c);
|
||||
|
||||
return 0;
|
||||
|
|
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