MIPS: pci-ar724x: use per-controller IRQ base
Change to the code to use per-controller IRQ base. This is needed for multiple PCI controller support. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4915/ Signed-off-by: John Crispin <blogic@openwrt.org>
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@ -34,6 +34,7 @@ struct ar724x_pci_controller {
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void __iomem *ctrl_base;
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void __iomem *ctrl_base;
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int irq;
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int irq;
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int irq_base;
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bool link_up;
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bool link_up;
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bool bar0_is_cached;
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bool bar0_is_cached;
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@ -205,7 +206,7 @@ static void ar724x_pci_irq_handler(unsigned int irq, struct irq_desc *desc)
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__raw_readl(base + AR724X_PCI_REG_INT_MASK);
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__raw_readl(base + AR724X_PCI_REG_INT_MASK);
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if (pending & AR724X_PCI_INT_DEV0)
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if (pending & AR724X_PCI_INT_DEV0)
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generic_handle_irq(ATH79_PCI_IRQ(0));
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generic_handle_irq(apc->irq_base + 0);
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else
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else
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spurious_interrupt();
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spurious_interrupt();
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@ -215,13 +216,15 @@ static void ar724x_pci_irq_unmask(struct irq_data *d)
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{
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{
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struct ar724x_pci_controller *apc;
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struct ar724x_pci_controller *apc;
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void __iomem *base;
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void __iomem *base;
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int offset;
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u32 t;
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u32 t;
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apc = irq_data_get_irq_chip_data(d);
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apc = irq_data_get_irq_chip_data(d);
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base = apc->ctrl_base;
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base = apc->ctrl_base;
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offset = apc->irq_base - d->irq;
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switch (d->irq) {
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switch (offset) {
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case ATH79_PCI_IRQ(0):
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case 0:
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t = __raw_readl(base + AR724X_PCI_REG_INT_MASK);
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t = __raw_readl(base + AR724X_PCI_REG_INT_MASK);
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__raw_writel(t | AR724X_PCI_INT_DEV0,
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__raw_writel(t | AR724X_PCI_INT_DEV0,
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base + AR724X_PCI_REG_INT_MASK);
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base + AR724X_PCI_REG_INT_MASK);
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@ -234,13 +237,15 @@ static void ar724x_pci_irq_mask(struct irq_data *d)
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{
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{
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struct ar724x_pci_controller *apc;
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struct ar724x_pci_controller *apc;
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void __iomem *base;
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void __iomem *base;
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int offset;
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u32 t;
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u32 t;
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apc = irq_data_get_irq_chip_data(d);
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apc = irq_data_get_irq_chip_data(d);
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base = apc->ctrl_base;
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base = apc->ctrl_base;
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offset = apc->irq_base - d->irq;
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switch (d->irq) {
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switch (offset) {
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case ATH79_PCI_IRQ(0):
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case 0:
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t = __raw_readl(base + AR724X_PCI_REG_INT_MASK);
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t = __raw_readl(base + AR724X_PCI_REG_INT_MASK);
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__raw_writel(t & ~AR724X_PCI_INT_DEV0,
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__raw_writel(t & ~AR724X_PCI_INT_DEV0,
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base + AR724X_PCI_REG_INT_MASK);
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base + AR724X_PCI_REG_INT_MASK);
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@ -264,7 +269,8 @@ static struct irq_chip ar724x_pci_irq_chip = {
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.irq_mask_ack = ar724x_pci_irq_mask,
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.irq_mask_ack = ar724x_pci_irq_mask,
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};
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};
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static void ar724x_pci_irq_init(struct ar724x_pci_controller *apc)
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static void ar724x_pci_irq_init(struct ar724x_pci_controller *apc,
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int id)
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{
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{
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void __iomem *base;
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void __iomem *base;
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int i;
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int i;
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@ -274,10 +280,10 @@ static void ar724x_pci_irq_init(struct ar724x_pci_controller *apc)
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__raw_writel(0, base + AR724X_PCI_REG_INT_MASK);
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__raw_writel(0, base + AR724X_PCI_REG_INT_MASK);
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__raw_writel(0, base + AR724X_PCI_REG_INT_STATUS);
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__raw_writel(0, base + AR724X_PCI_REG_INT_STATUS);
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BUILD_BUG_ON(ATH79_PCI_IRQ_COUNT < AR724X_PCI_IRQ_COUNT);
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apc->irq_base = ATH79_PCI_IRQ_BASE + (id * AR724X_PCI_IRQ_COUNT);
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for (i = ATH79_PCI_IRQ_BASE;
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for (i = apc->irq_base;
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i < ATH79_PCI_IRQ_BASE + AR724X_PCI_IRQ_COUNT; i++) {
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i < apc->irq_base + AR724X_PCI_IRQ_COUNT; i++) {
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irq_set_chip_and_handler(i, &ar724x_pci_irq_chip,
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irq_set_chip_and_handler(i, &ar724x_pci_irq_chip,
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handle_level_irq);
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handle_level_irq);
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irq_set_chip_data(i, apc);
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irq_set_chip_data(i, apc);
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@ -291,6 +297,11 @@ static int ar724x_pci_probe(struct platform_device *pdev)
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{
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{
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struct ar724x_pci_controller *apc;
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struct ar724x_pci_controller *apc;
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struct resource *res;
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struct resource *res;
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int id;
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id = pdev->id;
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if (id == -1)
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id = 0;
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apc = devm_kzalloc(&pdev->dev, sizeof(struct ar724x_pci_controller),
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apc = devm_kzalloc(&pdev->dev, sizeof(struct ar724x_pci_controller),
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GFP_KERNEL);
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GFP_KERNEL);
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@ -347,7 +358,7 @@ static int ar724x_pci_probe(struct platform_device *pdev)
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if (!apc->link_up)
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if (!apc->link_up)
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dev_warn(&pdev->dev, "PCIe link is down\n");
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dev_warn(&pdev->dev, "PCIe link is down\n");
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ar724x_pci_irq_init(apc);
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ar724x_pci_irq_init(apc, id);
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register_pci_controller(&apc->pci_controller);
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register_pci_controller(&apc->pci_controller);
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