ARM: OMAP4+: Move SRAM data to DT
Use drivers/misc/sram.c driver to manage SRAM on all DT only OMAP platforms (am33xx, am43xx, omap4 and omap5) instead of the existing private plat-omap/sram.c Address and size related data is removed from mach-omap2/sram.c and now passed to drivers/misc/sram.c from DT. Users can hence use general purpose allocator apis instead of OMAP private ones to manage and use SRAM. Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Dave Gerlach <d-gerlach@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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@ -726,9 +726,8 @@
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};
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};
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ocmcram: ocmcram@40300000 {
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ocmcram: ocmcram@40300000 {
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compatible = "ti,am3352-ocmcram";
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compatible = "mmio-sram";
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reg = <0x40300000 0x10000>;
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reg = <0x40300000 0x10000>; /* 64k */
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ti,hwmods = "ocmcram";
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};
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};
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wkup_m3: wkup_m3@44d00000 {
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wkup_m3: wkup_m3@44d00000 {
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@ -885,6 +885,11 @@
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clock-names = "fck";
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clock-names = "fck";
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};
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};
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};
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};
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ocmcram: ocmcram@40300000 {
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compatible = "mmio-sram";
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reg = <0x40300000 0x40000>; /* 256k */
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};
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};
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};
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};
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};
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@ -209,6 +209,11 @@
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};
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};
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};
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};
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ocmcram: ocmcram@40304000 {
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compatible = "mmio-sram";
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reg = <0x40304000 0xa000>; /* 40k */
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};
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sdma: dma-controller@4a056000 {
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sdma: dma-controller@4a056000 {
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compatible = "ti,omap4430-sdma";
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compatible = "ti,omap4430-sdma";
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reg = <0x4a056000 0x1000>;
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reg = <0x4a056000 0x1000>;
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@ -220,6 +220,11 @@
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};
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};
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};
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};
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ocmcram: ocmcram@40300000 {
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compatible = "mmio-sram";
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reg = <0x40300000 0x20000>; /* 128k */
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};
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sdma: dma-controller@4a056000 {
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sdma: dma-controller@4a056000 {
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compatible = "ti,omap4430-sdma";
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compatible = "ti,omap4430-sdma";
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reg = <0x4a056000 0x1000>;
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reg = <0x4a056000 0x1000>;
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@ -122,6 +122,7 @@ CONFIG_BLK_DEV_RAM_SIZE=16384
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CONFIG_SENSORS_TSL2550=m
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CONFIG_SENSORS_TSL2550=m
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CONFIG_BMP085_I2C=m
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CONFIG_BMP085_I2C=m
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CONFIG_SENSORS_LIS3_I2C=m
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CONFIG_SENSORS_LIS3_I2C=m
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CONFIG_SRAM=y
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CONFIG_SCSI=y
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CONFIG_SCSI=y
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CONFIG_BLK_DEV_SD=y
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CONFIG_BLK_DEV_SD=y
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CONFIG_SCSI_SCAN_ASYNC=y
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CONFIG_SCSI_SCAN_ASYNC=y
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@ -32,12 +32,6 @@
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#define OMAP2_SRAM_PUB_PA (OMAP2_SRAM_PA + 0xf800)
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#define OMAP2_SRAM_PUB_PA (OMAP2_SRAM_PA + 0xf800)
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#define OMAP3_SRAM_PUB_PA (OMAP3_SRAM_PA + 0x8000)
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#define OMAP3_SRAM_PUB_PA (OMAP3_SRAM_PA + 0x8000)
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#ifdef CONFIG_OMAP4_ERRATA_I688
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#define OMAP4_SRAM_PUB_PA OMAP4_SRAM_PA
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#else
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#define OMAP4_SRAM_PUB_PA (OMAP4_SRAM_PA + 0x4000)
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#endif
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#define OMAP5_SRAM_PA 0x40300000
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#define SRAM_BOOTLOADER_SZ 0x00
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#define SRAM_BOOTLOADER_SZ 0x00
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@ -105,32 +99,14 @@ static void __init omap_detect_sram(void)
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} else {
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} else {
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omap_sram_size = 0x8000; /* 32K */
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omap_sram_size = 0x8000; /* 32K */
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}
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}
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} else if (cpu_is_omap44xx()) {
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omap_sram_start = OMAP4_SRAM_PUB_PA;
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omap_sram_size = 0xa000; /* 40K */
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} else if (soc_is_omap54xx()) {
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omap_sram_start = OMAP5_SRAM_PA;
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omap_sram_size = SZ_128K; /* 128KB */
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} else {
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} else {
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omap_sram_start = OMAP2_SRAM_PUB_PA;
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omap_sram_start = OMAP2_SRAM_PUB_PA;
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omap_sram_size = 0x800; /* 2K */
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omap_sram_size = 0x800; /* 2K */
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}
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}
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} else {
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} else {
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if (soc_is_am33xx()) {
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if (cpu_is_omap34xx()) {
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omap_sram_start = AM33XX_SRAM_PA;
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omap_sram_size = 0x10000; /* 64K */
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} else if (soc_is_am43xx()) {
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omap_sram_start = AM33XX_SRAM_PA;
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omap_sram_size = SZ_256K;
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} else if (cpu_is_omap34xx()) {
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omap_sram_start = OMAP3_SRAM_PA;
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omap_sram_start = OMAP3_SRAM_PA;
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omap_sram_size = 0x10000; /* 64K */
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omap_sram_size = 0x10000; /* 64K */
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} else if (cpu_is_omap44xx()) {
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omap_sram_start = OMAP4_SRAM_PA;
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omap_sram_size = 0xe000; /* 56K */
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} else if (soc_is_omap54xx()) {
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omap_sram_start = OMAP5_SRAM_PA;
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omap_sram_size = SZ_128K; /* 128KB */
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} else {
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} else {
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omap_sram_start = OMAP2_SRAM_PA;
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omap_sram_start = OMAP2_SRAM_PA;
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if (cpu_is_omap242x())
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if (cpu_is_omap242x())
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@ -80,4 +80,3 @@ static inline void omap_push_sram_idle(void) {}
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#else
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#else
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#define OMAP4_SRAM_PA 0x40300000
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#define OMAP4_SRAM_PA 0x40300000
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#endif
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#endif
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#define AM33XX_SRAM_PA 0x40300000
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