Merge branch 'topic/pl330' into for-linus
This commit is contained in:
Vinod Koul
Коммит
8bce4c8765
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@ -15,6 +15,7 @@ Optional properties:
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cells in the dmas property of client device.
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- dma-channels: contains the total number of DMA channels supported by the DMAC
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- dma-requests: contains the total number of DMA requests supported by the DMAC
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- arm,pl330-broken-no-flushp: quirk for avoiding to execute DMAFLUSHP
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Example:
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@ -496,6 +496,7 @@ int dma_get_slave_caps(struct dma_chan *chan, struct dma_slave_caps *caps)
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caps->src_addr_widths = device->src_addr_widths;
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caps->dst_addr_widths = device->dst_addr_widths;
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caps->directions = device->directions;
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caps->max_burst = device->max_burst;
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caps->residue_granularity = device->residue_granularity;
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caps->descriptor_reuse = device->descriptor_reuse;
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@ -33,6 +33,9 @@
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#define PL330_MAX_CHAN 8
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#define PL330_MAX_IRQS 32
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#define PL330_MAX_PERI 32
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#define PL330_MAX_BURST 16
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#define PL330_QUIRK_BROKEN_NO_FLUSHP BIT(0)
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enum pl330_cachectrl {
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CCTRL0, /* Noncacheable and nonbufferable */
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@ -488,6 +491,17 @@ struct pl330_dmac {
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/* Peripheral channels connected to this DMAC */
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unsigned int num_peripherals;
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struct dma_pl330_chan *peripherals; /* keep at end */
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int quirks;
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};
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static struct pl330_of_quirks {
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char *quirk;
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int id;
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} of_quirks[] = {
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{
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.quirk = "arm,pl330-broken-no-flushp",
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.id = PL330_QUIRK_BROKEN_NO_FLUSHP,
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}
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};
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struct dma_pl330_desc {
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@ -1137,47 +1151,67 @@ static inline int _ldst_memtomem(unsigned dry_run, u8 buf[],
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return off;
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}
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static inline int _ldst_devtomem(unsigned dry_run, u8 buf[],
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const struct _xfer_spec *pxs, int cyc)
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static inline int _ldst_devtomem(struct pl330_dmac *pl330, unsigned dry_run,
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u8 buf[], const struct _xfer_spec *pxs,
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int cyc)
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{
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int off = 0;
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enum pl330_cond cond;
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if (pl330->quirks & PL330_QUIRK_BROKEN_NO_FLUSHP)
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cond = BURST;
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else
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cond = SINGLE;
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while (cyc--) {
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off += _emit_WFP(dry_run, &buf[off], SINGLE, pxs->desc->peri);
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off += _emit_LDP(dry_run, &buf[off], SINGLE, pxs->desc->peri);
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off += _emit_WFP(dry_run, &buf[off], cond, pxs->desc->peri);
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off += _emit_LDP(dry_run, &buf[off], cond, pxs->desc->peri);
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off += _emit_ST(dry_run, &buf[off], ALWAYS);
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off += _emit_FLUSHP(dry_run, &buf[off], pxs->desc->peri);
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if (!(pl330->quirks & PL330_QUIRK_BROKEN_NO_FLUSHP))
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off += _emit_FLUSHP(dry_run, &buf[off],
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pxs->desc->peri);
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}
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return off;
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}
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static inline int _ldst_memtodev(unsigned dry_run, u8 buf[],
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const struct _xfer_spec *pxs, int cyc)
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static inline int _ldst_memtodev(struct pl330_dmac *pl330,
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unsigned dry_run, u8 buf[],
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const struct _xfer_spec *pxs, int cyc)
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{
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int off = 0;
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enum pl330_cond cond;
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if (pl330->quirks & PL330_QUIRK_BROKEN_NO_FLUSHP)
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cond = BURST;
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else
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cond = SINGLE;
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while (cyc--) {
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off += _emit_WFP(dry_run, &buf[off], SINGLE, pxs->desc->peri);
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off += _emit_WFP(dry_run, &buf[off], cond, pxs->desc->peri);
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off += _emit_LD(dry_run, &buf[off], ALWAYS);
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off += _emit_STP(dry_run, &buf[off], SINGLE, pxs->desc->peri);
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off += _emit_FLUSHP(dry_run, &buf[off], pxs->desc->peri);
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off += _emit_STP(dry_run, &buf[off], cond, pxs->desc->peri);
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if (!(pl330->quirks & PL330_QUIRK_BROKEN_NO_FLUSHP))
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off += _emit_FLUSHP(dry_run, &buf[off],
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pxs->desc->peri);
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}
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return off;
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}
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static int _bursts(unsigned dry_run, u8 buf[],
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static int _bursts(struct pl330_dmac *pl330, unsigned dry_run, u8 buf[],
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const struct _xfer_spec *pxs, int cyc)
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{
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int off = 0;
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switch (pxs->desc->rqtype) {
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case DMA_MEM_TO_DEV:
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off += _ldst_memtodev(dry_run, &buf[off], pxs, cyc);
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off += _ldst_memtodev(pl330, dry_run, &buf[off], pxs, cyc);
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break;
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case DMA_DEV_TO_MEM:
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off += _ldst_devtomem(dry_run, &buf[off], pxs, cyc);
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off += _ldst_devtomem(pl330, dry_run, &buf[off], pxs, cyc);
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break;
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case DMA_MEM_TO_MEM:
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off += _ldst_memtomem(dry_run, &buf[off], pxs, cyc);
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@ -1191,7 +1225,7 @@ static int _bursts(unsigned dry_run, u8 buf[],
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}
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/* Returns bytes consumed and updates bursts */
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static inline int _loop(unsigned dry_run, u8 buf[],
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static inline int _loop(struct pl330_dmac *pl330, unsigned dry_run, u8 buf[],
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unsigned long *bursts, const struct _xfer_spec *pxs)
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{
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int cyc, cycmax, szlp, szlpend, szbrst, off;
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@ -1199,7 +1233,7 @@ static inline int _loop(unsigned dry_run, u8 buf[],
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struct _arg_LPEND lpend;
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if (*bursts == 1)
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return _bursts(dry_run, buf, pxs, 1);
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return _bursts(pl330, dry_run, buf, pxs, 1);
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/* Max iterations possible in DMALP is 256 */
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if (*bursts >= 256*256) {
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@ -1217,7 +1251,7 @@ static inline int _loop(unsigned dry_run, u8 buf[],
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}
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szlp = _emit_LP(1, buf, 0, 0);
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szbrst = _bursts(1, buf, pxs, 1);
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szbrst = _bursts(pl330, 1, buf, pxs, 1);
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lpend.cond = ALWAYS;
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lpend.forever = false;
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@ -1249,7 +1283,7 @@ static inline int _loop(unsigned dry_run, u8 buf[],
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off += _emit_LP(dry_run, &buf[off], 1, lcnt1);
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ljmp1 = off;
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off += _bursts(dry_run, &buf[off], pxs, cyc);
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off += _bursts(pl330, dry_run, &buf[off], pxs, cyc);
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lpend.cond = ALWAYS;
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lpend.forever = false;
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@ -1272,8 +1306,9 @@ static inline int _loop(unsigned dry_run, u8 buf[],
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return off;
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}
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static inline int _setup_loops(unsigned dry_run, u8 buf[],
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const struct _xfer_spec *pxs)
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static inline int _setup_loops(struct pl330_dmac *pl330,
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unsigned dry_run, u8 buf[],
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const struct _xfer_spec *pxs)
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{
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struct pl330_xfer *x = &pxs->desc->px;
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u32 ccr = pxs->ccr;
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@ -1282,15 +1317,16 @@ static inline int _setup_loops(unsigned dry_run, u8 buf[],
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while (bursts) {
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c = bursts;
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off += _loop(dry_run, &buf[off], &c, pxs);
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off += _loop(pl330, dry_run, &buf[off], &c, pxs);
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bursts -= c;
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}
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return off;
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}
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static inline int _setup_xfer(unsigned dry_run, u8 buf[],
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const struct _xfer_spec *pxs)
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static inline int _setup_xfer(struct pl330_dmac *pl330,
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unsigned dry_run, u8 buf[],
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const struct _xfer_spec *pxs)
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{
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struct pl330_xfer *x = &pxs->desc->px;
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int off = 0;
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@ -1301,7 +1337,7 @@ static inline int _setup_xfer(unsigned dry_run, u8 buf[],
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off += _emit_MOV(dry_run, &buf[off], DAR, x->dst_addr);
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/* Setup Loop(s) */
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off += _setup_loops(dry_run, &buf[off], pxs);
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off += _setup_loops(pl330, dry_run, &buf[off], pxs);
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return off;
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}
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@ -1310,8 +1346,9 @@ static inline int _setup_xfer(unsigned dry_run, u8 buf[],
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* A req is a sequence of one or more xfer units.
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* Returns the number of bytes taken to setup the MC for the req.
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*/
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static int _setup_req(unsigned dry_run, struct pl330_thread *thrd,
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unsigned index, struct _xfer_spec *pxs)
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static int _setup_req(struct pl330_dmac *pl330, unsigned dry_run,
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struct pl330_thread *thrd, unsigned index,
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struct _xfer_spec *pxs)
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{
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struct _pl330_req *req = &thrd->req[index];
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struct pl330_xfer *x;
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@ -1328,7 +1365,7 @@ static int _setup_req(unsigned dry_run, struct pl330_thread *thrd,
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if (x->bytes % (BRST_SIZE(pxs->ccr) * BRST_LEN(pxs->ccr)))
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return -EINVAL;
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off += _setup_xfer(dry_run, &buf[off], pxs);
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off += _setup_xfer(pl330, dry_run, &buf[off], pxs);
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/* DMASEV peripheral/event */
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off += _emit_SEV(dry_run, &buf[off], thrd->ev);
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@ -1422,7 +1459,7 @@ static int pl330_submit_req(struct pl330_thread *thrd,
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xs.desc = desc;
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/* First dry run to check if req is acceptable */
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ret = _setup_req(1, thrd, idx, &xs);
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ret = _setup_req(pl330, 1, thrd, idx, &xs);
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if (ret < 0)
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goto xfer_exit;
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@ -1436,7 +1473,7 @@ static int pl330_submit_req(struct pl330_thread *thrd,
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/* Hook the request */
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thrd->lstenq = idx;
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thrd->req[idx].desc = desc;
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_setup_req(0, thrd, idx, &xs);
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_setup_req(pl330, 0, thrd, idx, &xs);
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ret = 0;
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@ -2781,6 +2818,7 @@ pl330_probe(struct amba_device *adev, const struct amba_id *id)
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struct resource *res;
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int i, ret, irq;
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int num_chan;
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struct device_node *np = adev->dev.of_node;
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pdat = dev_get_platdata(&adev->dev);
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@ -2800,6 +2838,11 @@ pl330_probe(struct amba_device *adev, const struct amba_id *id)
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pl330->mcbufsz = pdat ? pdat->mcbuf_sz : 0;
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/* get quirk */
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for (i = 0; i < ARRAY_SIZE(of_quirks); i++)
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if (of_property_read_bool(np, of_quirks[i].quirk))
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pl330->quirks |= of_quirks[i].id;
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res = &adev->res;
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pl330->base = devm_ioremap_resource(&adev->dev, res);
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if (IS_ERR(pl330->base))
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@ -2895,6 +2938,8 @@ pl330_probe(struct amba_device *adev, const struct amba_id *id)
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pd->dst_addr_widths = PL330_DMA_BUSWIDTHS;
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pd->directions = BIT(DMA_DEV_TO_MEM) | BIT(DMA_MEM_TO_DEV);
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pd->residue_granularity = DMA_RESIDUE_GRANULARITY_SEGMENT;
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pd->max_burst = ((pl330->quirks & PL330_QUIRK_BROKEN_NO_FLUSHP) ?
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1 : PL330_MAX_BURST);
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ret = dma_async_device_register(pd);
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if (ret) {
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@ -199,6 +199,7 @@ struct rockchip_spi {
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struct sg_table rx_sg;
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struct rockchip_spi_dma_data dma_rx;
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struct rockchip_spi_dma_data dma_tx;
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struct dma_slave_caps dma_caps;
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};
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static inline void spi_enable_chip(struct rockchip_spi *rs, int enable)
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@ -449,7 +450,10 @@ static void rockchip_spi_prepare_dma(struct rockchip_spi *rs)
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rxconf.direction = rs->dma_rx.direction;
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rxconf.src_addr = rs->dma_rx.addr;
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rxconf.src_addr_width = rs->n_bytes;
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rxconf.src_maxburst = rs->n_bytes;
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if (rs->dma_caps.max_burst > 4)
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rxconf.src_maxburst = 4;
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else
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rxconf.src_maxburst = 1;
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dmaengine_slave_config(rs->dma_rx.ch, &rxconf);
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rxdesc = dmaengine_prep_slave_sg(
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@ -466,7 +470,10 @@ static void rockchip_spi_prepare_dma(struct rockchip_spi *rs)
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txconf.direction = rs->dma_tx.direction;
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txconf.dst_addr = rs->dma_tx.addr;
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txconf.dst_addr_width = rs->n_bytes;
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txconf.dst_maxburst = rs->n_bytes;
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if (rs->dma_caps.max_burst > 4)
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txconf.dst_maxburst = 4;
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else
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txconf.dst_maxburst = 1;
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dmaengine_slave_config(rs->dma_tx.ch, &txconf);
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txdesc = dmaengine_prep_slave_sg(
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@ -730,6 +737,7 @@ static int rockchip_spi_probe(struct platform_device *pdev)
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}
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if (rs->dma_tx.ch && rs->dma_rx.ch) {
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dma_get_slave_caps(rs->dma_rx.ch, &(rs->dma_caps));
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rs->dma_tx.addr = (dma_addr_t)(mem->start + ROCKCHIP_SPI_TXDR);
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rs->dma_rx.addr = (dma_addr_t)(mem->start + ROCKCHIP_SPI_RXDR);
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rs->dma_tx.direction = DMA_MEM_TO_DEV;
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@ -401,6 +401,7 @@ enum dma_residue_granularity {
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* since the enum dma_transfer_direction is not defined as bits for each
|
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* type of direction, the dma controller should fill (1 << <TYPE>) and same
|
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* should be checked by controller as well
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* @max_burst: max burst capability per-transfer
|
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* @cmd_pause: true, if pause and thereby resume is supported
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* @cmd_terminate: true, if terminate cmd is supported
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* @residue_granularity: granularity of the reported transfer residue
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@ -411,6 +412,7 @@ struct dma_slave_caps {
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u32 src_addr_widths;
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u32 dst_addr_widths;
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u32 directions;
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u32 max_burst;
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bool cmd_pause;
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bool cmd_terminate;
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enum dma_residue_granularity residue_granularity;
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@ -654,6 +656,7 @@ struct dma_filter {
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* the enum dma_transfer_direction is not defined as bits for
|
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* each type of direction, the dma controller should fill (1 <<
|
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* <TYPE>) and same should be checked by controller as well
|
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* @max_burst: max burst capability per-transfer
|
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* @residue_granularity: granularity of the transfer residue reported
|
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* by tx_status
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* @device_alloc_chan_resources: allocate resources and return the
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@ -712,6 +715,7 @@ struct dma_device {
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u32 src_addr_widths;
|
||||
u32 dst_addr_widths;
|
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u32 directions;
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u32 max_burst;
|
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bool descriptor_reuse;
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enum dma_residue_granularity residue_granularity;
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