From 8bdfa203c5827da811ed01dd19ba452135d21bee Mon Sep 17 00:00:00 2001 From: Chanwoo Choi Date: Tue, 18 Mar 2014 06:25:59 +0900 Subject: [PATCH] ARM: dts: Move common dt data for interrupt combiner controller for exynos4x12 This patch move common dt data of interrupt combiner controller to exynos4x12.dtsi. Each Exynos4x12 SoC has different number of interrput combiner as following: - Exynos4212 : interrput combiner 18(0 ~ 17) - Exynos4412 : interrput combiner 20(0 ~ 19) The exynos combiner driver initialize interrupt according to specific number of interrput combiner. - samsung,combiner-nr : The number of interrput combiners supported. Also, This patch arrange again the dt data according to register address in exynos4212/exynos4412.dtsi. Signed-off-by: Chanwoo Choi Signed-off-by: Kyungmin Park Reviewed-by: Tomasz Figa Signed-off-by: Kukjin Kim --- arch/arm/boot/dts/exynos4212.dtsi | 13 ++++--------- arch/arm/boot/dts/exynos4412.dtsi | 14 ++++---------- arch/arm/boot/dts/exynos4x12.dtsi | 8 ++++++++ 3 files changed, 16 insertions(+), 19 deletions(-) diff --git a/arch/arm/boot/dts/exynos4212.dtsi b/arch/arm/boot/dts/exynos4212.dtsi index 94a43f9a05e2..ceefc711793c 100644 --- a/arch/arm/boot/dts/exynos4212.dtsi +++ b/arch/arm/boot/dts/exynos4212.dtsi @@ -22,16 +22,11 @@ / { compatible = "samsung,exynos4212"; + combiner: interrupt-controller@10440000 { + samsung,combiner-nr = <18>; + }; + gic: interrupt-controller@10490000 { cpu-offset = <0x8000>; }; - - interrupt-controller@10440000 { - samsung,combiner-nr = <18>; - interrupts = <0 0 0>, <0 1 0>, <0 2 0>, <0 3 0>, - <0 4 0>, <0 5 0>, <0 6 0>, <0 7 0>, - <0 8 0>, <0 9 0>, <0 10 0>, <0 11 0>, - <0 12 0>, <0 13 0>, <0 14 0>, <0 15 0>, - <0 107 0>, <0 108 0>; - }; }; diff --git a/arch/arm/boot/dts/exynos4412.dtsi b/arch/arm/boot/dts/exynos4412.dtsi index 87b339c739de..a40b6e20e92f 100644 --- a/arch/arm/boot/dts/exynos4412.dtsi +++ b/arch/arm/boot/dts/exynos4412.dtsi @@ -22,17 +22,11 @@ / { compatible = "samsung,exynos4412"; + combiner: interrupt-controller@10440000 { + samsung,combiner-nr = <20>; + }; + gic: interrupt-controller@10490000 { cpu-offset = <0x4000>; }; - - interrupt-controller@10440000 { - samsung,combiner-nr = <20>; - interrupts = <0 0 0>, <0 1 0>, <0 2 0>, <0 3 0>, - <0 4 0>, <0 5 0>, <0 6 0>, <0 7 0>, - <0 8 0>, <0 9 0>, <0 10 0>, <0 11 0>, - <0 12 0>, <0 13 0>, <0 14 0>, <0 15 0>, - <0 107 0>, <0 108 0>, <0 48 0>, <0 42 0>; - }; - }; diff --git a/arch/arm/boot/dts/exynos4x12.dtsi b/arch/arm/boot/dts/exynos4x12.dtsi index a1e76ec60e0a..c4a9306f8529 100644 --- a/arch/arm/boot/dts/exynos4x12.dtsi +++ b/arch/arm/boot/dts/exynos4x12.dtsi @@ -68,6 +68,14 @@ }; }; + combiner: interrupt-controller@10440000 { + interrupts = <0 0 0>, <0 1 0>, <0 2 0>, <0 3 0>, + <0 4 0>, <0 5 0>, <0 6 0>, <0 7 0>, + <0 8 0>, <0 9 0>, <0 10 0>, <0 11 0>, + <0 12 0>, <0 13 0>, <0 14 0>, <0 15 0>, + <0 107 0>, <0 108 0>, <0 48 0>, <0 42 0>; + }; + pinctrl_0: pinctrl@11400000 { compatible = "samsung,exynos4x12-pinctrl"; reg = <0x11400000 0x1000>;