Merge branch 'hns3-fixes'
Guangbin Huang says: ==================== net: hns3: add some fixes for -net This series adds some fixes for the HNS3 ethernet driver. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
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Коммит
8c0922ce4b
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@ -61,6 +61,9 @@ static unsigned int tx_sgl = 1;
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module_param(tx_sgl, uint, 0600);
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module_param(tx_sgl, uint, 0600);
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MODULE_PARM_DESC(tx_sgl, "Minimum number of frags when using dma_map_sg() to optimize the IOMMU mapping");
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MODULE_PARM_DESC(tx_sgl, "Minimum number of frags when using dma_map_sg() to optimize the IOMMU mapping");
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static bool page_pool_enabled = true;
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module_param(page_pool_enabled, bool, 0400);
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#define HNS3_SGL_SIZE(nfrag) (sizeof(struct scatterlist) * (nfrag) + \
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#define HNS3_SGL_SIZE(nfrag) (sizeof(struct scatterlist) * (nfrag) + \
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sizeof(struct sg_table))
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sizeof(struct sg_table))
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#define HNS3_MAX_SGL_SIZE ALIGN(HNS3_SGL_SIZE(HNS3_MAX_TSO_BD_NUM), \
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#define HNS3_MAX_SGL_SIZE ALIGN(HNS3_SGL_SIZE(HNS3_MAX_TSO_BD_NUM), \
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@ -73,6 +76,7 @@ MODULE_PARM_DESC(tx_sgl, "Minimum number of frags when using dma_map_sg() to opt
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#define HNS3_OUTER_VLAN_TAG 2
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#define HNS3_OUTER_VLAN_TAG 2
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#define HNS3_MIN_TX_LEN 33U
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#define HNS3_MIN_TX_LEN 33U
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#define HNS3_MIN_TUN_PKT_LEN 65U
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/* hns3_pci_tbl - PCI Device ID Table
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/* hns3_pci_tbl - PCI Device ID Table
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*
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*
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@ -1424,8 +1428,11 @@ static int hns3_set_l2l3l4(struct sk_buff *skb, u8 ol4_proto,
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l4.tcp->doff);
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l4.tcp->doff);
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break;
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break;
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case IPPROTO_UDP:
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case IPPROTO_UDP:
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if (hns3_tunnel_csum_bug(skb))
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if (hns3_tunnel_csum_bug(skb)) {
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return skb_checksum_help(skb);
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int ret = skb_put_padto(skb, HNS3_MIN_TUN_PKT_LEN);
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return ret ? ret : skb_checksum_help(skb);
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}
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hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L4CS_B, 1);
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hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L4CS_B, 1);
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hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L4T_S,
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hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L4T_S,
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@ -4753,7 +4760,8 @@ static int hns3_alloc_ring_memory(struct hns3_enet_ring *ring)
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goto out_with_desc_cb;
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goto out_with_desc_cb;
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if (!HNAE3_IS_TX_RING(ring)) {
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if (!HNAE3_IS_TX_RING(ring)) {
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hns3_alloc_page_pool(ring);
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if (page_pool_enabled)
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hns3_alloc_page_pool(ring);
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ret = hns3_alloc_ring_buffers(ring);
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ret = hns3_alloc_ring_buffers(ring);
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if (ret)
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if (ret)
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@ -1724,6 +1724,10 @@ hclge_dbg_get_imp_stats_info(struct hclge_dev *hdev, char *buf, int len)
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}
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}
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bd_num = le32_to_cpu(req->bd_num);
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bd_num = le32_to_cpu(req->bd_num);
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if (!bd_num) {
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dev_err(&hdev->pdev->dev, "imp statistics bd number is 0!\n");
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return -EINVAL;
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}
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desc_src = kcalloc(bd_num, sizeof(struct hclge_desc), GFP_KERNEL);
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desc_src = kcalloc(bd_num, sizeof(struct hclge_desc), GFP_KERNEL);
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if (!desc_src)
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if (!desc_src)
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@ -1528,9 +1528,10 @@ static void hclge_init_kdump_kernel_config(struct hclge_dev *hdev)
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static int hclge_configure(struct hclge_dev *hdev)
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static int hclge_configure(struct hclge_dev *hdev)
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{
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{
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struct hnae3_ae_dev *ae_dev = pci_get_drvdata(hdev->pdev);
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struct hnae3_ae_dev *ae_dev = pci_get_drvdata(hdev->pdev);
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const struct cpumask *cpumask = cpu_online_mask;
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struct hclge_cfg cfg;
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struct hclge_cfg cfg;
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unsigned int i;
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unsigned int i;
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int ret;
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int node, ret;
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ret = hclge_get_cfg(hdev, &cfg);
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ret = hclge_get_cfg(hdev, &cfg);
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if (ret)
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if (ret)
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@ -1595,11 +1596,12 @@ static int hclge_configure(struct hclge_dev *hdev)
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hclge_init_kdump_kernel_config(hdev);
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hclge_init_kdump_kernel_config(hdev);
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/* Set the init affinity based on pci func number */
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/* Set the affinity based on numa node */
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i = cpumask_weight(cpumask_of_node(dev_to_node(&hdev->pdev->dev)));
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node = dev_to_node(&hdev->pdev->dev);
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i = i ? PCI_FUNC(hdev->pdev->devfn) % i : 0;
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if (node != NUMA_NO_NODE)
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cpumask_set_cpu(cpumask_local_spread(i, dev_to_node(&hdev->pdev->dev)),
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cpumask = cpumask_of_node(node);
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&hdev->affinity_mask);
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cpumask_copy(&hdev->affinity_mask, cpumask);
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return ret;
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return ret;
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}
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}
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@ -8125,11 +8127,12 @@ static void hclge_ae_stop(struct hnae3_handle *handle)
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hclge_clear_arfs_rules(hdev);
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hclge_clear_arfs_rules(hdev);
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spin_unlock_bh(&hdev->fd_rule_lock);
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spin_unlock_bh(&hdev->fd_rule_lock);
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/* If it is not PF reset, the firmware will disable the MAC,
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/* If it is not PF reset or FLR, the firmware will disable the MAC,
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* so it only need to stop phy here.
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* so it only need to stop phy here.
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*/
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*/
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if (test_bit(HCLGE_STATE_RST_HANDLING, &hdev->state) &&
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if (test_bit(HCLGE_STATE_RST_HANDLING, &hdev->state) &&
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hdev->reset_type != HNAE3_FUNC_RESET) {
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hdev->reset_type != HNAE3_FUNC_RESET &&
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hdev->reset_type != HNAE3_FLR_RESET) {
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hclge_mac_stop_phy(hdev);
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hclge_mac_stop_phy(hdev);
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hclge_update_link_status(hdev);
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hclge_update_link_status(hdev);
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return;
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return;
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@ -2465,6 +2465,8 @@ static irqreturn_t hclgevf_misc_irq_handle(int irq, void *data)
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hclgevf_enable_vector(&hdev->misc_vector, false);
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hclgevf_enable_vector(&hdev->misc_vector, false);
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event_cause = hclgevf_check_evt_cause(hdev, &clearval);
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event_cause = hclgevf_check_evt_cause(hdev, &clearval);
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if (event_cause != HCLGEVF_VECTOR0_EVENT_OTHER)
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hclgevf_clear_event_cause(hdev, clearval);
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switch (event_cause) {
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switch (event_cause) {
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case HCLGEVF_VECTOR0_EVENT_RST:
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case HCLGEVF_VECTOR0_EVENT_RST:
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@ -2477,10 +2479,8 @@ static irqreturn_t hclgevf_misc_irq_handle(int irq, void *data)
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break;
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break;
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}
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}
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if (event_cause != HCLGEVF_VECTOR0_EVENT_OTHER) {
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if (event_cause != HCLGEVF_VECTOR0_EVENT_OTHER)
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hclgevf_clear_event_cause(hdev, clearval);
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hclgevf_enable_vector(&hdev->misc_vector, true);
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hclgevf_enable_vector(&hdev->misc_vector, true);
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}
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return IRQ_HANDLED;
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return IRQ_HANDLED;
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}
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}
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