dma-mapping fixes for 5.8:
- ensure we always have fully addressable memory in the dma coherent pool (Nicolas Saenz Julienne) -----BEGIN PGP SIGNATURE----- iQI/BAABCgApFiEEgdbnc3r/njty3Iq9D55TZVIEUYMFAl8T+D0LHGhjaEBsc3Qu ZGUACgkQD55TZVIEUYM6lRAAzDoUs32GJpawMANJWAde5DX3T5WUEWMLyGV0O2Ct 9Yzm3iDh25k5Lc8cr8l/UUpJL8B+uEkl/iW+GZQ6vvD3rxW0v5IfGwu8I4hqGiCo BpbsRr1VVXl2dLyA6sk/fXLYSqqWBoYzVdtZyRwgek6JOvA3ALy1jv7EkrBsE/UP 6F6kWUTkDiek9ZAP1d0ztCTDGiuAQhAvmmO4odfMqMjDAIYW4fL4CPhDeMl4We66 HNg+OJEF/aK5VC6qiY3629K3aMB0ZDz4oQzSIUO2H7RjuVzVr9Ce7JmKa+lBDxlS 6e5GAfqoJbVz1C0oT46XT1IsMJKcDDgmfr+pmjgeSNt9HzvYND413opUFyyUvLIE kpUHQUibMOFxHiHRGQeCJaGVLgF/ucSoBeLbMTDORMLOFbZTLgKN9CjiP8/RgUrc jL6lKa8LX3nyTlHTSHH7FPyu5waG2cLfLexntPMGQenXjLOxmS9Jg1Q+MjihjxH/ tAfGoeoCjgILOjZQmpZ9Ze5nSdgnEwfHpYAYFQi981/HACUxjZrunjOTNMLqCxu1 cu+bi0HjAhdoQRMC1YtIcffWabPvWYp0R5WqVs3ExKpJKXRO5xjuVdybUOGpj1Py uOWOtAGyOxD1vp51e37ZsrFO2q3J6bqUFSVMDyYUKoWlyHOS7cy4ULZHQXNpUAAq 9fA= =H248 -----END PGP SIGNATURE----- Merge tag 'dma-mapping-5.8-6' of git://git.infradead.org/users/hch/dma-mapping into master Pull dma-mapping fixes from Christoph Hellwig: "Ensure we always have fully addressable memory in the dma coherent pool (Nicolas Saenz Julienne)" * tag 'dma-mapping-5.8-6' of git://git.infradead.org/users/hch/dma-mapping: dma-pool: do not allocate pool memory from CMA dma-pool: make sure atomic pool suits device dma-pool: introduce dma_guess_pool() dma-pool: get rid of dma_in_atomic_pool() dma-direct: provide function to check physical memory area validity
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Коммит
8c18fc6344
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@ -69,6 +69,7 @@ static inline bool dma_capable(struct device *dev, dma_addr_t addr, size_t size,
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u64 dma_direct_get_required_mask(struct device *dev);
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gfp_t dma_direct_optimal_gfp_mask(struct device *dev, u64 dma_mask,
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u64 *phys_mask);
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bool dma_coherent_ok(struct device *dev, phys_addr_t phys, size_t size);
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void *dma_direct_alloc(struct device *dev, size_t size, dma_addr_t *dma_handle,
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gfp_t gfp, unsigned long attrs);
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void dma_direct_free(struct device *dev, size_t size, void *cpu_addr,
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@ -70,7 +70,7 @@ gfp_t dma_direct_optimal_gfp_mask(struct device *dev, u64 dma_mask,
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return 0;
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}
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static bool dma_coherent_ok(struct device *dev, phys_addr_t phys, size_t size)
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bool dma_coherent_ok(struct device *dev, phys_addr_t phys, size_t size)
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{
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return phys_to_dma_direct(dev, phys) + size - 1 <=
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min_not_zero(dev->coherent_dma_mask, dev->bus_dma_limit);
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@ -6,7 +6,6 @@
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#include <linux/debugfs.h>
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#include <linux/dma-direct.h>
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#include <linux/dma-noncoherent.h>
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#include <linux/dma-contiguous.h>
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#include <linux/init.h>
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#include <linux/genalloc.h>
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#include <linux/set_memory.h>
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@ -69,12 +68,7 @@ static int atomic_pool_expand(struct gen_pool *pool, size_t pool_size,
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do {
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pool_size = 1 << (PAGE_SHIFT + order);
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if (dev_get_cma_area(NULL))
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page = dma_alloc_from_contiguous(NULL, 1 << order,
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order, false);
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else
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page = alloc_pages(gfp, order);
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page = alloc_pages(gfp, order);
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} while (!page && order-- > 0);
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if (!page)
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goto out;
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@ -118,8 +112,7 @@ remove_mapping:
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dma_common_free_remap(addr, pool_size);
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#endif
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free_page: __maybe_unused
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if (!dma_release_from_contiguous(NULL, page, 1 << order))
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__free_pages(page, order);
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__free_pages(page, order);
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out:
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return ret;
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}
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@ -203,7 +196,7 @@ static int __init dma_atomic_pool_init(void)
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}
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postcore_initcall(dma_atomic_pool_init);
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static inline struct gen_pool *dev_to_pool(struct device *dev)
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static inline struct gen_pool *dma_guess_pool_from_device(struct device *dev)
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{
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u64 phys_mask;
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gfp_t gfp;
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@ -217,51 +210,79 @@ static inline struct gen_pool *dev_to_pool(struct device *dev)
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return atomic_pool_kernel;
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}
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static bool dma_in_atomic_pool(struct device *dev, void *start, size_t size)
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static inline struct gen_pool *dma_get_safer_pool(struct gen_pool *bad_pool)
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{
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struct gen_pool *pool = dev_to_pool(dev);
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if (bad_pool == atomic_pool_kernel)
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return atomic_pool_dma32 ? : atomic_pool_dma;
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if (unlikely(!pool))
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return false;
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return gen_pool_has_addr(pool, (unsigned long)start, size);
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if (bad_pool == atomic_pool_dma32)
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return atomic_pool_dma;
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return NULL;
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}
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static inline struct gen_pool *dma_guess_pool(struct device *dev,
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struct gen_pool *bad_pool)
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{
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if (bad_pool)
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return dma_get_safer_pool(bad_pool);
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return dma_guess_pool_from_device(dev);
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}
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void *dma_alloc_from_pool(struct device *dev, size_t size,
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struct page **ret_page, gfp_t flags)
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{
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struct gen_pool *pool = dev_to_pool(dev);
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unsigned long val;
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struct gen_pool *pool = NULL;
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unsigned long val = 0;
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void *ptr = NULL;
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phys_addr_t phys;
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if (!pool) {
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WARN(1, "%pGg atomic pool not initialised!\n", &flags);
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return NULL;
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while (1) {
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pool = dma_guess_pool(dev, pool);
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if (!pool) {
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WARN(1, "Failed to get suitable pool for %s\n",
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dev_name(dev));
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break;
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}
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val = gen_pool_alloc(pool, size);
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if (!val)
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continue;
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phys = gen_pool_virt_to_phys(pool, val);
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if (dma_coherent_ok(dev, phys, size))
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break;
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gen_pool_free(pool, val, size);
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val = 0;
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}
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val = gen_pool_alloc(pool, size);
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if (likely(val)) {
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phys_addr_t phys = gen_pool_virt_to_phys(pool, val);
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if (val) {
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*ret_page = pfn_to_page(__phys_to_pfn(phys));
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ptr = (void *)val;
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memset(ptr, 0, size);
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} else {
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WARN_ONCE(1, "DMA coherent pool depleted, increase size "
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"(recommended min coherent_pool=%zuK)\n",
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gen_pool_size(pool) >> 9);
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if (gen_pool_avail(pool) < atomic_pool_size)
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schedule_work(&atomic_pool_work);
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}
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if (gen_pool_avail(pool) < atomic_pool_size)
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schedule_work(&atomic_pool_work);
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return ptr;
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}
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bool dma_free_from_pool(struct device *dev, void *start, size_t size)
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{
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struct gen_pool *pool = dev_to_pool(dev);
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struct gen_pool *pool = NULL;
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if (!dma_in_atomic_pool(dev, start, size))
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return false;
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gen_pool_free(pool, (unsigned long)start, size);
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return true;
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while (1) {
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pool = dma_guess_pool(dev, pool);
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if (!pool)
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return false;
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if (gen_pool_has_addr(pool, (unsigned long)start, size)) {
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gen_pool_free(pool, (unsigned long)start, size);
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return true;
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}
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}
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}
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