arm: Add Aspeed machine
Aspeed devices are a common Baseboard Management Controller (BMC) system on chip containing an ARM9 or ARM11 core, off-chip DDR RAM and support for a large number of peripherals. This patch adds basic support for the ast2400 and ast2500 machines, capable of booting to a prompt in QEMU (-M palmetto-bmc), on an Palmetto OpenPower development machine, and on the ast2500 EVB. Signed-off-by: Joel Stanley <joel@jms.id.au>
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@ -975,6 +975,13 @@ F: arch/arm/mach-artpec
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F: arch/arm/boot/dts/artpec6*
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F: arch/arm/boot/dts/artpec6*
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F: drivers/clk/clk-artpec6.c
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F: drivers/clk/clk-artpec6.c
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ARM/ASPEED MACHINE SUPPORT
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M: Joel Stanley <joel@jms.id.au>
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S: Maintained
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F: arch/arm/mach-aspeed/
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F: arch/arm/boot/dts/aspeed-*
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F: drivers/*/*aspeed*
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ARM/ATMEL AT91RM9200, AT91SAM9 AND SAMA5 SOC SUPPORT
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ARM/ATMEL AT91RM9200, AT91SAM9 AND SAMA5 SOC SUPPORT
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M: Nicolas Ferre <nicolas.ferre@atmel.com>
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M: Nicolas Ferre <nicolas.ferre@atmel.com>
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M: Alexandre Belloni <alexandre.belloni@free-electrons.com>
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M: Alexandre Belloni <alexandre.belloni@free-electrons.com>
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@ -775,6 +775,8 @@ source "arch/arm/mach-meson/Kconfig"
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source "arch/arm/mach-moxart/Kconfig"
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source "arch/arm/mach-moxart/Kconfig"
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source "arch/arm/mach-aspeed/Kconfig"
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source "arch/arm/mach-mv78xx0/Kconfig"
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source "arch/arm/mach-mv78xx0/Kconfig"
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source "arch/arm/mach-imx/Kconfig"
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source "arch/arm/mach-imx/Kconfig"
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@ -0,0 +1,30 @@
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menuconfig ARCH_ASPEED
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bool "Aspeed BMC architectures"
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depends on ARCH_MULTI_V5 || ARCH_MULTI_V6
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select SRAM
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select WATCHDOG
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select ASPEED_WATCHDOG
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select MOXART_TIMER
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help
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Say Y here if you want to run your kernel on an ASpeed BMC SoC.
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if ARCH_ASPEED
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config MACH_ASPEED_G4
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bool "Aspeed SoC 4th Generation"
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depends on ARCH_MULTI_V5
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select CPU_ARM926T
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help
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Say yes if you intend to run on an Aspeed ast2400 or similar
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fourth generation BMCs, such as those used by OpenPower Power8
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systems.
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config MACH_ASPEED_G5
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bool "Aspeed SoC 5th Generation"
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depends on ARCH_MULTI_V6
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select CPU_V6
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help
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Say yes if you intend to run on an Aspeed ast2500 or similar
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fifth generation Aspeed BMCs.
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endif
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