ARM: dts: add Plymovent M2M board
Plymovent M2M is a control interface produced for the Plymovent filter systems. Co-Developed-by: David Jander <david@protonic.nl> Signed-off-by: David Jander <david@protonic.nl> Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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@ -465,6 +465,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
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imx6dl-pico-hobbit.dtb \
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imx6dl-pico-nymph.dtb \
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imx6dl-pico-pi.dtb \
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imx6dl-plym2m.dtb \
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imx6dl-prtrvt.dtb \
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imx6dl-prtvt7.dtb \
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imx6dl-rex-basic.dtb \
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@ -0,0 +1,446 @@
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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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/*
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* Copyright (c) 2014 Protonic Holland
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* Copyright (c) 2020 Oleksij Rempel <kernel@pengutronix.de>, Pengutronix
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*/
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/dts-v1/;
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/leds/common.h>
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#include "imx6dl.dtsi"
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/ {
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model = "Plymovent M2M board";
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compatible = "ply,plym2m", "fsl,imx6dl";
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chosen {
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stdout-path = &uart4;
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};
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backlight: backlight {
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compatible = "pwm-backlight";
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pwms = <&pwm1 0 5000000 0>;
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brightness-levels = <0 1000>;
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num-interpolated-steps = <20>;
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default-brightness-level = <19>;
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power-supply = <®_12v0>;
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};
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display {
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compatible = "fsl,imx-parallel-display";
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pinctrl-0 = <&pinctrl_ipu1_disp>;
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pinctrl-names = "default";
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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display_in: endpoint {
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remote-endpoint = <&ipu1_di0_disp0>;
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};
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};
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port@1 {
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reg = <1>;
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display_out: endpoint {
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remote-endpoint = <&panel_in>;
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};
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};
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};
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leds {
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compatible = "gpio-leds";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_leds>;
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led-0 {
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label = "debug0";
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function = LED_FUNCTION_STATUS;
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gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>;
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linux,default-trigger = "heartbeat";
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};
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};
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panel {
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compatible = "edt,etm0700g0bdh6";
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backlight = <&backlight>;
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power-supply = <®_3v3>;
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port {
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panel_in: endpoint {
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remote-endpoint = <&display_out>;
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};
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};
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};
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clk50m_phy: phy-clock {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <50000000>;
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};
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reg_3v3: regulator-3v3 {
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compatible = "regulator-fixed";
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regulator-name = "3v3";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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};
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reg_5v0: regulator-5v0 {
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compatible = "regulator-fixed";
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regulator-name = "5v0";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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};
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reg_12v0: regulator-12v0 {
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compatible = "regulator-fixed";
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regulator-name = "12v0";
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regulator-min-microvolt = <12000000>;
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regulator-max-microvolt = <12000000>;
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};
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};
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&can1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_can1>;
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xceiver-supply = <®_5v0>;
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status = "okay";
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};
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&ecspi1 {
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cs-gpios = <&gpio3 19 GPIO_ACTIVE_LOW>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_ecspi1>;
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status = "okay";
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flash@0 {
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compatible = "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <20000000>;
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};
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};
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&ecspi2 {
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cs-gpios = <&gpio2 26 GPIO_ACTIVE_LOW>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_ecspi2>;
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status = "okay";
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touchscreen@0 {
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compatible = "ti,tsc2046";
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reg = <0>;
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pinctrl-0 = <&pinctrl_tsc2046>;
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pinctrl-names ="default";
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spi-max-frequency = <100000>;
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interrupts-extended = <&gpio3 20 IRQ_TYPE_EDGE_FALLING>;
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pendown-gpio = <&gpio3 20 GPIO_ACTIVE_LOW>;
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touchscreen-size-x = <800>;
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touchscreen-size-y = <480>;
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touchscreen-inverted-x;
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touchscreen-inverted-y;
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touchscreen-max-pressure = <4095>;
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ti,vref-delay-usecs = /bits/ 16 <100>;
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ti,x-plate-ohms = /bits/ 16 <800>;
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ti,y-plate-ohms = /bits/ 16 <300>;
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wakeup-source;
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};
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};
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&fec {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_enet>;
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phy-mode = "rmii";
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clocks = <&clks IMX6QDL_CLK_ENET>,
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<&clks IMX6QDL_CLK_ENET>,
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<&clk50m_phy>;
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clock-names = "ipg", "ahb", "ptp";
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phy-handle = <&rgmii_phy>;
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status = "okay";
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mdio {
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#address-cells = <1>;
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#size-cells = <0>;
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/* Microchip KSZ8081RNA PHY */
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rgmii_phy: ethernet-phy@0 {
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reg = <0>;
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interrupts-extended = <&gpio5 23 IRQ_TYPE_LEVEL_LOW>;
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reset-gpios = <&gpio5 22 GPIO_ACTIVE_LOW>;
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reset-assert-us = <10000>;
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reset-deassert-us = <300>;
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};
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};
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};
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&gpio1 {
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gpio-line-names =
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"CAN1_TERM", "SD1_CD", "", "", "", "", "", "",
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"DEBUG_0", "", "", "", "", "", "", "",
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"", "", "", "", "", "", "", "",
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"", "", "", "", "", "", "", "";
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};
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&gpio2 {
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gpio-line-names =
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"", "", "", "", "", "", "", "",
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"", "", "", "", "", "", "", "",
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"", "", "", "", "", "", "", "",
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"", "", "ECSPI2_SS0", "", "", "", "TSC_BUSY", "";
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};
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&gpio3 {
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gpio-line-names =
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"", "", "", "", "", "", "", "",
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"", "", "", "", "", "", "", "",
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"", "", "", "ECSPI1_SS1", "TSC_PENIRQ", "", "", "",
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"", "", "", "", "", "", "", "";
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};
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&gpio4 {
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gpio-line-names =
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"", "", "", "", "", "", "", "",
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"", "", "", "", "CAN1_SR", "", "", "",
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"", "", "", "", "", "", "", "",
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"", "", "", "", "", "", "", "";
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};
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&gpio5 {
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gpio-line-names =
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"", "", "", "", "", "", "", "",
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"", "", "", "", "", "", "", "",
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"", "", "", "", "", "", "ETH_RESET", "ETH_INTRP",
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"", "", "", "", "", "", "", "";
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};
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&i2c1 {
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clock-frequency = <100000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c1>;
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status = "okay";
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/* additional i2c devices are added automatically by the boot loader */
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};
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&i2c3 {
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clock-frequency = <100000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c3>;
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status = "okay";
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temperature-sensor@70 {
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compatible = "ti,tmp103";
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reg = <0x70>;
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};
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};
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&ipu1_di0_disp0 {
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remote-endpoint = <&display_in>;
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};
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&pwm1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_pwm1>;
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status = "okay";
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};
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&uart4 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart4>;
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status = "okay";
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};
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&usbphynop1 {
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status = "disabled";
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};
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&usbphynop2 {
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status = "disabled";
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};
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&usbotg {
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phy_type = "utmi";
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dr_mode = "host";
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disable-over-current;
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status = "okay";
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};
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&usdhc1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usdhc1>;
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cd-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
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no-1-8-v;
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disable-wp;
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cap-sd-highspeed;
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no-mmc;
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no-sdio;
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status = "okay";
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};
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&usdhc3 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usdhc3>;
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bus-width = <8>;
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no-1-8-v;
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non-removable;
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no-sd;
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no-sdio;
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status = "okay";
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};
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&iomuxc {
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pinctrl_can1: can1grp {
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fsl,pins = <
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MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x1b000
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MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x3008
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/* CAN1_SR */
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MX6QDL_PAD_KEY_COL3__GPIO4_IO12 0x13008
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/* CAN1_TERM */
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MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x1b088
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>;
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};
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pinctrl_ecspi1: ecspi1grp {
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fsl,pins = <
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MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x1b000
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MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x3008
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MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x3008
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/* CS */
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MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x3008
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>;
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};
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pinctrl_ecspi2: ecspi2grp {
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fsl,pins = <
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MX6QDL_PAD_EIM_OE__ECSPI2_MISO 0x10000
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MX6QDL_PAD_EIM_CS0__ECSPI2_SCLK 0x3008
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MX6QDL_PAD_EIM_CS1__ECSPI2_MOSI 0x3008
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/* CS */
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MX6QDL_PAD_EIM_RW__GPIO2_IO26 0x3008
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>;
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};
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pinctrl_enet: enetgrp {
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fsl,pins = <
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/* MX6QDL_ENET_PINGRP4 */
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MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
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MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
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MX6QDL_PAD_ENET_RXD0__ENET_RX_DATA0 0x1b0b0
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MX6QDL_PAD_ENET_RXD1__ENET_RX_DATA1 0x1b0b0
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MX6QDL_PAD_ENET_RX_ER__ENET_RX_ER 0x1b0b0
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MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0
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MX6QDL_PAD_ENET_TXD0__ENET_TX_DATA0 0x1b0b0
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MX6QDL_PAD_ENET_TXD1__ENET_TX_DATA1 0x1b0b0
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MX6QDL_PAD_ENET_CRS_DV__ENET_RX_EN 0x1b0b0
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MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x1b0b0
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/* Phy reset */
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MX6QDL_PAD_CSI0_DAT4__GPIO5_IO22 0x1b0b0
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/* nINTRP */
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MX6QDL_PAD_CSI0_DAT5__GPIO5_IO23 0x1b0b0
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>;
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};
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pinctrl_i2c1: i2c1grp {
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fsl,pins = <
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MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001f8b1
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MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001f8b1
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>;
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};
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pinctrl_i2c3: i2c3grp {
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fsl,pins = <
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MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1
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MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
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>;
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};
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pinctrl_ipu1_disp: ipudisp1grp {
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fsl,pins = <
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/* DSE 0x30 => 25 Ohm, 0x20 => 37 Ohm, 0x10 => 75 Ohm */
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MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x30
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MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x30
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MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x30
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MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x30
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MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x30
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MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x30
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MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x30
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MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x30
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MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x30
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MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x30
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MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0x30
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MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07 0x30
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MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08 0x30
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MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09 0x30
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MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10 0x30
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MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11 0x30
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MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12 0x30
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MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13 0x30
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MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14 0x30
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MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15 0x30
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MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16 0x30
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MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17 0x30
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>;
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};
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pinctrl_leds: ledsgrp {
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fsl,pins = <
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MX6QDL_PAD_GPIO_8__GPIO1_IO08 0x1b0b0
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>;
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};
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pinctrl_pwm1: pwm1grp {
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fsl,pins = <
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MX6QDL_PAD_GPIO_9__PWM1_OUT 0x8
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>;
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};
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pinctrl_tsc2046: tsc2046grp {
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fsl,pins = <
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/* TSC_PENIRQ */
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MX6QDL_PAD_EIM_D20__GPIO3_IO20 0x1b0b1
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/* TSC_BUSY */
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MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x1b0b0
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>;
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};
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pinctrl_uart4: uart4grp {
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fsl,pins = <
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MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1
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MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1
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>;
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};
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pinctrl_usdhc1: usdhc1grp {
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fsl,pins = <
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MX6QDL_PAD_SD1_CMD__SD1_CMD 0x170f9
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MX6QDL_PAD_SD1_CLK__SD1_CLK 0x100f9
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MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x170f9
|
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MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x170f9
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MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x170f9
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||||
MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x170f9
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MX6QDL_PAD_GPIO_1__GPIO1_IO01 0x1b0b0
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||||
>;
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||||
};
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pinctrl_usdhc3: usdhc3grp {
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fsl,pins = <
|
||||
MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17099
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||||
MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10099
|
||||
MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17099
|
||||
MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17099
|
||||
MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17099
|
||||
MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17099
|
||||
MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17099
|
||||
MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17099
|
||||
MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17099
|
||||
MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17099
|
||||
MX6QDL_PAD_SD3_RST__SD3_RESET 0x1b0b1
|
||||
>;
|
||||
};
|
||||
};
|
Загрузка…
Ссылка в новой задаче