pinctrl/rockchip: support deferring other gpio params
Add support for deferring other params like PIN_CONFIG_INPUT_ENABLE. This will be used to add support for PIN_CONFIG_INPUT_ENABLE to the driver. Fixes:e7165b1dff
("pinctrl/rockchip: add a queue for deferred pin output settings on probe") Fixes:59dd178e1d
("gpio/rockchip: fetch deferred output settings on probe") Signed-off-by: Caleb Connolly <kc@postmarketos.org> Link: https://lore.kernel.org/r/20220328005005.72492-2-kc@postmarketos.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This commit is contained in:
Родитель
bf3e7f49b4
Коммит
8ce5ef6454
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@ -19,6 +19,7 @@
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#include <linux/of_address.h>
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#include <linux/of_device.h>
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#include <linux/of_irq.h>
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#include <linux/pinctrl/pinconf-generic.h>
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#include <linux/regmap.h>
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#include "../pinctrl/core.h"
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@ -706,7 +707,7 @@ static int rockchip_gpio_probe(struct platform_device *pdev)
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struct device_node *pctlnp = of_get_parent(np);
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struct pinctrl_dev *pctldev = NULL;
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struct rockchip_pin_bank *bank = NULL;
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struct rockchip_pin_output_deferred *cfg;
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struct rockchip_pin_deferred *cfg;
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static int gpio;
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int id, ret;
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@ -747,15 +748,22 @@ static int rockchip_gpio_probe(struct platform_device *pdev)
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return ret;
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}
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while (!list_empty(&bank->deferred_output)) {
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cfg = list_first_entry(&bank->deferred_output,
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struct rockchip_pin_output_deferred, head);
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while (!list_empty(&bank->deferred_pins)) {
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cfg = list_first_entry(&bank->deferred_pins,
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struct rockchip_pin_deferred, head);
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list_del(&cfg->head);
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ret = rockchip_gpio_direction_output(&bank->gpio_chip, cfg->pin, cfg->arg);
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if (ret)
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dev_warn(dev, "setting output pin %u to %u failed\n", cfg->pin, cfg->arg);
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switch (cfg->param) {
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case PIN_CONFIG_OUTPUT:
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ret = rockchip_gpio_direction_output(&bank->gpio_chip, cfg->pin, cfg->arg);
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if (ret)
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dev_warn(dev, "setting output pin %u to %u failed\n", cfg->pin,
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cfg->arg);
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break;
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default:
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dev_warn(dev, "unknown deferred config param %d\n", cfg->param);
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break;
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}
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kfree(cfg);
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}
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@ -2095,19 +2095,20 @@ static bool rockchip_pinconf_pull_valid(struct rockchip_pin_ctrl *ctrl,
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return false;
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}
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static int rockchip_pinconf_defer_output(struct rockchip_pin_bank *bank,
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unsigned int pin, u32 arg)
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static int rockchip_pinconf_defer_pin(struct rockchip_pin_bank *bank,
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unsigned int pin, u32 param, u32 arg)
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{
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struct rockchip_pin_output_deferred *cfg;
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struct rockchip_pin_deferred *cfg;
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cfg = kzalloc(sizeof(*cfg), GFP_KERNEL);
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if (!cfg)
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return -ENOMEM;
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cfg->pin = pin;
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cfg->param = param;
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cfg->arg = arg;
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list_add_tail(&cfg->head, &bank->deferred_output);
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list_add_tail(&cfg->head, &bank->deferred_pins);
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return 0;
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}
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@ -2128,6 +2129,25 @@ static int rockchip_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin,
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param = pinconf_to_config_param(configs[i]);
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arg = pinconf_to_config_argument(configs[i]);
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if (param == (PIN_CONFIG_OUTPUT | PIN_CONFIG_INPUT_ENABLE)) {
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/*
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* Check for gpio driver not being probed yet.
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* The lock makes sure that either gpio-probe has completed
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* or the gpio driver hasn't probed yet.
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*/
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mutex_lock(&bank->deferred_lock);
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if (!gpio || !gpio->direction_output) {
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rc = rockchip_pinconf_defer_pin(bank, pin - bank->pin_base, param,
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arg);
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mutex_unlock(&bank->deferred_lock);
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if (rc)
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return rc;
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break;
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}
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mutex_unlock(&bank->deferred_lock);
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}
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switch (param) {
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case PIN_CONFIG_BIAS_DISABLE:
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rc = rockchip_set_pull(bank, pin - bank->pin_base,
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@ -2156,22 +2176,6 @@ static int rockchip_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin,
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if (rc != RK_FUNC_GPIO)
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return -EINVAL;
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/*
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* Check for gpio driver not being probed yet.
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* The lock makes sure that either gpio-probe has completed
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* or the gpio driver hasn't probed yet.
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*/
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mutex_lock(&bank->deferred_lock);
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if (!gpio || !gpio->direction_output) {
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rc = rockchip_pinconf_defer_output(bank, pin - bank->pin_base, arg);
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mutex_unlock(&bank->deferred_lock);
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if (rc)
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return rc;
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break;
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}
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mutex_unlock(&bank->deferred_lock);
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rc = gpio->direction_output(gpio, pin - bank->pin_base,
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arg);
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if (rc)
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@ -2485,7 +2489,7 @@ static int rockchip_pinctrl_register(struct platform_device *pdev,
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pdesc++;
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}
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INIT_LIST_HEAD(&pin_bank->deferred_output);
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INIT_LIST_HEAD(&pin_bank->deferred_pins);
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mutex_init(&pin_bank->deferred_lock);
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}
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@ -2748,7 +2752,7 @@ static int rockchip_pinctrl_remove(struct platform_device *pdev)
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{
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struct rockchip_pinctrl *info = platform_get_drvdata(pdev);
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struct rockchip_pin_bank *bank;
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struct rockchip_pin_output_deferred *cfg;
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struct rockchip_pin_deferred *cfg;
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int i;
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of_platform_depopulate(&pdev->dev);
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@ -2757,9 +2761,9 @@ static int rockchip_pinctrl_remove(struct platform_device *pdev)
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bank = &info->ctrl->pin_banks[i];
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mutex_lock(&bank->deferred_lock);
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while (!list_empty(&bank->deferred_output)) {
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cfg = list_first_entry(&bank->deferred_output,
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struct rockchip_pin_output_deferred, head);
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while (!list_empty(&bank->deferred_pins)) {
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cfg = list_first_entry(&bank->deferred_pins,
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struct rockchip_pin_deferred, head);
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list_del(&cfg->head);
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kfree(cfg);
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}
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@ -171,7 +171,7 @@ struct rockchip_pin_bank {
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u32 toggle_edge_mode;
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u32 recalced_mask;
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u32 route_mask;
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struct list_head deferred_output;
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struct list_head deferred_pins;
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struct mutex deferred_lock;
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};
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@ -247,9 +247,12 @@ struct rockchip_pin_config {
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unsigned int nconfigs;
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};
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struct rockchip_pin_output_deferred {
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enum pin_config_param;
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struct rockchip_pin_deferred {
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struct list_head head;
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unsigned int pin;
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enum pin_config_param param;
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u32 arg;
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};
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