qla2xxx: Collect additional information to debug fw dump
Signed-off-by: Quinn Tran <quinn.tran@cavium.com> Signed-off-by: Himanshu Madhani <himanshu.madhani@cavium.com> Reviewed-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Bart Van Assche <bart.vanassche@sandisk.com>
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@ -323,20 +323,33 @@ qla2x00_mailbox_command(scsi_qla_host_t *vha, mbx_cmd_t *mcp)
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}
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} else {
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uint16_t mb0;
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uint32_t ictrl;
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uint16_t mb[8];
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uint32_t ictrl, host_status, hccr;
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uint16_t w;
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if (IS_FWI2_CAPABLE(ha)) {
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mb0 = RD_REG_WORD(®->isp24.mailbox0);
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mb[0] = RD_REG_WORD(®->isp24.mailbox0);
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mb[1] = RD_REG_WORD(®->isp24.mailbox1);
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mb[2] = RD_REG_WORD(®->isp24.mailbox2);
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mb[3] = RD_REG_WORD(®->isp24.mailbox3);
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mb[7] = RD_REG_WORD(®->isp24.mailbox7);
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ictrl = RD_REG_DWORD(®->isp24.ictrl);
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host_status = RD_REG_DWORD(®->isp24.host_status);
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hccr = RD_REG_DWORD(®->isp24.hccr);
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ql_log(ql_log_warn, vha, 0x1119,
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"MBX Command timeout for cmd %x, iocontrol=%x jiffies=%lx "
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"mb[0-3]=[0x%x 0x%x 0x%x 0x%x] mb7 0x%x host_status 0x%x hccr 0x%x\n",
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command, ictrl, jiffies, mb[0], mb[1], mb[2], mb[3],
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mb[7], host_status, hccr);
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} else {
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mb0 = RD_MAILBOX_REG(ha, ®->isp, 0);
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mb[0] = RD_MAILBOX_REG(ha, ®->isp, 0);
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ictrl = RD_REG_WORD(®->isp.ictrl);
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ql_dbg(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1119,
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"MBX Command timeout for cmd %x, iocontrol=%x jiffies=%lx "
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"mb[0]=0x%x\n", command, ictrl, jiffies, mb[0]);
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}
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ql_dbg(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1119,
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"MBX Command timeout for cmd %x, iocontrol=%x jiffies=%lx "
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"mb[0]=0x%x\n", command, ictrl, jiffies, mb0);
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ql_dump_regs(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1019);
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/* Capture FW dump only, if PCI device active */
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