serial: amba-pl011: add RS485 support
Add basic support for RS485: Provide a callback to configure RS485 settings. Handle the RS485 specific part in the functions pl011_rs485_tx_start() and pl011_rs485_tx_stop() which extend the generic start/stop callbacks. Beside via IOCTL from userspace RS485 can be enabled by means of the device tree property "rs485-enabled-at-boot-time". Signed-off-by: Lino Sanfilippo <LinoSanfilippo@gmx.de> Link: https://lore.kernel.org/r/20210630225644.3744-1-LinoSanfilippo@gmx.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Lino Sanfilippo
Greg Kroah-Hartman
Родитель
240e126c28
Коммит
8d47923772
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@ -265,6 +265,8 @@ struct uart_amba_port {
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unsigned int old_cr; /* state during shutdown */
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unsigned int fixed_baud; /* vendor-set fixed baud rate */
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char type[12];
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bool rs485_tx_started;
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unsigned int rs485_tx_drain_interval; /* usecs */
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#ifdef CONFIG_DMA_ENGINE
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/* DMA stuff */
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bool using_tx_dma;
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@ -275,6 +277,8 @@ struct uart_amba_port {
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#endif
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};
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static unsigned int pl011_tx_empty(struct uart_port *port);
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static unsigned int pl011_reg_to_offset(const struct uart_amba_port *uap,
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unsigned int reg)
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{
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@ -1282,6 +1286,42 @@ static inline bool pl011_dma_rx_running(struct uart_amba_port *uap)
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#define pl011_dma_flush_buffer NULL
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#endif
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static void pl011_rs485_tx_stop(struct uart_amba_port *uap)
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{
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struct uart_port *port = &uap->port;
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int i = 0;
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u32 cr;
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/* Wait until hardware tx queue is empty */
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while (!pl011_tx_empty(port)) {
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if (i == port->fifosize) {
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dev_warn(port->dev,
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"timeout while draining hardware tx queue\n");
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break;
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}
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udelay(uap->rs485_tx_drain_interval);
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i++;
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}
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if (port->rs485.delay_rts_after_send)
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mdelay(port->rs485.delay_rts_after_send);
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cr = pl011_read(uap, REG_CR);
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if (port->rs485.flags & SER_RS485_RTS_AFTER_SEND)
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cr &= ~UART011_CR_RTS;
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else
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cr |= UART011_CR_RTS;
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/* Disable the transmitter and reenable the transceiver */
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cr &= ~UART011_CR_TXE;
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cr |= UART011_CR_RXE;
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pl011_write(cr, uap, REG_CR);
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uap->rs485_tx_started = false;
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}
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static void pl011_stop_tx(struct uart_port *port)
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{
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struct uart_amba_port *uap =
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@ -1290,6 +1330,9 @@ static void pl011_stop_tx(struct uart_port *port)
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uap->im &= ~UART011_TXIM;
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pl011_write(uap->im, uap, REG_IMSC);
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pl011_dma_tx_stop(uap);
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if ((port->rs485.flags & SER_RS485_ENABLED) && uap->rs485_tx_started)
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pl011_rs485_tx_stop(uap);
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}
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static bool pl011_tx_chars(struct uart_amba_port *uap, bool from_irq);
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@ -1380,6 +1423,32 @@ static bool pl011_tx_char(struct uart_amba_port *uap, unsigned char c,
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return true;
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}
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static void pl011_rs485_tx_start(struct uart_amba_port *uap)
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{
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struct uart_port *port = &uap->port;
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u32 cr;
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/* Enable transmitter */
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cr = pl011_read(uap, REG_CR);
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cr |= UART011_CR_TXE;
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/* Disable receiver if half-duplex */
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if (!(port->rs485.flags & SER_RS485_RX_DURING_TX))
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cr &= ~UART011_CR_RXE;
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if (port->rs485.flags & SER_RS485_RTS_ON_SEND)
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cr &= ~UART011_CR_RTS;
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else
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cr |= UART011_CR_RTS;
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pl011_write(cr, uap, REG_CR);
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if (port->rs485.delay_rts_before_send)
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mdelay(port->rs485.delay_rts_before_send);
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uap->rs485_tx_started = true;
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}
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/* Returns true if tx interrupts have to be (kept) enabled */
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static bool pl011_tx_chars(struct uart_amba_port *uap, bool from_irq)
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{
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@ -1397,6 +1466,10 @@ static bool pl011_tx_chars(struct uart_amba_port *uap, bool from_irq)
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return false;
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}
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if ((uap->port.rs485.flags & SER_RS485_ENABLED) &&
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!uap->rs485_tx_started)
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pl011_rs485_tx_start(uap);
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/* If we are using DMA mode, try to send some characters. */
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if (pl011_dma_tx_irq(uap))
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return true;
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@ -1542,6 +1615,9 @@ static void pl011_set_mctrl(struct uart_port *port, unsigned int mctrl)
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container_of(port, struct uart_amba_port, port);
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unsigned int cr;
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if (port->rs485.flags & SER_RS485_ENABLED)
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mctrl &= ~TIOCM_RTS;
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cr = pl011_read(uap, REG_CR);
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#define TIOCMBIT(tiocmbit, uartbit) \
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@ -1763,7 +1839,17 @@ static int pl011_startup(struct uart_port *port)
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/* restore RTS and DTR */
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cr = uap->old_cr & (UART011_CR_RTS | UART011_CR_DTR);
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cr |= UART01x_CR_UARTEN | UART011_CR_RXE | UART011_CR_TXE;
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cr |= UART01x_CR_UARTEN | UART011_CR_RXE;
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if (port->rs485.flags & SER_RS485_ENABLED) {
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if (port->rs485.flags & SER_RS485_RTS_AFTER_SEND)
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cr &= ~UART011_CR_RTS;
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else
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cr |= UART011_CR_RTS;
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} else {
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cr |= UART011_CR_TXE;
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}
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pl011_write(cr, uap, REG_CR);
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spin_unlock_irq(&uap->port.lock);
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@ -1864,6 +1950,9 @@ static void pl011_shutdown(struct uart_port *port)
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pl011_dma_shutdown(uap);
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if ((port->rs485.flags & SER_RS485_ENABLED) && uap->rs485_tx_started)
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pl011_rs485_tx_stop(uap);
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free_irq(uap->port.irq, uap);
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pl011_disable_uart(uap);
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@ -1941,6 +2030,7 @@ pl011_set_termios(struct uart_port *port, struct ktermios *termios,
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unsigned int lcr_h, old_cr;
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unsigned long flags;
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unsigned int baud, quot, clkdiv;
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unsigned int bits;
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if (uap->vendor->oversampling)
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clkdiv = 8;
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@ -1991,6 +2081,8 @@ pl011_set_termios(struct uart_port *port, struct ktermios *termios,
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if (uap->fifosize > 1)
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lcr_h |= UART01x_LCRH_FEN;
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bits = tty_get_frame_size(termios->c_cflag);
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spin_lock_irqsave(&port->lock, flags);
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/*
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@ -1998,11 +2090,21 @@ pl011_set_termios(struct uart_port *port, struct ktermios *termios,
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*/
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uart_update_timeout(port, termios->c_cflag, baud);
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/*
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* Calculate the approximated time it takes to transmit one character
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* with the given baud rate. We use this as the poll interval when we
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* wait for the tx queue to empty.
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*/
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uap->rs485_tx_drain_interval = (bits * 1000 * 1000) / baud;
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pl011_setup_status_masks(port, termios);
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if (UART_ENABLE_MS(port, termios->c_cflag))
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pl011_enable_ms(port);
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if (port->rs485.flags & SER_RS485_ENABLED)
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termios->c_cflag &= ~CRTSCTS;
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/* first, disable everything */
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old_cr = pl011_read(uap, REG_CR);
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pl011_write(0, uap, REG_CR);
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@ -2124,6 +2226,41 @@ static int pl011_verify_port(struct uart_port *port, struct serial_struct *ser)
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return ret;
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}
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static int pl011_rs485_config(struct uart_port *port,
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struct serial_rs485 *rs485)
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{
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struct uart_amba_port *uap =
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container_of(port, struct uart_amba_port, port);
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/* pick sane settings if the user hasn't */
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if (!(rs485->flags & SER_RS485_RTS_ON_SEND) ==
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!(rs485->flags & SER_RS485_RTS_AFTER_SEND)) {
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rs485->flags |= SER_RS485_RTS_ON_SEND;
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rs485->flags &= ~SER_RS485_RTS_AFTER_SEND;
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}
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/* clamp the delays to [0, 100ms] */
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rs485->delay_rts_before_send = min(rs485->delay_rts_before_send, 100U);
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rs485->delay_rts_after_send = min(rs485->delay_rts_after_send, 100U);
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memset(rs485->padding, 0, sizeof(rs485->padding));
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if (port->rs485.flags & SER_RS485_ENABLED)
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pl011_rs485_tx_stop(uap);
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/* Set new configuration */
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port->rs485 = *rs485;
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/* Make sure auto RTS is disabled */
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if (port->rs485.flags & SER_RS485_ENABLED) {
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u32 cr = pl011_read(uap, REG_CR);
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cr &= ~UART011_CR_RTSEN;
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pl011_write(cr, uap, REG_CR);
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port->status &= ~UPSTAT_AUTORTS;
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}
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return 0;
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}
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static const struct uart_ops amba_pl011_pops = {
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.tx_empty = pl011_tx_empty,
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.set_mctrl = pl011_set_mctrl,
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@ -2588,10 +2725,28 @@ static int pl011_find_free_port(void)
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return -EBUSY;
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}
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static int pl011_get_rs485_mode(struct uart_amba_port *uap)
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{
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struct uart_port *port = &uap->port;
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struct serial_rs485 *rs485 = &port->rs485;
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int ret;
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ret = uart_get_rs485_mode(port);
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if (ret)
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return ret;
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/* clamp the delays to [0, 100ms] */
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rs485->delay_rts_before_send = min(rs485->delay_rts_before_send, 100U);
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rs485->delay_rts_after_send = min(rs485->delay_rts_after_send, 100U);
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return 0;
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}
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static int pl011_setup_port(struct device *dev, struct uart_amba_port *uap,
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struct resource *mmiobase, int index)
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{
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void __iomem *base;
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int ret;
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base = devm_ioremap_resource(dev, mmiobase);
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if (IS_ERR(base))
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@ -2608,6 +2763,10 @@ static int pl011_setup_port(struct device *dev, struct uart_amba_port *uap,
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uap->port.flags = UPF_BOOT_AUTOCONF;
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uap->port.line = index;
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ret = pl011_get_rs485_mode(uap);
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if (ret)
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return ret;
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amba_ports[index] = uap;
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return 0;
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@ -2665,7 +2824,7 @@ static int pl011_probe(struct amba_device *dev, const struct amba_id *id)
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uap->port.iotype = vendor->access_32b ? UPIO_MEM32 : UPIO_MEM;
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uap->port.irq = dev->irq[0];
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uap->port.ops = &amba_pl011_pops;
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uap->port.rs485_config = pl011_rs485_config;
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snprintf(uap->type, sizeof(uap->type), "PL011 rev%u", amba_rev(dev));
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ret = pl011_setup_port(&dev->dev, uap, &dev->res, portnr);
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