From c2e1445c2a25ccc28054200ef3921decbfae4bf9 Mon Sep 17 00:00:00 2001 From: Bjorn Andersson Date: Tue, 20 Oct 2015 21:57:44 -0700 Subject: [PATCH 01/24] ARM: dts: qcom: msm8974-honami: Define pinctrl state for blsp_uart2 Make sure the blsp1_uart2 pins are in the correct state for the uart. Signed-off-by: Bjorn Andersson Signed-off-by: Andy Gross --- .../dts/qcom-msm8974-sony-xperia-honami.dts | 23 +++++++++++++++++++ 1 file changed, 23 insertions(+) diff --git a/arch/arm/boot/dts/qcom-msm8974-sony-xperia-honami.dts b/arch/arm/boot/dts/qcom-msm8974-sony-xperia-honami.dts index 016f9ad9392a..6f7e4ef4ccf7 100644 --- a/arch/arm/boot/dts/qcom-msm8974-sony-xperia-honami.dts +++ b/arch/arm/boot/dts/qcom-msm8974-sony-xperia-honami.dts @@ -23,6 +23,29 @@ &soc { serial@f991e000 { status = "ok"; + + pinctrl-names = "default"; + pinctrl-0 = <&blsp1_uart2_pin_a>; + }; + + pinctrl@fd510000 { + blsp1_uart2_pin_a: blsp1-uart2-pin-active { + rx { + pins = "gpio5"; + function = "blsp_uart2"; + + drive-strength = <2>; + bias-pull-up; + }; + + tx { + pins = "gpio4"; + function = "blsp_uart2"; + + drive-strength = <4>; + bias-disable; + }; + }; }; }; From 0c808ab5ea1e13c45d1e87c0dc183bee7121457f Mon Sep 17 00:00:00 2001 From: Bjorn Andersson Date: Tue, 20 Oct 2015 21:57:45 -0700 Subject: [PATCH 02/24] ARM: dts: qcom: msm8974-honami: Add regulator nodes for Honami Signed-off-by: Bjorn Andersson Signed-off-by: Andy Gross --- .../dts/qcom-msm8974-sony-xperia-honami.dts | 226 ++++++++++++++++++ 1 file changed, 226 insertions(+) diff --git a/arch/arm/boot/dts/qcom-msm8974-sony-xperia-honami.dts b/arch/arm/boot/dts/qcom-msm8974-sony-xperia-honami.dts index 6f7e4ef4ccf7..5768c97bb124 100644 --- a/arch/arm/boot/dts/qcom-msm8974-sony-xperia-honami.dts +++ b/arch/arm/boot/dts/qcom-msm8974-sony-xperia-honami.dts @@ -1,6 +1,8 @@ #include "qcom-msm8974.dtsi" #include "qcom-pm8841.dtsi" #include "qcom-pm8941.dtsi" +#include +#include / { model = "Sony Xperia Z1"; @@ -18,6 +20,223 @@ reg = <0 0x40000000>, <0x40000000 0x40000000>; device_type = "memory"; }; + + smd { + rpm { + rpm_requests { + pm8841-regulators { + s1 { + regulator-min-microvolt = <675000>; + regulator-max-microvolt = <1050000>; + }; + + s2 { + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1050000>; + }; + + s3 { + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1050000>; + }; + + s4 { + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1050000>; + }; + }; + + pm8941-regulators { + vdd_l1_l3-supply = <&pm8941_s1>; + vdd_l2_lvs1_2_3-supply = <&pm8941_s3>; + vdd_l4_l11-supply = <&pm8941_s1>; + vdd_l5_l7-supply = <&pm8941_s2>; + vdd_l6_l12_l14_l15-supply = <&pm8941_s2>; + vdd_l9_l10_l17_l22-supply = <&vreg_boost>; + vdd_l13_l20_l23_l24-supply = <&vreg_boost>; + vdd_l21-supply = <&vreg_boost>; + vin_5vs-supply = <&pm8941_5v>; + + s1 { + regulator-min-microvolt = <1300000>; + regulator-max-microvolt = <1300000>; + regulator-always-on; + regulator-boot-on; + }; + + s2 { + regulator-min-microvolt = <2150000>; + regulator-max-microvolt = <2150000>; + regulator-boot-on; + }; + + s3 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-boot-on; + }; + + s4 { + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + }; + + l1 { + regulator-min-microvolt = <1225000>; + regulator-max-microvolt = <1225000>; + + regulator-always-on; + regulator-boot-on; + }; + + l2 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + }; + + l3 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + }; + + l4 { + regulator-min-microvolt = <1225000>; + regulator-max-microvolt = <1225000>; + }; + + l5 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + l6 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + + regulator-boot-on; + }; + + l7 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + + regulator-boot-on; + }; + + l8 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + l9 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <2950000>; + }; + + l11 { + regulator-min-microvolt = <1300000>; + regulator-max-microvolt = <1350000>; + }; + + l12 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + + regulator-always-on; + regulator-boot-on; + }; + + l13 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <2950000>; + + regulator-boot-on; + }; + + l14 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + l15 { + regulator-min-microvolt = <2050000>; + regulator-max-microvolt = <2050000>; + }; + + l16 { + regulator-min-microvolt = <2700000>; + regulator-max-microvolt = <2700000>; + }; + + l17 { + regulator-min-microvolt = <2700000>; + regulator-max-microvolt = <2700000>; + }; + + l18 { + regulator-min-microvolt = <2850000>; + regulator-max-microvolt = <2850000>; + }; + + l19 { + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + + l20 { + regulator-min-microvolt = <2950000>; + regulator-max-microvolt = <2950000>; + + regulator-allow-set-load; + regulator-boot-on; + regulator-system-load = <200000>; + }; + + l21 { + regulator-min-microvolt = <2950000>; + regulator-max-microvolt = <2950000>; + + regulator-boot-on; + }; + + l22 { + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + }; + + l23 { + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + }; + + l24 { + regulator-min-microvolt = <3075000>; + regulator-max-microvolt = <3075000>; + + regulator-boot-on; + }; + }; + }; + }; + }; + + vreg_boost: vreg-boost { + compatible = "regulator-fixed"; + + regulator-name = "vreg-boost"; + regulator-min-microvolt = <3150000>; + regulator-max-microvolt = <3150000>; + + regulator-always-on; + regulator-boot-on; + + gpio = <&pm8941_gpios 21 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-names = "default"; + pinctrl-0 = <&boost_bypass_n_pin>; + }; }; &soc { @@ -51,6 +270,13 @@ &spmi_bus { pm8941@0 { + gpios@c000 { + boost_bypass_n_pin: boost-bypass { + pins = "gpio21"; + function = "normal"; + }; + }; + coincell@2800 { status = "ok"; qcom,rset-ohms = <2100>; From e29d22e08eec3a2278e1aa84ea79892e69439cb6 Mon Sep 17 00:00:00 2001 From: Bjorn Andersson Date: Tue, 20 Oct 2015 21:57:46 -0700 Subject: [PATCH 03/24] ARM: dts: qcom: msm8974-honami: Introduce gpio-keys Introduce a gpio-keys node defining the physical keys of the Honami and the associated pinctrl state. Signed-off-by: Bjorn Andersson Signed-off-by: Andy Gross --- .../dts/qcom-msm8974-sony-xperia-honami.dts | 45 +++++++++++++++++++ 1 file changed, 45 insertions(+) diff --git a/arch/arm/boot/dts/qcom-msm8974-sony-xperia-honami.dts b/arch/arm/boot/dts/qcom-msm8974-sony-xperia-honami.dts index 5768c97bb124..d30f407b04d3 100644 --- a/arch/arm/boot/dts/qcom-msm8974-sony-xperia-honami.dts +++ b/arch/arm/boot/dts/qcom-msm8974-sony-xperia-honami.dts @@ -2,6 +2,7 @@ #include "qcom-pm8841.dtsi" #include "qcom-pm8941.dtsi" #include +#include #include / { @@ -16,6 +17,42 @@ stdout-path = "serial0:115200n8"; }; + gpio-keys { + compatible = "gpio-keys"; + input-name = "gpio-keys"; + + pinctrl-names = "default"; + pinctrl-0 = <&gpio_keys_pin_a>; + + volume-down { + label = "volume_down"; + gpios = <&pm8941_gpios 2 GPIO_ACTIVE_LOW>; + linux,input-type = <1>; + linux,code = ; + }; + + camera-snapshot { + label = "camera_snapshot"; + gpios = <&pm8941_gpios 3 GPIO_ACTIVE_LOW>; + linux,input-type = <1>; + linux,code = ; + }; + + camera-focus { + label = "camera_focus"; + gpios = <&pm8941_gpios 4 GPIO_ACTIVE_LOW>; + linux,input-type = <1>; + linux,code = ; + }; + + volume-up { + label = "volume_up"; + gpios = <&pm8941_gpios 5 GPIO_ACTIVE_LOW>; + linux,input-type = <1>; + linux,code = ; + }; + }; + memory@0 { reg = <0 0x40000000>, <0x40000000 0x40000000>; device_type = "memory"; @@ -275,6 +312,14 @@ pins = "gpio21"; function = "normal"; }; + + gpio_keys_pin_a: gpio-keys-active { + pins = "gpio2", "gpio3", "gpio4", "gpio5"; + function = "normal"; + + bias-pull-up; + power-source = ; + }; }; coincell@2800 { From f44cfceed9b444a959cfca09d8ea9736ad3627a1 Mon Sep 17 00:00:00 2001 From: Bjorn Andersson Date: Tue, 20 Oct 2015 21:57:47 -0700 Subject: [PATCH 04/24] ARM: dts: qcom: msm8974-honami: Add sdhci1 node Introduce the eMMC sdhci node and its pinctrl state. Signed-off-by: Bjorn Andersson Signed-off-by: Andy Gross --- .../dts/qcom-msm8974-sony-xperia-honami.dts | 27 +++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/arch/arm/boot/dts/qcom-msm8974-sony-xperia-honami.dts b/arch/arm/boot/dts/qcom-msm8974-sony-xperia-honami.dts index d30f407b04d3..5f68eb270774 100644 --- a/arch/arm/boot/dts/qcom-msm8974-sony-xperia-honami.dts +++ b/arch/arm/boot/dts/qcom-msm8974-sony-xperia-honami.dts @@ -277,6 +277,19 @@ }; &soc { + sdhci@f9824900 { + status = "ok"; + + vmmc-supply = <&pm8941_l20>; + vqmmc-supply = <&pm8941_s3>; + + bus-width = <8>; + non-removable; + + pinctrl-names = "default"; + pinctrl-0 = <&sdhc1_pin_a>; + }; + serial@f991e000 { status = "ok"; @@ -302,6 +315,20 @@ bias-disable; }; }; + + sdhc1_pin_a: sdhc1-pin-active { + clk { + pins = "sdc1_clk"; + drive-strength = <16>; + bias-disable; + }; + + cmd-data { + pins = "sdc1_cmd", "sdc1_data"; + drive-strength = <10>; + bias-pull-up; + }; + }; }; }; From b9526a81ba92d648cb542e6053a25293b113f991 Mon Sep 17 00:00:00 2001 From: Bjorn Andersson Date: Tue, 20 Oct 2015 21:57:48 -0700 Subject: [PATCH 05/24] ARM: dts: qcom: msm8974-honami: Add uSD slot nodes Add and enable the sdhci2 slot, the pinctrl configuration and card detect. Signed-off-by: Bjorn Andersson Signed-off-by: Andy Gross --- .../dts/qcom-msm8974-sony-xperia-honami.dts | 37 +++++++++++++++++++ 1 file changed, 37 insertions(+) diff --git a/arch/arm/boot/dts/qcom-msm8974-sony-xperia-honami.dts b/arch/arm/boot/dts/qcom-msm8974-sony-xperia-honami.dts index 5f68eb270774..e7e796888a21 100644 --- a/arch/arm/boot/dts/qcom-msm8974-sony-xperia-honami.dts +++ b/arch/arm/boot/dts/qcom-msm8974-sony-xperia-honami.dts @@ -290,6 +290,20 @@ pinctrl-0 = <&sdhc1_pin_a>; }; + sdhci@f98a4900 { + status = "ok"; + + bus-width = <4>; + + vmmc-supply = <&pm8941_l21>; + vqmmc-supply = <&pm8941_l13>; + + cd-gpios = <&msmgpio 62 GPIO_ACTIVE_LOW>; + + pinctrl-names = "default"; + pinctrl-0 = <&sdhc2_pin_a>, <&sdhc2_cd_pin_a>; + }; + serial@f991e000 { status = "ok"; @@ -329,6 +343,29 @@ bias-pull-up; }; }; + + sdhc2_cd_pin_a: sdhc2-cd-pin-active { + pins = "gpio62"; + function = "gpio"; + + drive-strength = <2>; + bias-disable; + }; + + sdhc2_pin_a: sdhc2-pin-active { + clk { + pins = "sdc2_clk"; + drive-strength = <10>; + bias-disable; + }; + + cmd-data { + pins = "sdc2_cmd", "sdc2_data"; + drive-strength = <6>; + bias-pull-up; + }; + }; + }; }; From 76be038cab30796e3a27d34b5dd7e46169fcc78a Mon Sep 17 00:00:00 2001 From: Bjorn Andersson Date: Tue, 20 Oct 2015 21:57:49 -0700 Subject: [PATCH 06/24] ARM: dts: qcom: msm8974-honami: Specify charging parameters Signed-off-by: Bjorn Andersson Signed-off-by: Andy Gross --- arch/arm/boot/dts/qcom-msm8974-sony-xperia-honami.dts | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/arch/arm/boot/dts/qcom-msm8974-sony-xperia-honami.dts b/arch/arm/boot/dts/qcom-msm8974-sony-xperia-honami.dts index e7e796888a21..37741725b7bd 100644 --- a/arch/arm/boot/dts/qcom-msm8974-sony-xperia-honami.dts +++ b/arch/arm/boot/dts/qcom-msm8974-sony-xperia-honami.dts @@ -371,6 +371,17 @@ &spmi_bus { pm8941@0 { + charger@1000 { + qcom,fast-charge-safe-current = <1500000>; + qcom,fast-charge-current-limit = <1500000>; + qcom,dc-current-limit = <1800000>; + qcom,fast-charge-safe-voltage = <4400000>; + qcom,fast-charge-high-threshold-voltage = <4350000>; + qcom,fast-charge-low-threshold-voltage = <3400000>; + qcom,auto-recharge-threshold-voltage = <4200000>; + qcom,minimum-input-voltage = <4300000>; + }; + gpios@c000 { boost_bypass_n_pin: boost-bypass { pins = "gpio21"; From 6a607e03bab31104e8ba53b38598b66d78b4f8ee Mon Sep 17 00:00:00 2001 From: John Stultz Date: Fri, 18 Sep 2015 13:31:12 +0100 Subject: [PATCH 07/24] devicetree: Add hardware rng entry to qcom-apq8064.dtsi Add devicetree data to add support for hw_rng support to the apq8064 dts. Tested on the Nexus7 (2013). Cc: Kumar Gala Cc: Stephen Boyd Cc: Srinivas Kandagatla Cc: devicetree@vger.kernel.org Reviewed-by: Stephen Boyd Signed-off-by: John Stultz Reviewed-by: Bjorn Andersson Signed-off-by: Andy Gross --- arch/arm/boot/dts/qcom-apq8064.dtsi | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi index a4c1762b53ea..42286c634d1e 100644 --- a/arch/arm/boot/dts/qcom-apq8064.dtsi +++ b/arch/arm/boot/dts/qcom-apq8064.dtsi @@ -336,6 +336,13 @@ }; }; + rng@1a500000 { + compatible = "qcom,prng"; + reg = <0x1a500000 0x200>; + clocks = <&gcc PRNG_CLK>; + clock-names = "core"; + }; + qcom,ssbi@500000 { compatible = "qcom,ssbi"; reg = <0x00500000 0x1000>; From eab5c6bc5210e34f34bd93191c19cfbe762c2cad Mon Sep 17 00:00:00 2001 From: Bjorn Andersson Date: Thu, 24 Sep 2015 18:24:59 -0700 Subject: [PATCH 08/24] dt-binding: soc: qcom: Add Qualcomm SMSM device tree documentation This documents a device tree binding for the Qualcomm Shared Memory State Machine. Signed-off-by: Bjorn Andersson Signed-off-by: Andy Gross --- .../bindings/soc/qcom/qcom,smsm.txt | 104 ++++++++++++++++++ 1 file changed, 104 insertions(+) create mode 100644 Documentation/devicetree/bindings/soc/qcom/qcom,smsm.txt diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,smsm.txt b/Documentation/devicetree/bindings/soc/qcom/qcom,smsm.txt new file mode 100644 index 000000000000..a6634c70850d --- /dev/null +++ b/Documentation/devicetree/bindings/soc/qcom/qcom,smsm.txt @@ -0,0 +1,104 @@ +Qualcomm Shared Memory State Machine + +The Shared Memory State Machine facilitates broadcasting of single bit state +information between the processors in a Qualcomm SoC. Each processor is +assigned 32 bits of state that can be modified. A processor can through a +matrix of bitmaps signal subscription of notifications upon changes to a +certain bit owned by a certain remote processor. + +- compatible: + Usage: required + Value type: + Definition: must be one of: + "qcom,smsm" + +- qcom,ipc-N: + Usage: required + Value type: + Definition: three entries specifying the outgoing ipc bit used for + signaling the N:th remote processor + - phandle to a syscon node representing the apcs registers + - u32 representing offset to the register within the syscon + - u32 representing the ipc bit within the register + +- qcom,local-host: + Usage: optional + Value type: + Definition: identifier of the local processor in the list of hosts, or + in other words specifier of the column in the subscription + matrix representing the local processor + defaults to host 0 + +- #address-cells: + Usage: required + Value type: + Definition: must be 1 + +- #size-cells: + Usage: required + Value type: + Definition: must be 0 + += SUBNODES +Each processor's state bits are described by a subnode of the smsm device node. +Nodes can either be flagged as an interrupt-controller to denote a remote +processor's state bits or the local processors bits. The node names are not +important. + +- reg: + Usage: required + Value type: + Definition: specifies the offset, in words, of the first bit for this + entry + +- #qcom,state-cells: + Usage: required for local entry + Value type: + Definition: must be 1 - denotes bit number + +- interrupt-controller: + Usage: required for remote entries + Value type: + Definition: marks the entry as a interrupt-controller and the state bits + to belong to a remote processor + +- #interrupt-cells: + Usage: required for remote entries + Value type: + Definition: must be 2 - denotes bit number and IRQ flags + +- interrupts: + Usage: required for remote entries + Value type: + Definition: one entry specifying remote IRQ used by the remote processor + to signal changes of its state bits + + += EXAMPLE +The following example shows the SMEM setup for controlling properties of the +wireless processor, defined from the 8974 apps processor's point-of-view. It +encompasses one outbound entry and the outgoing interrupt for the wireless +processor. + +smsm { + compatible = "qcom,smsm"; + + #address-cells = <1>; + #size-cells = <0>; + + qcom,ipc-3 = <&apcs 8 19>; + + apps_smsm: apps@0 { + reg = <0>; + + #qcom,state-cells = <1>; + }; + + wcnss_smsm: wcnss@7 { + reg = <7>; + interrupts = <0 144 1>; + + interrupt-controller; + #interrupt-cells = <2>; + }; +}; From 2f5de46c598caba441da75b679f43def795936e7 Mon Sep 17 00:00:00 2001 From: Bjorn Andersson Date: Thu, 24 Sep 2015 18:25:00 -0700 Subject: [PATCH 09/24] dt-binding: soc: qcom: Introduce qcom, smp2p binding documentation Introduce binding documentation for the Qualcomm Shared Memory Point 2 Point protocol. Signed-off-by: Bjorn Andersson Signed-off-by: Andy Gross --- .../bindings/soc/qcom/qcom,smp2p.txt | 104 ++++++++++++++++++ 1 file changed, 104 insertions(+) create mode 100644 Documentation/devicetree/bindings/soc/qcom/qcom,smp2p.txt diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,smp2p.txt b/Documentation/devicetree/bindings/soc/qcom/qcom,smp2p.txt new file mode 100644 index 000000000000..5cc82b8353d8 --- /dev/null +++ b/Documentation/devicetree/bindings/soc/qcom/qcom,smp2p.txt @@ -0,0 +1,104 @@ +Qualcomm Shared Memory Point 2 Point binding + +The Shared Memory Point to Point (SMP2P) protocol facilitates communication of +a single 32-bit value between two processors. Each value has a single writer +(the local side) and a single reader (the remote side). Values are uniquely +identified in the system by the directed edge (local processor ID to remote +processor ID) and a string identifier. + +- compatible: + Usage: required + Value type: + Definition: must be one of: + "qcom,smp2p" + +- interrupts: + Usage: required + Value type: + Definition: one entry specifying the smp2p notification interrupt + +- qcom,ipc: + Usage: required + Value type: + Definition: three entries specifying the outgoing ipc bit used for + signaling the remote end of the smp2p edge: + - phandle to a syscon node representing the apcs registers + - u32 representing offset to the register within the syscon + - u32 representing the ipc bit within the register + +- qcom,smem: + Usage: required + Value type: + Definition: two identifiers of the inbound and outbound smem items used + for this edge + +- qcom,local-pid: + Usage: required + Value type: + Definition: specifies the identfier of the local endpoint of this edge + +- qcom,remote-pid: + Usage: required + Value type: + Definition: specifies the identfier of the remote endpoint of this edge + += SUBNODES +Each SMP2P pair contain a set of inbound and outbound entries, these are +described in subnodes of the smp2p device node. The node names are not +important. + +- qcom,entry-name: + Usage: required + Value type: + Definition: specifies the name of this entry, for inbound entries this + will be used to match against the remotely allocated entry + and for outbound entries this name is used for allocating + entries + +- interrupt-controller: + Usage: required for incoming entries + Value type: + Definition: marks the entry as inbound; the node should be specified + as a two cell interrupt-controller as defined in + "../interrupt-controller/interrupts.txt" + If not specified this node will denote the outgoing entry + +- #interrupt-cells: + Usage: required for incoming entries + Value type: + Definition: must be 2 - denoting the bit in the entry and IRQ flags + +- #qcom,state-cells: + Usage: required for outgoing entries + Value type: + Definition: must be 1 - denoting the bit in the entry + += EXAMPLE +The following example shows the SMP2P setup with the wireless processor, +defined from the 8974 apps processor's point-of-view. It encompasses one +inbound and one outbound entry: + +wcnss-smp2p { + compatible = "qcom,smp2p"; + qcom,smem = <431>, <451>; + + interrupts = <0 143 1>; + + qcom,ipc = <&apcs 8 18>; + + qcom,local-pid = <0>; + qcom,remote-pid = <4>; + + wcnss_smp2p_out: master-kernel { + qcom,entry-name = "master-kernel"; + + #qcom,state-cells = <1>; + }; + + wcnss_smp2p_in: slave-kernel { + qcom,entry-name = "slave-kernel"; + + interrupt-controller; + #interrupt-cells = <2>; + }; +}; From 24a9baf933dcee97864ba6b4412cb7d33facac7b Mon Sep 17 00:00:00 2001 From: Bjorn Andersson Date: Thu, 22 Oct 2015 11:13:48 -0700 Subject: [PATCH 10/24] ARM: dts: qcom: apq8064: Add hwmutex and SMEM nodes Signed-off-by: Bjorn Andersson Signed-off-by: Andy Gross --- arch/arm/boot/dts/qcom-apq8064.dtsi | 29 +++++++++++++++++++++++++++++ 1 file changed, 29 insertions(+) diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi index 42286c634d1e..a72e1226372b 100644 --- a/arch/arm/boot/dts/qcom-apq8064.dtsi +++ b/arch/arm/boot/dts/qcom-apq8064.dtsi @@ -11,6 +11,17 @@ compatible = "qcom,apq8064"; interrupt-parent = <&intc>; + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + smem_region: smem@80000000 { + reg = <0x80000000 0x200000>; + no-map; + }; + }; + cpus { #address-cells = <1>; #size-cells = <0>; @@ -80,6 +91,19 @@ interrupts = <1 10 0x304>; }; + sfpb_mutex: hwmutex { + compatible = "qcom,sfpb-mutex"; + syscon = <&sfpb_wrapper_mutex 0x604 0x4>; + #hwlock-cells = <1>; + }; + + smem { + compatible = "qcom,smem"; + memory-region = <&smem_region>; + + hwlocks = <&sfpb_mutex 3>; + }; + soc: soc { #address-cells = <1>; #size-cells = <1>; @@ -156,6 +180,11 @@ }; }; + sfpb_wrapper_mutex: syscon@1200000 { + compatible = "syscon"; + reg = <0x01200000 0x8000>; + }; + intc: interrupt-controller@2000000 { compatible = "qcom,msm-qgic2"; interrupt-controller; From 2bce6e26364108ce80903e9ec8702dd4ae17b0d5 Mon Sep 17 00:00:00 2001 From: Bjorn Andersson Date: Thu, 22 Oct 2015 11:13:49 -0700 Subject: [PATCH 11/24] ARM: dts: qcom: apq8064: Declare all pm8921 regulators Consolidate all labeling of regulators into the core 8064 dtsi file to make them available from all other dts files. Signed-off-by: Bjorn Andersson Signed-off-by: Andy Gross --- arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts | 16 +++---- arch/arm/boot/dts/qcom-apq8064-ifc6410.dts | 20 ++++----- arch/arm/boot/dts/qcom-apq8064.dtsi | 46 +++++++++++++++++++++ 3 files changed, 64 insertions(+), 18 deletions(-) diff --git a/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts b/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts index 03784f1366e5..21095dad7741 100644 --- a/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts +++ b/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts @@ -54,7 +54,7 @@ /* Buck SMPS */ - pm8921_s1: s1 { + s1 { regulator-always-on; regulator-min-microvolt = <1225000>; regulator-max-microvolt = <1225000>; @@ -62,43 +62,43 @@ bias-pull-down; }; - pm8921_s3: s3 { + s3 { regulator-min-microvolt = <1000000>; regulator-max-microvolt = <1400000>; qcom,switch-mode-frequency = <4800000>; }; - pm8921_s4: s4 { + s4 { regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; qcom,switch-mode-frequency = <3200000>; }; - pm8921_s7: s7 { + s7 { regulator-min-microvolt = <1300000>; regulator-max-microvolt = <1300000>; qcom,switch-mode-frequency = <3200000>; }; - pm8921_l3: l3 { + l3 { regulator-min-microvolt = <3050000>; regulator-max-microvolt = <3300000>; bias-pull-down; }; - pm8921_l4: l4 { + l4 { regulator-min-microvolt = <1000000>; regulator-max-microvolt = <1800000>; bias-pull-down; }; - pm8921_l5: l5 { + l5 { regulator-min-microvolt = <2750000>; regulator-max-microvolt = <3000000>; bias-pull-down; }; - pm8921_l23: l23 { + l23 { regulator-min-microvolt = <1700000>; regulator-max-microvolt = <1900000>; bias-pull-down; diff --git a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts index 11ac608b6d50..f40e93f09673 100644 --- a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts +++ b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts @@ -64,7 +64,7 @@ /* Buck SMPS */ - pm8921_s1: s1 { + s1 { regulator-always-on; regulator-min-microvolt = <1225000>; regulator-max-microvolt = <1225000>; @@ -72,55 +72,55 @@ bias-pull-down; }; - pm8921_s3: s3 { + s3 { regulator-min-microvolt = <1000000>; regulator-max-microvolt = <1400000>; qcom,switch-mode-frequency = <4800000>; }; - pm8921_s4: s4 { + s4 { regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; qcom,switch-mode-frequency = <3200000>; }; - pm8921_s7: s7 { + s7 { regulator-min-microvolt = <1300000>; regulator-max-microvolt = <1300000>; qcom,switch-mode-frequency = <3200000>; }; - pm8921_l3: l3 { + l3 { regulator-min-microvolt = <3050000>; regulator-max-microvolt = <3300000>; bias-pull-down; }; - pm8921_l4: l4 { + l4 { regulator-min-microvolt = <1000000>; regulator-max-microvolt = <1800000>; bias-pull-down; }; - pm8921_l5: l5 { + l5 { regulator-min-microvolt = <2750000>; regulator-max-microvolt = <3000000>; bias-pull-down; }; - pm8921_l6: l6 { + l6 { regulator-min-microvolt = <2950000>; regulator-max-microvolt = <2950000>; bias-pull-down; }; - pm8921_l23: l23 { + l23 { regulator-min-microvolt = <1700000>; regulator-max-microvolt = <1900000>; bias-pull-down; }; - pm8921_lvs1: lvs1 { + lvs1 { bias-pull-down; }; }; diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi index a72e1226372b..e729fe6bea04 100644 --- a/arch/arm/boot/dts/qcom-apq8064.dtsi +++ b/arch/arm/boot/dts/qcom-apq8064.dtsi @@ -480,9 +480,55 @@ regulators { compatible = "qcom,rpm-pm8921-regulators"; + pm8921_s1: s1 {}; + pm8921_s2: s2 {}; + pm8921_s3: s3 {}; + pm8921_s4: s4 {}; + pm8921_s7: s7 {}; + pm8921_s8: s8 {}; + + pm8921_l1: l1 {}; + pm8921_l2: l2 {}; + pm8921_l3: l3 {}; + pm8921_l4: l4 {}; + pm8921_l5: l5 {}; + pm8921_l6: l6 {}; + pm8921_l7: l7 {}; + pm8921_l8: l8 {}; + pm8921_l9: l9 {}; + pm8921_l10: l10 {}; + pm8921_l11: l11 {}; + pm8921_l12: l12 {}; + pm8921_l14: l14 {}; + pm8921_l15: l15 {}; + pm8921_l16: l16 {}; + pm8921_l17: l17 {}; + pm8921_l18: l18 {}; + pm8921_l21: l21 {}; + pm8921_l22: l22 {}; + pm8921_l23: l23 {}; + pm8921_l24: l24 {}; + pm8921_l25: l25 {}; + pm8921_l26: l26 {}; + pm8921_l27: l27 {}; + pm8921_l28: l28 {}; + pm8921_l29: l29 {}; + + pm8921_lvs1: lvs1 {}; + pm8921_lvs2: lvs2 {}; + pm8921_lvs3: lvs3 {}; + pm8921_lvs4: lvs4 {}; + pm8921_lvs5: lvs5 {}; + pm8921_lvs6: lvs6 {}; + pm8921_lvs7: lvs7 {}; + + pm8921_usb_switch: usb-switch {}; + pm8921_hdmi_switch: hdmi-switch { bias-pull-down; }; + + pm8921_ncp: ncp {}; }; }; From 1099b26e2c9178f9b877e5535c49061e6165ecbd Mon Sep 17 00:00:00 2001 From: Bjorn Andersson Date: Thu, 22 Oct 2015 11:13:50 -0700 Subject: [PATCH 12/24] ARM: dts: qcom: apq8064: Introduce gsbi5 and gsbi5 serial node Signed-off-by: Bjorn Andersson Signed-off-by: Andy Gross --- arch/arm/boot/dts/qcom-apq8064.dtsi | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi index e729fe6bea04..fc771b336027 100644 --- a/arch/arm/boot/dts/qcom-apq8064.dtsi +++ b/arch/arm/boot/dts/qcom-apq8064.dtsi @@ -320,6 +320,28 @@ }; }; + gsbi5: gsbi@1a200000 { + status = "disabled"; + compatible = "qcom,gsbi-v1.0.0"; + cell-index = <5>; + reg = <0x1a200000 0x03>; + clocks = <&gcc GSBI5_H_CLK>; + clock-names = "iface"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + gsbi5_serial: serial@1a240000 { + compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm"; + reg = <0x1a240000 0x100>, + <0x1a200000 0x03>; + interrupts = <0 154 0x0>; + clocks = <&gcc GSBI5_UART_CLK>, <&gcc GSBI5_H_CLK>; + clock-names = "core", "iface"; + status = "disabled"; + }; + }; + gsbi6: gsbi@16500000 { status = "disabled"; compatible = "qcom,gsbi-v1.0.0"; From 84b0b6bc3a3ea0460e5619302db46ac2197dc3bd Mon Sep 17 00:00:00 2001 From: Bjorn Andersson Date: Thu, 22 Oct 2015 11:13:51 -0700 Subject: [PATCH 13/24] ARM: dts: qcom: apq8064: Introduce Sony Xperia Z dts This introduces initial support for the Sony Xperia Z smartphone, including support for UART, MMC, USB gadget and physical buttons. Signed-off-by: Bjorn Andersson Signed-off-by: Andy Gross --- arch/arm/boot/dts/Makefile | 1 + .../dts/qcom-apq8064-sony-xperia-yuga.dts | 436 ++++++++++++++++++ 2 files changed, 437 insertions(+) create mode 100644 arch/arm/boot/dts/qcom-apq8064-sony-xperia-yuga.dts diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 30bbc3746130..2f691e7bf6fe 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -502,6 +502,7 @@ dtb-$(CONFIG_ARCH_PRIMA2) += \ dtb-$(CONFIG_ARCH_QCOM) += \ qcom-apq8064-cm-qs600.dtb \ qcom-apq8064-ifc6410.dtb \ + qcom-apq8064-sony-xperia-yuga.dtb \ qcom-apq8074-dragonboard.dtb \ qcom-apq8084-ifc6540.dtb \ qcom-apq8084-mtp.dtb \ diff --git a/arch/arm/boot/dts/qcom-apq8064-sony-xperia-yuga.dts b/arch/arm/boot/dts/qcom-apq8064-sony-xperia-yuga.dts new file mode 100644 index 000000000000..06b3c76c3e41 --- /dev/null +++ b/arch/arm/boot/dts/qcom-apq8064-sony-xperia-yuga.dts @@ -0,0 +1,436 @@ +#include "qcom-apq8064-v2.0.dtsi" +#include +#include +#include +#include + +/ { + model = "Sony Xperia Z"; + compatible = "sony,xperia-yuga", "qcom,apq8064"; + + aliases { + serial0 = &gsbi5_serial; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + gpio-keys { + compatible = "gpio-keys"; + input-name = "gpio-keys"; + + pinctrl-names = "default"; + pinctrl-0 = <&gpio_keys_pin_a>; + + camera-focus { + label = "camera_focus"; + gpios = <&pm8921_gpio 3 GPIO_ACTIVE_LOW>; + linux,input-type = <1>; + linux,code = ; + }; + + camera-snapshot { + label = "camera_snapshot"; + gpios = <&pm8921_gpio 4 GPIO_ACTIVE_LOW>; + linux,input-type = <1>; + linux,code = ; + }; + + volume-down { + label = "volume_down"; + gpios = <&pm8921_gpio 29 GPIO_ACTIVE_LOW>; + linux,input-type = <1>; + linux,code = ; + }; + + volume-up { + label = "volume_up"; + gpios = <&pm8921_gpio 35 GPIO_ACTIVE_LOW>; + linux,input-type = <1>; + linux,code = ; + }; + }; + + soc { + pinctrl@800000 { + gsbi5_uart_pin_a: gsbi5-uart-pin-active { + rx { + pins = "gpio52"; + function = "gsbi5"; + drive-strength = <2>; + bias-pull-up; + }; + + tx { + pins = "gpio51"; + function = "gsbi5"; + drive-strength = <4>; + bias-disable; + }; + }; + + sdcc1_pin_a: sdcc1-pin-active { + clk { + pins = "sdc1_clk"; + drive-strengh = <16>; + bias-disable; + }; + + cmd { + pins = "sdc1_cmd"; + drive-strengh = <10>; + bias-pull-up; + }; + + data { + pins = "sdc1_data"; + drive-strengh = <10>; + bias-pull-up; + }; + }; + + sdcc3_pin_a: sdcc3-pin-active { + clk { + pins = "sdc3_clk"; + drive-strengh = <8>; + bias-disable; + }; + + cmd { + pins = "sdc3_cmd"; + drive-strengh = <8>; + bias-pull-up; + }; + + data { + pins = "sdc3_data"; + drive-strengh = <8>; + bias-pull-up; + }; + }; + + sdcc3_cd_pin_a: sdcc3-cd-pin-active { + pins = "gpio26"; + function = "gpio"; + + drive-strength = <2>; + bias-disable; + }; + }; + + + rpm@108000 { + regulators { + vin_l1_l2_l12_l18-supply = <&pm8921_s4>; + vin_lvs_1_3_6-supply = <&pm8921_s4>; + vin_lvs_4_5_7-supply = <&pm8921_s4>; + vin_ncp-supply = <&pm8921_l6>; + vin_lvs2-supply = <&pm8921_s4>; + vin_l24-supply = <&pm8921_s1>; + vin_l25-supply = <&pm8921_s1>; + vin_l27-supply = <&pm8921_s7>; + vin_l28-supply = <&pm8921_s7>; + + /* Buck SMPS */ + s1 { + regulator-always-on; + regulator-min-microvolt = <1225000>; + regulator-max-microvolt = <1225000>; + qcom,switch-mode-frequency = <3200000>; + bias-pull-down; + }; + + s2 { + regulator-min-microvolt = <1300000>; + regulator-max-microvolt = <1300000>; + qcom,switch-mode-frequency = <1600000>; + bias-pull-down; + }; + + s3 { + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1150000>; + qcom,switch-mode-frequency = <4800000>; + bias-pull-down; + }; + + s4 { + regulator-always-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + qcom,switch-mode-frequency = <1600000>; + bias-pull-down; + qcom,force-mode = ; + }; + + s7 { + regulator-min-microvolt = <1300000>; + regulator-max-microvolt = <1300000>; + qcom,switch-mode-frequency = <3200000>; + }; + + s8 { + regulator-min-microvolt = <2200000>; + regulator-max-microvolt = <2200000>; + qcom,switch-mode-frequency = <1600000>; + }; + + /* PMOS LDO */ + l1 { + regulator-always-on; + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1100000>; + bias-pull-down; + }; + + l2 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + bias-pull-down; + }; + + l3 { + regulator-min-microvolt = <3075000>; + regulator-max-microvolt = <3075000>; + bias-pull-down; + }; + + l4 { + regulator-always-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + bias-pull-down; + }; + + l5 { + regulator-min-microvolt = <2950000>; + regulator-max-microvolt = <2950000>; + bias-pull-down; + }; + + l6 { + regulator-min-microvolt = <2950000>; + regulator-max-microvolt = <2950000>; + bias-pull-down; + }; + + l7 { + regulator-min-microvolt = <1850000>; + regulator-max-microvolt = <2950000>; + bias-pull-down; + }; + + l8 { + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + bias-pull-down; + }; + + l9 { + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + bias-pull-down; + }; + + l10 { + regulator-min-microvolt = <2900000>; + regulator-max-microvolt = <2900000>; + bias-pull-down; + }; + + l11 { + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + bias-pull-down; + }; + + l12 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + bias-pull-down; + }; + + l14 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + bias-pull-down; + }; + + l15 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <2950000>; + bias-pull-down; + }; + + l16 { + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + bias-pull-down; + }; + + l17 { + regulator-min-microvolt = <2000000>; + regulator-max-microvolt = <2000000>; + bias-pull-down; + }; + + l18 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + bias-pull-down; + }; + + l21 { + regulator-min-microvolt = <1050000>; + regulator-max-microvolt = <1050000>; + bias-pull-down; + }; + + l22 { + regulator-min-microvolt = <2600000>; + regulator-max-microvolt = <2600000>; + bias-pull-down; + }; + + l23 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + bias-pull-down; + }; + + l24 { + regulator-min-microvolt = <750000>; + regulator-max-microvolt = <1150000>; + bias-pull-down; + }; + + l25 { + regulator-always-on; + regulator-min-microvolt = <1250000>; + regulator-max-microvolt = <1250000>; + bias-pull-down; + }; + + l27 { + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1100000>; + }; + + l28 { + regulator-min-microvolt = <1050000>; + regulator-max-microvolt = <1050000>; + bias-pull-down; + }; + + l29 { + regulator-min-microvolt = <2000000>; + regulator-max-microvolt = <2000000>; + bias-pull-down; + }; + + /* Low Voltage Switch */ + lvs1 { + bias-pull-down; + }; + + lvs2 { + bias-pull-down; + }; + + lvs3 { + bias-pull-down; + }; + + lvs4 { + bias-pull-down; + }; + + lvs5 { + bias-pull-down; + }; + + lvs6 { + bias-pull-down; + }; + + lvs7 { + bias-pull-down; + }; + + usb-switch {}; + + hdmi-switch {}; + + ncp { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + qcom,switch-mode-frequency = <1600000>; + }; + }; + }; + + qcom,ssbi@500000 { + pmic@0 { + gpio@150 { + gpio_keys_pin_a: gpio-keys-pin-active { + pins = "gpio3", "gpio4", "gpio29", "gpio35"; + function = "normal"; + + bias-pull-up; + drive-push-pull; + input-enable; + power-source = <2>; + qcom,drive-strength = ; + qcom,pull-up-strength = <0>; + }; + }; + }; + }; + + phy@12500000 { + status = "okay"; + vddcx-supply = <&pm8921_s3>; + v3p3-supply = <&pm8921_l3>; + v1p8-supply = <&pm8921_l4>; + }; + + gadget@12500000 { + status = "okay"; + }; + + gsbi@1a200000 { + status = "ok"; + qcom,mode = ; + + serial@1a240000 { + status = "ok"; + + pinctrl-names = "default"; + pinctrl-0 = <&gsbi5_uart_pin_a>; + }; + }; + + amba { + sdcc1: sdcc@12400000 { + status = "okay"; + + vmmc-supply = <&pm8921_l5>; + vqmmc-supply = <&pm8921_s4>; + + pinctrl-names = "default"; + pinctrl-0 = <&sdcc1_pin_a>; + }; + + sdcc3: sdcc@12180000 { + status = "okay"; + + vmmc-supply = <&pm8921_l6>; + cd-gpios = <&tlmm_pinmux 26 GPIO_ACTIVE_LOW>; + + pinctrl-names = "default"; + pinctrl-0 = <&sdcc3_pin_a>, <&sdcc3_cd_pin_a>; + }; + }; + }; +}; From c40225b50fc523437da0601764da013b499cb596 Mon Sep 17 00:00:00 2001 From: Stephen Boyd Date: Mon, 26 Oct 2015 18:26:53 -0700 Subject: [PATCH 14/24] arm: dts: qcom: Add board clocks These clocks are fixed rate board sources that should be in DT. Add them. Cc: Georgi Djakov Signed-off-by: Stephen Boyd Reviewed-by: Andy Gross Signed-off-by: Andy Gross --- arch/arm/boot/dts/qcom-msm8960.dtsi | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) diff --git a/arch/arm/boot/dts/qcom-msm8960.dtsi b/arch/arm/boot/dts/qcom-msm8960.dtsi index 134cd91d68ec..51a40d84145c 100644 --- a/arch/arm/boot/dts/qcom-msm8960.dtsi +++ b/arch/arm/boot/dts/qcom-msm8960.dtsi @@ -49,6 +49,29 @@ qcom,no-pc-write; }; + clocks { + cxo_board { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <19200000>; + clock-output-names = "cxo_board"; + }; + + pxo_board { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <27000000>; + clock-output-names = "pxo_board"; + }; + + sleep_clk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <32768>; + clock-output-names = "sleep_clk"; + }; + }; + soc: soc { #address-cells = <1>; #size-cells = <1>; From 9208b5178bdaca21a1101ac61daa3d610e5435bc Mon Sep 17 00:00:00 2001 From: Stephen Boyd Date: Fri, 20 Nov 2015 15:31:18 -0800 Subject: [PATCH 15/24] arm: dts: qcom: Update ifc6540 compat for qcom boot format The ifc6540 is an sbc (single board computer) board, so update the compatible field accordingly. Signed-off-by: Stephen Boyd Signed-off-by: Andy Gross --- arch/arm/boot/dts/qcom-apq8084-ifc6540.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/qcom-apq8084-ifc6540.dts b/arch/arm/boot/dts/qcom-apq8084-ifc6540.dts index c9c2b769554f..32aaa9d45228 100644 --- a/arch/arm/boot/dts/qcom-apq8084-ifc6540.dts +++ b/arch/arm/boot/dts/qcom-apq8084-ifc6540.dts @@ -3,7 +3,7 @@ / { model = "Qualcomm APQ8084/IFC6540"; - compatible = "qcom,apq8084-ifc6540", "qcom,apq8084"; + compatible = "qcom,apq8084-sbc", "qcom,apq8084"; aliases { serial0 = &blsp2_uart2; From 134c544e9d1b56075c807e6152f2564ad1997327 Mon Sep 17 00:00:00 2001 From: Stephen Boyd Date: Fri, 20 Nov 2015 15:31:20 -0800 Subject: [PATCH 16/24] arm: dts: qcom: Add aliases for PMICs Add an alias for the PMICs found on qcom based SoCs so that the newly updated dtbTool can find the PMIC compatible string and add the pmic-id element to the QCDT header. Signed-off-by: Stephen Boyd Signed-off-by: Andy Gross --- arch/arm/boot/dts/qcom-apq8074-dragonboard.dts | 2 ++ arch/arm/boot/dts/qcom-apq8084-ifc6540.dts | 1 + arch/arm/boot/dts/qcom-apq8084-mtp.dts | 1 + arch/arm/boot/dts/qcom-pm8841.dtsi | 8 ++++---- arch/arm/boot/dts/qcom-pm8941.dtsi | 8 ++++---- arch/arm/boot/dts/qcom-pma8084.dtsi | 8 ++++---- 6 files changed, 16 insertions(+), 12 deletions(-) diff --git a/arch/arm/boot/dts/qcom-apq8074-dragonboard.dts b/arch/arm/boot/dts/qcom-apq8074-dragonboard.dts index 835bdc71c5ba..c0e205315042 100644 --- a/arch/arm/boot/dts/qcom-apq8074-dragonboard.dts +++ b/arch/arm/boot/dts/qcom-apq8074-dragonboard.dts @@ -8,6 +8,8 @@ aliases { serial0 = &blsp1_uart2; + usid0 = &pm8941_0; + usid4 = &pm8841_0; }; chosen { diff --git a/arch/arm/boot/dts/qcom-apq8084-ifc6540.dts b/arch/arm/boot/dts/qcom-apq8084-ifc6540.dts index 32aaa9d45228..2052b84a77c6 100644 --- a/arch/arm/boot/dts/qcom-apq8084-ifc6540.dts +++ b/arch/arm/boot/dts/qcom-apq8084-ifc6540.dts @@ -7,6 +7,7 @@ aliases { serial0 = &blsp2_uart2; + usid0 = &pma8084_0; }; chosen { diff --git a/arch/arm/boot/dts/qcom-apq8084-mtp.dts b/arch/arm/boot/dts/qcom-apq8084-mtp.dts index 3016c7048d44..d174d15bcf70 100644 --- a/arch/arm/boot/dts/qcom-apq8084-mtp.dts +++ b/arch/arm/boot/dts/qcom-apq8084-mtp.dts @@ -7,6 +7,7 @@ aliases { serial0 = &blsp2_uart2; + usid0 = &pma8084_0; }; chosen { diff --git a/arch/arm/boot/dts/qcom-pm8841.dtsi b/arch/arm/boot/dts/qcom-pm8841.dtsi index 8f1a0b162017..523bee959f98 100644 --- a/arch/arm/boot/dts/qcom-pm8841.dtsi +++ b/arch/arm/boot/dts/qcom-pm8841.dtsi @@ -3,8 +3,8 @@ &spmi_bus { - usid4: pm8841@4 { - compatible = "qcom,spmi-pmic"; + pm8841_0: pm8841@4 { + compatible = "qcom,pm8841", "qcom,spmi-pmic"; reg = <0x4 SPMI_USID>; #address-cells = <1>; #size-cells = <0>; @@ -27,8 +27,8 @@ }; }; - usid5: pm8841@5 { - compatible = "qcom,spmi-pmic"; + pm8841_1: pm8841@5 { + compatible = "qcom,pm8841", "qcom,spmi-pmic"; reg = <0x5 SPMI_USID>; #address-cells = <1>; #size-cells = <0>; diff --git a/arch/arm/boot/dts/qcom-pm8941.dtsi b/arch/arm/boot/dts/qcom-pm8941.dtsi index b0d443999fcc..02d674f76591 100644 --- a/arch/arm/boot/dts/qcom-pm8941.dtsi +++ b/arch/arm/boot/dts/qcom-pm8941.dtsi @@ -4,8 +4,8 @@ &spmi_bus { - usid0: pm8941@0 { - compatible ="qcom,spmi-pmic"; + pm8941_0: pm8941@0 { + compatible = "qcom,pm8941", "qcom,spmi-pmic"; reg = <0x0 SPMI_USID>; #address-cells = <1>; #size-cells = <0>; @@ -153,8 +153,8 @@ }; }; - usid1: pm8941@1 { - compatible = "qcom,spmi-pmic"; + pm8941_1: pm8941@1 { + compatible = "qcom,pm8941", "qcom,spmi-pmic"; reg = <0x1 SPMI_USID>; #address-cells = <1>; #size-cells = <0>; diff --git a/arch/arm/boot/dts/qcom-pma8084.dtsi b/arch/arm/boot/dts/qcom-pma8084.dtsi index 5e240ccc08b7..10b8f9e6d60b 100644 --- a/arch/arm/boot/dts/qcom-pma8084.dtsi +++ b/arch/arm/boot/dts/qcom-pma8084.dtsi @@ -4,8 +4,8 @@ &spmi_bus { - usid0: pma8084@0 { - compatible = "qcom,spmi-pmic"; + pma8084_0: pma8084@0 { + compatible = "qcom,pma8084", "qcom,spmi-pmic"; reg = <0x0 SPMI_USID>; #address-cells = <1>; #size-cells = <0>; @@ -101,8 +101,8 @@ }; }; - usid1: pma8084@1 { - compatible = "qcom,spmi-pmic"; + pma8084_1: pma8084@1 { + compatible = "qcom,pma8084", "qcom,spmi-pmic"; reg = <0x1 SPMI_USID>; #address-cells = <1>; #size-cells = <0>; From 2ca9c2a4c1ef5faac27076475261788302158722 Mon Sep 17 00:00:00 2001 From: Stephen Boyd Date: Fri, 20 Nov 2015 17:49:46 -0800 Subject: [PATCH 17/24] arm: dts: qcom: Add generic PMIC gpio/MPP compat strings Add the generic compatible strings for the PMIC gpio and MPP modules found on qcom based PMICs. Cc: Cc: "Ivan T. Ivanov" Cc: Bjorn Andersson Cc: Rob Herring Signed-off-by: Stephen Boyd Reviewed-by: Bjorn Andersson Signed-off-by: Andy Gross --- arch/arm/boot/dts/qcom-apq8064.dtsi | 6 ++++-- arch/arm/boot/dts/qcom-pm8841.dtsi | 2 +- arch/arm/boot/dts/qcom-pm8941.dtsi | 4 ++-- arch/arm/boot/dts/qcom-pma8084.dtsi | 4 ++-- 4 files changed, 9 insertions(+), 7 deletions(-) diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi index fc771b336027..e6c7476036a4 100644 --- a/arch/arm/boot/dts/qcom-apq8064.dtsi +++ b/arch/arm/boot/dts/qcom-apq8064.dtsi @@ -410,7 +410,8 @@ pm8921_gpio: gpio@150 { - compatible = "qcom,pm8921-gpio"; + compatible = "qcom,pm8921-gpio", + "qcom,ssbi-gpio"; reg = <0x150>; interrupts = <192 1>, <193 1>, <194 1>, <195 1>, <196 1>, <197 1>, @@ -434,7 +435,8 @@ }; pm8921_mpps: mpps@50 { - compatible = "qcom,pm8921-mpp"; + compatible = "qcom,pm8921-mpp", + "qcom,ssbi-mpp"; reg = <0x50>; gpio-controller; #gpio-cells = <2>; diff --git a/arch/arm/boot/dts/qcom-pm8841.dtsi b/arch/arm/boot/dts/qcom-pm8841.dtsi index 523bee959f98..9f357f68713c 100644 --- a/arch/arm/boot/dts/qcom-pm8841.dtsi +++ b/arch/arm/boot/dts/qcom-pm8841.dtsi @@ -10,7 +10,7 @@ #size-cells = <0>; pm8841_mpps: mpps@a000 { - compatible = "qcom,pm8841-mpp"; + compatible = "qcom,pm8841-mpp", "qcom,spmi-mpp"; reg = <0xa000 0x400>; gpio-controller; #gpio-cells = <2>; diff --git a/arch/arm/boot/dts/qcom-pm8941.dtsi b/arch/arm/boot/dts/qcom-pm8941.dtsi index 02d674f76591..a149c6f13870 100644 --- a/arch/arm/boot/dts/qcom-pm8941.dtsi +++ b/arch/arm/boot/dts/qcom-pm8941.dtsi @@ -48,7 +48,7 @@ }; pm8941_gpios: gpios@c000 { - compatible = "qcom,pm8941-gpio"; + compatible = "qcom,pm8941-gpio", "qcom,spmi-gpio"; reg = <0xc000 0x2400>; gpio-controller; #gpio-cells = <2>; @@ -91,7 +91,7 @@ }; pm8941_mpps: mpps@a000 { - compatible = "qcom,pm8941-mpp"; + compatible = "qcom,pm8941-mpp", "qcom,spmi-mpp"; reg = <0xa000 0x800>; gpio-controller; #gpio-cells = <2>; diff --git a/arch/arm/boot/dts/qcom-pma8084.dtsi b/arch/arm/boot/dts/qcom-pma8084.dtsi index 10b8f9e6d60b..4e9bd3f88473 100644 --- a/arch/arm/boot/dts/qcom-pma8084.dtsi +++ b/arch/arm/boot/dts/qcom-pma8084.dtsi @@ -19,7 +19,7 @@ }; pma8084_gpios: gpios@c000 { - compatible = "qcom,pma8084-gpio"; + compatible = "qcom,pma8084-gpio", "qcom,spmi-gpio"; reg = <0xc000 0x1600>; gpio-controller; #gpio-cells = <2>; @@ -48,7 +48,7 @@ }; pma8084_mpps: mpps@a000 { - compatible = "qcom,pma8084-mpp"; + compatible = "qcom,pma8084-mpp", "qcom,spmi-mpp"; reg = <0xa000 0x800>; gpio-controller; #gpio-cells = <2>; From 7026d15c7ac10dda22a9f3eda508459c924d7142 Mon Sep 17 00:00:00 2001 From: Bjorn Andersson Date: Mon, 23 Nov 2015 11:04:07 -0800 Subject: [PATCH 18/24] ARM: dts: qcom: msm8974: Disable wled and move it to honami The properties specified in the wled node could harm connected hardware, so move the properties to Honami and disable the platform node. Signed-off-by: Bjorn Andersson Signed-off-by: Andy Gross --- .../boot/dts/qcom-msm8974-sony-xperia-honami.dts | 13 +++++++++++++ arch/arm/boot/dts/qcom-pm8941.dtsi | 9 ++------- 2 files changed, 15 insertions(+), 7 deletions(-) diff --git a/arch/arm/boot/dts/qcom-msm8974-sony-xperia-honami.dts b/arch/arm/boot/dts/qcom-msm8974-sony-xperia-honami.dts index 37741725b7bd..a0398b69f4f2 100644 --- a/arch/arm/boot/dts/qcom-msm8974-sony-xperia-honami.dts +++ b/arch/arm/boot/dts/qcom-msm8974-sony-xperia-honami.dts @@ -403,4 +403,17 @@ qcom,vset-millivolts = <3000>; }; }; + + pm8941@1 { + wled@d800 { + status = "ok"; + + qcom,cs-out; + qcom,current-limit = <20>; + qcom,current-boost-limit = <805>; + qcom,switching-freq = <1600>; + qcom,ovp = <29>; + qcom,num-strings = <2>; + }; + }; }; diff --git a/arch/arm/boot/dts/qcom-pm8941.dtsi b/arch/arm/boot/dts/qcom-pm8941.dtsi index a149c6f13870..ca53a5947437 100644 --- a/arch/arm/boot/dts/qcom-pm8941.dtsi +++ b/arch/arm/boot/dts/qcom-pm8941.dtsi @@ -159,17 +159,12 @@ #address-cells = <1>; #size-cells = <0>; - wled@d800 { + pm8941_wled: wled@d800 { compatible = "qcom,pm8941-wled"; reg = <0xd800 0x100>; label = "backlight"; - qcom,cs-out; - qcom,current-limit = <20>; - qcom,current-boost-limit = <805>; - qcom,switching-freq = <1600>; - qcom,ovp = <29>; - qcom,num-strings = <2>; + status = "disabled"; }; }; }; From 580df59fa74e53bb71c21fb4e97d74ca3c9665b2 Mon Sep 17 00:00:00 2001 From: Bjorn Andersson Date: Mon, 23 Nov 2015 21:54:34 -0800 Subject: [PATCH 19/24] ARM: dts: qcom: msm8974: Add i2c8 node Signed-off-by: Bjorn Andersson Signed-off-by: Andy Gross --- arch/arm/boot/dts/qcom-msm8974.dtsi | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi index 753bdfddd46e..dfdafdcb8aae 100644 --- a/arch/arm/boot/dts/qcom-msm8974.dtsi +++ b/arch/arm/boot/dts/qcom-msm8974.dtsi @@ -319,6 +319,17 @@ interrupts = <0 208 0>; }; + blsp_i2c8: i2c@f9964000 { + status = "disabled"; + compatible = "qcom,i2c-qup-v2.1.1"; + reg = <0xf9964000 0x1000>; + interrupts = <0 102 IRQ_TYPE_NONE>; + clocks = <&gcc GCC_BLSP2_QUP2_I2C_APPS_CLK>, <&gcc GCC_BLSP2_AHB_CLK>; + clock-names = "core", "iface"; + #address-cells = <1>; + #size-cells = <0>; + }; + blsp_i2c11: i2c@f9967000 { status = "disabled"; compatible = "qcom,i2c-qup-v2.1.1"; From aa2691279eaf50ff7983890c38491fbee73d1025 Mon Sep 17 00:00:00 2001 From: Georgi Djakov Date: Thu, 3 Dec 2015 16:02:55 +0200 Subject: [PATCH 20/24] arm: dts: qcom: apq8064: Add fixed rate on-board oscillators Currently the rates of the xo and sleep clocks are hard-coded in the GCC driver, but this is a board layout description that actually should be in the DT. Moving them into DT also allows us to insert the RPM controlled clocks between the DT and GCC clocks. Signed-off-by: Georgi Djakov Signed-off-by: Andy Gross --- arch/arm/boot/dts/qcom-apq8064.dtsi | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi index e6c7476036a4..edfc6ee56ea1 100644 --- a/arch/arm/boot/dts/qcom-apq8064.dtsi +++ b/arch/arm/boot/dts/qcom-apq8064.dtsi @@ -91,6 +91,26 @@ interrupts = <1 10 0x304>; }; + clocks { + cxo_board { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <19200000>; + }; + + pxo_board { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <27000000>; + }; + + sleep_clk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <32768>; + }; + }; + sfpb_mutex: hwmutex { compatible = "qcom,sfpb-mutex"; syscon = <&sfpb_wrapper_mutex 0x604 0x4>; From 426ac151ec6b7eabd248a78351ecda4d6b188d34 Mon Sep 17 00:00:00 2001 From: "Ivan T. Ivanov" Date: Fri, 11 Dec 2015 18:29:58 +0000 Subject: [PATCH 21/24] ARM: dts: qcom: apq8064-ifc6410 Use hardware flow control for GSBI6 GSBI6 UART module is connected to BT chip, which uses hardware flow control lines. Enable them on SoC side. Signed-off-by: Ivan T. Ivanov Signed-off-by: Andy Gross --- arch/arm/boot/dts/qcom-apq8064-ifc6410.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts index f40e93f09673..aa9303b84d67 100644 --- a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts +++ b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts @@ -164,7 +164,7 @@ gsbi@16500000 { status = "ok"; - qcom,mode = ; + qcom,mode = ; serial@16540000 { status = "ok"; From 64ab88638af03b361d1446ef3682ab176ff8726b Mon Sep 17 00:00:00 2001 From: Andy Gross Date: Thu, 24 Sep 2015 14:18:56 -0500 Subject: [PATCH 22/24] arm: dts: Add APQ8084 SMEM nodes This patch adds all the required nodes to support SMEM on APQ8084 Signed-off-by: Andy Gross Acked-by: Bjorn Andersson --- arch/arm/boot/dts/qcom-apq8084.dtsi | 36 +++++++++++++++++++++++++++++ 1 file changed, 36 insertions(+) diff --git a/arch/arm/boot/dts/qcom-apq8084.dtsi b/arch/arm/boot/dts/qcom-apq8084.dtsi index fcffecae3e67..3d3b394a57a1 100644 --- a/arch/arm/boot/dts/qcom-apq8084.dtsi +++ b/arch/arm/boot/dts/qcom-apq8084.dtsi @@ -10,6 +10,17 @@ compatible = "qcom,apq8084"; interrupt-parent = <&intc>; + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + smem_mem: smem_region@fa00000 { + reg = <0xfa00000 0x200000>; + no-map; + }; + }; + cpus { #address-cells = <1>; #size-cells = <0>; @@ -89,6 +100,15 @@ clock-frequency = <19200000>; }; + smem { + compatible = "qcom,smem"; + + qcom,rpm-msg-ram = <&rpm_msg_ram>; + memory-region = <&smem_mem>; + + hwlocks = <&tcsr_mutex 3>; + }; + soc: soc { #address-cells = <1>; #size-cells = <1>; @@ -225,6 +245,22 @@ reg = <0xfc400000 0x4000>; }; + tcsr_mutex_regs: syscon@fd484000 { + compatible = "syscon"; + reg = <0xfd484000 0x2000>; + }; + + tcsr_mutex: hwlock { + compatible = "qcom,tcsr-mutex"; + syscon = <&tcsr_mutex_regs 0 0x80>; + #hwlock-cells = <1>; + }; + + rpm_msg_ram: memory@fc428000 { + compatible = "qcom,rpm-msg-ram"; + reg = <0xfc428000 0x4000>; + }; + tlmm: pinctrl@fd510000 { compatible = "qcom,apq8084-pinctrl"; reg = <0xfd510000 0x4000>; From 53ced99d70c4228be0465303625a1511db89323f Mon Sep 17 00:00:00 2001 From: Andy Gross Date: Thu, 24 Sep 2015 14:18:57 -0500 Subject: [PATCH 23/24] arm: dts: Add RPM/SMD support on APQ8084 This patch adds support for RPM and SMD nodes that are present on APQ8084 platforms. Signed-off-by: Andy Gross Acked-by: Bjorn Andersson --- arch/arm/boot/dts/qcom-apq8084.dtsi | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/arch/arm/boot/dts/qcom-apq8084.dtsi b/arch/arm/boot/dts/qcom-apq8084.dtsi index 3d3b394a57a1..29cb7e5749ab 100644 --- a/arch/arm/boot/dts/qcom-apq8084.dtsi +++ b/arch/arm/boot/dts/qcom-apq8084.dtsi @@ -123,6 +123,11 @@ <0xf9002000 0x1000>; }; + apcs: syscon@f9011000 { + compatible = "syscon"; + reg = <0xf9011000 0x1000>; + }; + timer@f9020000 { #address-cells = <1>; #size-cells = <1>; @@ -318,4 +323,19 @@ #interrupt-cells = <4>; }; }; + + smd { + compatible = "qcom,smd"; + + rpm { + interrupts = <0 168 1>; + qcom,ipc = <&apcs 8 0>; + qcom,smd-edge = <15>; + + rpm_requests { + compatible = "qcom,rpm-apq8084"; + qcom,smd-channels = "rpm_requests"; + }; + }; + }; }; From 4add1074576758fb23b7369ea62de09dac16561e Mon Sep 17 00:00:00 2001 From: Andy Gross Date: Thu, 24 Sep 2015 14:18:58 -0500 Subject: [PATCH 24/24] arm: dts: Add support for PMA8084 on APQ8084 This patch adds support for the PMA8084 regulators found on APQ8084 platforms. Signed-off-by: Andy Gross Acked-by: Bjorn Andersson --- arch/arm/boot/dts/qcom-apq8084.dtsi | 52 +++++++++++++++++++++++++++++ 1 file changed, 52 insertions(+) diff --git a/arch/arm/boot/dts/qcom-apq8084.dtsi b/arch/arm/boot/dts/qcom-apq8084.dtsi index 29cb7e5749ab..08214cbae16d 100644 --- a/arch/arm/boot/dts/qcom-apq8084.dtsi +++ b/arch/arm/boot/dts/qcom-apq8084.dtsi @@ -335,6 +335,58 @@ rpm_requests { compatible = "qcom,rpm-apq8084"; qcom,smd-channels = "rpm_requests"; + + pma8084-regulators { + compatible = "qcom,rpm-pma8084-regulators"; + + pma8084_s1: s1 {}; + pma8084_s2: s2 {}; + pma8084_s3: s3 {}; + pma8084_s4: s4 {}; + pma8084_s5: s5 {}; + pma8084_s6: s6 {}; + pma8084_s7: s7 {}; + pma8084_s8: s8 {}; + pma8084_s9: s9 {}; + pma8084_s10: s10 {}; + pma8084_s11: s11 {}; + pma8084_s12: s12 {}; + + pma8084_l1: l1 {}; + pma8084_l2: l2 {}; + pma8084_l3: l3 {}; + pma8084_l4: l4 {}; + pma8084_l5: l5 {}; + pma8084_l6: l6 {}; + pma8084_l7: l7 {}; + pma8084_l8: l8 {}; + pma8084_l9: l9 {}; + pma8084_l10: l10 {}; + pma8084_l11: l11 {}; + pma8084_l12: l12 {}; + pma8084_l13: l13 {}; + pma8084_l14: l14 {}; + pma8084_l15: l15 {}; + pma8084_l16: l16 {}; + pma8084_l17: l17 {}; + pma8084_l18: l18 {}; + pma8084_l19: l19 {}; + pma8084_l20: l20 {}; + pma8084_l21: l21 {}; + pma8084_l22: l22 {}; + pma8084_l23: l23 {}; + pma8084_l24: l24 {}; + pma8084_l25: l25 {}; + pma8084_l26: l26 {}; + pma8084_l27: l27 {}; + + pma8084_lvs1: lvs1 {}; + pma8084_lvs2: lvs2 {}; + pma8084_lvs3: lvs3 {}; + pma8084_lvs4: lvs4 {}; + + pma8084_5vs1: 5vs1 {}; + }; }; }; };