IB/mthca: Support for query QP and SRQ
Implement the query_qp and query_srq methods in mthca. Signed-off-by: Eli Cohen <eli@mellanox.co.il> Signed-off-by: Roland Dreier <rolandd@cisco.com>
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@ -1560,6 +1560,13 @@ int mthca_HW2SW_SRQ(struct mthca_dev *dev, struct mthca_mailbox *mailbox,
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CMD_TIME_CLASS_A, status);
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}
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int mthca_QUERY_SRQ(struct mthca_dev *dev, u32 num,
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struct mthca_mailbox *mailbox, u8 *status)
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{
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return mthca_cmd_box(dev, 0, mailbox->dma, num, 0,
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CMD_QUERY_SRQ, CMD_TIME_CLASS_A, status);
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}
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int mthca_ARM_SRQ(struct mthca_dev *dev, int srq_num, int limit, u8 *status)
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{
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return mthca_cmd(dev, limit, srq_num, 0, CMD_ARM_SRQ,
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@ -305,6 +305,8 @@ int mthca_SW2HW_SRQ(struct mthca_dev *dev, struct mthca_mailbox *mailbox,
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int srq_num, u8 *status);
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int mthca_HW2SW_SRQ(struct mthca_dev *dev, struct mthca_mailbox *mailbox,
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int srq_num, u8 *status);
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int mthca_QUERY_SRQ(struct mthca_dev *dev, u32 num,
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struct mthca_mailbox *mailbox, u8 *status);
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int mthca_ARM_SRQ(struct mthca_dev *dev, int srq_num, int limit, u8 *status);
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int mthca_MODIFY_QP(struct mthca_dev *dev, enum ib_qp_state cur,
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enum ib_qp_state next, u32 num, int is_ee,
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@ -479,6 +479,7 @@ int mthca_alloc_srq(struct mthca_dev *dev, struct mthca_pd *pd,
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void mthca_free_srq(struct mthca_dev *dev, struct mthca_srq *srq);
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int mthca_modify_srq(struct ib_srq *ibsrq, struct ib_srq_attr *attr,
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enum ib_srq_attr_mask attr_mask);
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int mthca_query_srq(struct ib_srq *srq, struct ib_srq_attr *srq_attr);
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void mthca_srq_event(struct mthca_dev *dev, u32 srqn,
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enum ib_event_type event_type);
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void mthca_free_srq_wqe(struct mthca_srq *srq, u32 wqe_addr);
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@ -489,6 +490,8 @@ int mthca_arbel_post_srq_recv(struct ib_srq *srq, struct ib_recv_wr *wr,
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void mthca_qp_event(struct mthca_dev *dev, u32 qpn,
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enum ib_event_type event_type);
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int mthca_query_qp(struct ib_qp *ibqp, struct ib_qp_attr *qp_attr, int qp_attr_mask,
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struct ib_qp_init_attr *qp_init_attr);
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int mthca_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr, int attr_mask);
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int mthca_tavor_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr,
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struct ib_send_wr **bad_wr);
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@ -1264,12 +1264,14 @@ int mthca_register_device(struct mthca_dev *dev)
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(1ull << IB_USER_VERBS_CMD_RESIZE_CQ) |
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(1ull << IB_USER_VERBS_CMD_DESTROY_CQ) |
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(1ull << IB_USER_VERBS_CMD_CREATE_QP) |
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(1ull << IB_USER_VERBS_CMD_QUERY_QP) |
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(1ull << IB_USER_VERBS_CMD_MODIFY_QP) |
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(1ull << IB_USER_VERBS_CMD_DESTROY_QP) |
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(1ull << IB_USER_VERBS_CMD_ATTACH_MCAST) |
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(1ull << IB_USER_VERBS_CMD_DETACH_MCAST) |
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(1ull << IB_USER_VERBS_CMD_CREATE_SRQ) |
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(1ull << IB_USER_VERBS_CMD_MODIFY_SRQ) |
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(1ull << IB_USER_VERBS_CMD_QUERY_SRQ) |
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(1ull << IB_USER_VERBS_CMD_DESTROY_SRQ);
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dev->ib_dev.node_type = IB_NODE_CA;
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dev->ib_dev.phys_port_cnt = dev->limits.num_ports;
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@ -1292,6 +1294,7 @@ int mthca_register_device(struct mthca_dev *dev)
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if (dev->mthca_flags & MTHCA_FLAG_SRQ) {
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dev->ib_dev.create_srq = mthca_create_srq;
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dev->ib_dev.modify_srq = mthca_modify_srq;
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dev->ib_dev.query_srq = mthca_query_srq;
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dev->ib_dev.destroy_srq = mthca_destroy_srq;
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if (mthca_is_memfree(dev))
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@ -1302,6 +1305,7 @@ int mthca_register_device(struct mthca_dev *dev)
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dev->ib_dev.create_qp = mthca_create_qp;
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dev->ib_dev.modify_qp = mthca_modify_qp;
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dev->ib_dev.query_qp = mthca_query_qp;
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dev->ib_dev.destroy_qp = mthca_destroy_qp;
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dev->ib_dev.create_cq = mthca_create_cq;
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dev->ib_dev.resize_cq = mthca_resize_cq;
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@ -348,6 +348,141 @@ static __be32 get_hw_access_flags(struct mthca_qp *qp, struct ib_qp_attr *attr,
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return cpu_to_be32(hw_access_flags);
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}
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static inline enum ib_qp_state to_ib_qp_state(int mthca_state)
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{
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switch (mthca_state) {
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case MTHCA_QP_STATE_RST: return IB_QPS_RESET;
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case MTHCA_QP_STATE_INIT: return IB_QPS_INIT;
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case MTHCA_QP_STATE_RTR: return IB_QPS_RTR;
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case MTHCA_QP_STATE_RTS: return IB_QPS_RTS;
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case MTHCA_QP_STATE_DRAINING:
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case MTHCA_QP_STATE_SQD: return IB_QPS_SQD;
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case MTHCA_QP_STATE_SQE: return IB_QPS_SQE;
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case MTHCA_QP_STATE_ERR: return IB_QPS_ERR;
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default: return -1;
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}
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}
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static inline enum ib_mig_state to_ib_mig_state(int mthca_mig_state)
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{
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switch (mthca_mig_state) {
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case 0: return IB_MIG_ARMED;
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case 1: return IB_MIG_REARM;
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case 3: return IB_MIG_MIGRATED;
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default: return -1;
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}
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}
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static int to_ib_qp_access_flags(int mthca_flags)
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{
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int ib_flags = 0;
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if (mthca_flags & MTHCA_QP_BIT_RRE)
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ib_flags |= IB_ACCESS_REMOTE_READ;
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if (mthca_flags & MTHCA_QP_BIT_RWE)
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ib_flags |= IB_ACCESS_REMOTE_WRITE;
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if (mthca_flags & MTHCA_QP_BIT_RAE)
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ib_flags |= IB_ACCESS_REMOTE_ATOMIC;
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return ib_flags;
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}
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static void to_ib_ah_attr(struct mthca_dev *dev, struct ib_ah_attr *ib_ah_attr,
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struct mthca_qp_path *path)
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{
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memset(ib_ah_attr, 0, sizeof *path);
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ib_ah_attr->port_num = (be32_to_cpu(path->port_pkey) >> 24) & 0x3;
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ib_ah_attr->dlid = be16_to_cpu(path->rlid);
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ib_ah_attr->sl = be32_to_cpu(path->sl_tclass_flowlabel) >> 28;
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ib_ah_attr->src_path_bits = path->g_mylmc & 0x7f;
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ib_ah_attr->static_rate = path->static_rate & 0x7;
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ib_ah_attr->ah_flags = (path->g_mylmc & (1 << 7)) ? IB_AH_GRH : 0;
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if (ib_ah_attr->ah_flags) {
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ib_ah_attr->grh.sgid_index = path->mgid_index & (dev->limits.gid_table_len - 1);
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ib_ah_attr->grh.hop_limit = path->hop_limit;
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ib_ah_attr->grh.traffic_class =
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(be32_to_cpu(path->sl_tclass_flowlabel) >> 20) & 0xff;
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ib_ah_attr->grh.flow_label =
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be32_to_cpu(path->sl_tclass_flowlabel) & 0xfffff;
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memcpy(ib_ah_attr->grh.dgid.raw,
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path->rgid, sizeof ib_ah_attr->grh.dgid.raw);
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}
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}
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int mthca_query_qp(struct ib_qp *ibqp, struct ib_qp_attr *qp_attr, int qp_attr_mask,
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struct ib_qp_init_attr *qp_init_attr)
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{
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struct mthca_dev *dev = to_mdev(ibqp->device);
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struct mthca_qp *qp = to_mqp(ibqp);
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int err;
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struct mthca_mailbox *mailbox;
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struct mthca_qp_param *qp_param;
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struct mthca_qp_context *context;
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int mthca_state;
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u8 status;
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mailbox = mthca_alloc_mailbox(dev, GFP_KERNEL);
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if (IS_ERR(mailbox))
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return PTR_ERR(mailbox);
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err = mthca_QUERY_QP(dev, qp->qpn, 0, mailbox, &status);
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if (err)
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goto out;
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if (status) {
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mthca_warn(dev, "QUERY_QP returned status %02x\n", status);
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err = -EINVAL;
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goto out;
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}
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qp_param = mailbox->buf;
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context = &qp_param->context;
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mthca_state = be32_to_cpu(context->flags) >> 28;
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qp_attr->qp_state = to_ib_qp_state(mthca_state);
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qp_attr->cur_qp_state = qp_attr->qp_state;
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qp_attr->path_mtu = context->mtu_msgmax >> 5;
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qp_attr->path_mig_state =
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to_ib_mig_state((be32_to_cpu(context->flags) >> 11) & 0x3);
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qp_attr->qkey = be32_to_cpu(context->qkey);
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qp_attr->rq_psn = be32_to_cpu(context->rnr_nextrecvpsn) & 0xffffff;
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qp_attr->sq_psn = be32_to_cpu(context->next_send_psn) & 0xffffff;
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qp_attr->dest_qp_num = be32_to_cpu(context->remote_qpn) & 0xffffff;
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qp_attr->qp_access_flags =
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to_ib_qp_access_flags(be32_to_cpu(context->params2));
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qp_attr->cap.max_send_wr = qp->sq.max;
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qp_attr->cap.max_recv_wr = qp->rq.max;
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qp_attr->cap.max_send_sge = qp->sq.max_gs;
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qp_attr->cap.max_recv_sge = qp->rq.max_gs;
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qp_attr->cap.max_inline_data = qp->max_inline_data;
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to_ib_ah_attr(dev, &qp_attr->ah_attr, &context->pri_path);
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to_ib_ah_attr(dev, &qp_attr->alt_ah_attr, &context->alt_path);
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qp_attr->pkey_index = be32_to_cpu(context->pri_path.port_pkey) & 0x7f;
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qp_attr->alt_pkey_index = be32_to_cpu(context->alt_path.port_pkey) & 0x7f;
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/* qp_attr->en_sqd_async_notify is only applicable in modify qp */
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qp_attr->sq_draining = mthca_state == MTHCA_QP_STATE_DRAINING;
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qp_attr->max_rd_atomic = 1 << ((be32_to_cpu(context->params1) >> 21) & 0x7);
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qp_attr->max_dest_rd_atomic =
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1 << ((be32_to_cpu(context->params2) >> 21) & 0x7);
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qp_attr->min_rnr_timer =
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(be32_to_cpu(context->rnr_nextrecvpsn) >> 24) & 0x1f;
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qp_attr->port_num = qp_attr->ah_attr.port_num;
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qp_attr->timeout = context->pri_path.ackto >> 3;
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qp_attr->retry_cnt = (be32_to_cpu(context->params1) >> 16) & 0x7;
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qp_attr->rnr_retry = context->pri_path.rnr_retry >> 5;
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qp_attr->alt_port_num = qp_attr->alt_ah_attr.port_num;
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qp_attr->alt_timeout = context->alt_path.ackto >> 3;
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qp_init_attr->cap = qp_attr->cap;
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out:
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mthca_free_mailbox(dev, mailbox);
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return err;
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}
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static void mthca_path_set(struct ib_ah_attr *ah, struct mthca_qp_path *path)
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{
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path->g_mylmc = ah->src_path_bits & 0x7f;
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@ -360,6 +360,38 @@ int mthca_modify_srq(struct ib_srq *ibsrq, struct ib_srq_attr *attr,
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return 0;
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}
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int mthca_query_srq(struct ib_srq *ibsrq, struct ib_srq_attr *srq_attr)
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{
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struct mthca_dev *dev = to_mdev(ibsrq->device);
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struct mthca_srq *srq = to_msrq(ibsrq);
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struct mthca_mailbox *mailbox;
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struct mthca_arbel_srq_context *arbel_ctx;
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u8 status;
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int err;
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mailbox = mthca_alloc_mailbox(dev, GFP_KERNEL);
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if (IS_ERR(mailbox))
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return PTR_ERR(mailbox);
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err = mthca_QUERY_SRQ(dev, srq->srqn, mailbox, &status);
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if (err)
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goto out;
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if (mthca_is_memfree(dev)) {
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arbel_ctx = mailbox->buf;
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srq_attr->srq_limit = arbel_ctx->limit_watermark;
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} else
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srq_attr->srq_limit = 0;
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srq_attr->max_wr = srq->max;
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srq_attr->max_sge = srq->max_gs;
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out:
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mthca_free_mailbox(dev, mailbox);
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return err;
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}
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void mthca_srq_event(struct mthca_dev *dev, u32 srqn,
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enum ib_event_type event_type)
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{
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