Merge branch 'drm-armada-fixes' of git://ftp.arm.linux.org.uk/~rmk/linux-arm into drm-fixes
A range of fixes for the Armada DRM driver: - A missing wakeup could result in overlay frames being delayed, causing video playback to hiccup. - Avoid unmapping a dma-buf attachment which was never mapped - Fix the overlay when partially off the screen by switching to the drm_plane_helper_check_update() helper and using the calculated coordinates to set the start address. - Remove an incorrect assignment to crtc->mode - which should be the unadjusted mode. - Fix a missing call to drm_plane_cleanup() in the overlay code. * 'drm-armada-fixes' of git://ftp.arm.linux.org.uk/~rmk/linux-arm: drm/armada: avoid saving the adjusted mode to crtc->mode drm/armada: fix overlay when partially off-screen drm/armada: convert overlay to use drm_plane_helper_check_update() drm/armada: fix gem object free after failed prime import drm/armada: fix incorrect overlay plane cleanup drm/armada: fix missing overlay wake-up
This commit is contained in:
Dave Airlie
Коммит
8f6644ca97
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@ -531,8 +531,6 @@ static int armada_drm_crtc_mode_set(struct drm_crtc *crtc,
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drm_crtc_vblank_off(crtc);
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crtc->mode = *adj;
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val = dcrtc->dumb_ctrl & ~CFG_DUMB_ENA;
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if (val != dcrtc->dumb_ctrl) {
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dcrtc->dumb_ctrl = val;
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@ -69,8 +69,9 @@ void armada_gem_free_object(struct drm_gem_object *obj)
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if (dobj->obj.import_attach) {
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/* We only ever display imported data */
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dma_buf_unmap_attachment(dobj->obj.import_attach, dobj->sgt,
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DMA_TO_DEVICE);
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if (dobj->sgt)
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dma_buf_unmap_attachment(dobj->obj.import_attach,
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dobj->sgt, DMA_TO_DEVICE);
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drm_prime_gem_destroy(&dobj->obj, NULL);
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}
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@ -7,6 +7,7 @@
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* published by the Free Software Foundation.
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*/
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#include <drm/drmP.h>
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#include <drm/drm_plane_helper.h>
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#include "armada_crtc.h"
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#include "armada_drm.h"
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#include "armada_fb.h"
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@ -85,16 +86,8 @@ static void armada_plane_vbl(struct armada_crtc *dcrtc, void *data)
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if (fb)
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armada_drm_queue_unref_work(dcrtc->crtc.dev, fb);
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}
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static unsigned armada_limit(int start, unsigned size, unsigned max)
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{
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int end = start + size;
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if (end < 0)
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return 0;
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if (start < 0)
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start = 0;
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return (unsigned)end > max ? max - start : end - start;
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wake_up(&dplane->vbl.wait);
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}
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static int
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@ -105,26 +98,39 @@ armada_plane_update(struct drm_plane *plane, struct drm_crtc *crtc,
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{
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struct armada_plane *dplane = drm_to_armada_plane(plane);
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struct armada_crtc *dcrtc = drm_to_armada_crtc(crtc);
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struct drm_rect src = {
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.x1 = src_x,
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.y1 = src_y,
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.x2 = src_x + src_w,
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.y2 = src_y + src_h,
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};
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struct drm_rect dest = {
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.x1 = crtc_x,
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.y1 = crtc_y,
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.x2 = crtc_x + crtc_w,
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.y2 = crtc_y + crtc_h,
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};
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const struct drm_rect clip = {
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.x2 = crtc->mode.hdisplay,
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.y2 = crtc->mode.vdisplay,
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};
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uint32_t val, ctrl0;
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unsigned idx = 0;
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bool visible;
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int ret;
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crtc_w = armada_limit(crtc_x, crtc_w, dcrtc->crtc.mode.hdisplay);
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crtc_h = armada_limit(crtc_y, crtc_h, dcrtc->crtc.mode.vdisplay);
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ret = drm_plane_helper_check_update(plane, crtc, fb, &src, &dest, &clip,
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0, INT_MAX, true, false, &visible);
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if (ret)
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return ret;
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ctrl0 = CFG_DMA_FMT(drm_fb_to_armada_fb(fb)->fmt) |
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CFG_DMA_MOD(drm_fb_to_armada_fb(fb)->mod) |
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CFG_CBSH_ENA | CFG_DMA_HSMOOTH | CFG_DMA_ENA;
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/* Does the position/size result in nothing to display? */
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if (crtc_w == 0 || crtc_h == 0) {
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if (!visible)
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ctrl0 &= ~CFG_DMA_ENA;
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}
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/*
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* FIXME: if the starting point is off screen, we need to
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* adjust src_x, src_y, src_w, src_h appropriately, and
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* according to the scale.
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*/
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if (!dcrtc->plane) {
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dcrtc->plane = plane;
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@ -134,15 +140,19 @@ armada_plane_update(struct drm_plane *plane, struct drm_crtc *crtc,
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/* FIXME: overlay on an interlaced display */
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/* Just updating the position/size? */
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if (plane->fb == fb && dplane->ctrl0 == ctrl0) {
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val = (src_h & 0xffff0000) | src_w >> 16;
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val = (drm_rect_height(&src) & 0xffff0000) |
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drm_rect_width(&src) >> 16;
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dplane->src_hw = val;
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writel_relaxed(val, dcrtc->base + LCD_SPU_DMA_HPXL_VLN);
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val = crtc_h << 16 | crtc_w;
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val = drm_rect_height(&dest) << 16 | drm_rect_width(&dest);
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dplane->dst_hw = val;
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writel_relaxed(val, dcrtc->base + LCD_SPU_DZM_HPXL_VLN);
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val = crtc_y << 16 | crtc_x;
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val = dest.y1 << 16 | dest.x1;
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dplane->dst_yx = val;
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writel_relaxed(val, dcrtc->base + LCD_SPU_DMA_OVSA_HPXL_VLN);
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return 0;
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} else if (~dplane->ctrl0 & ctrl0 & CFG_DMA_ENA) {
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/* Power up the Y/U/V FIFOs on ENA 0->1 transitions */
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@ -150,15 +160,14 @@ armada_plane_update(struct drm_plane *plane, struct drm_crtc *crtc,
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dcrtc->base + LCD_SPU_SRAM_PARA1);
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}
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ret = wait_event_timeout(dplane->vbl.wait,
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list_empty(&dplane->vbl.update.node),
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HZ/25);
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if (ret < 0)
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return ret;
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wait_event_timeout(dplane->vbl.wait,
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list_empty(&dplane->vbl.update.node),
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HZ/25);
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if (plane->fb != fb) {
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struct armada_gem_object *obj = drm_fb_obj(fb);
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uint32_t sy, su, sv;
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uint32_t addr[3], pixel_format;
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int i, num_planes, hsub;
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/*
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* Take a reference on the new framebuffer - we want to
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@ -178,26 +187,39 @@ armada_plane_update(struct drm_plane *plane, struct drm_crtc *crtc,
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older_fb);
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}
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src_y >>= 16;
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src_x >>= 16;
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sy = obj->dev_addr + fb->offsets[0] + src_y * fb->pitches[0] +
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src_x * fb->bits_per_pixel / 8;
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su = obj->dev_addr + fb->offsets[1] + src_y * fb->pitches[1] +
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src_x;
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sv = obj->dev_addr + fb->offsets[2] + src_y * fb->pitches[2] +
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src_x;
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src_y = src.y1 >> 16;
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src_x = src.x1 >> 16;
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armada_reg_queue_set(dplane->vbl.regs, idx, sy,
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pixel_format = fb->pixel_format;
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hsub = drm_format_horz_chroma_subsampling(pixel_format);
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num_planes = drm_format_num_planes(pixel_format);
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/*
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* Annoyingly, shifting a YUYV-format image by one pixel
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* causes the U/V planes to toggle. Toggle the UV swap.
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* (Unfortunately, this causes momentary colour flickering.)
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*/
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if (src_x & (hsub - 1) && num_planes == 1)
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ctrl0 ^= CFG_DMA_MOD(CFG_SWAPUV);
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for (i = 0; i < num_planes; i++)
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addr[i] = obj->dev_addr + fb->offsets[i] +
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src_y * fb->pitches[i] +
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src_x * drm_format_plane_cpp(pixel_format, i);
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for (; i < ARRAY_SIZE(addr); i++)
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addr[i] = 0;
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armada_reg_queue_set(dplane->vbl.regs, idx, addr[0],
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LCD_SPU_DMA_START_ADDR_Y0);
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armada_reg_queue_set(dplane->vbl.regs, idx, su,
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armada_reg_queue_set(dplane->vbl.regs, idx, addr[1],
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LCD_SPU_DMA_START_ADDR_U0);
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armada_reg_queue_set(dplane->vbl.regs, idx, sv,
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armada_reg_queue_set(dplane->vbl.regs, idx, addr[2],
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LCD_SPU_DMA_START_ADDR_V0);
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armada_reg_queue_set(dplane->vbl.regs, idx, sy,
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armada_reg_queue_set(dplane->vbl.regs, idx, addr[0],
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LCD_SPU_DMA_START_ADDR_Y1);
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armada_reg_queue_set(dplane->vbl.regs, idx, su,
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armada_reg_queue_set(dplane->vbl.regs, idx, addr[1],
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LCD_SPU_DMA_START_ADDR_U1);
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armada_reg_queue_set(dplane->vbl.regs, idx, sv,
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armada_reg_queue_set(dplane->vbl.regs, idx, addr[2],
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LCD_SPU_DMA_START_ADDR_V1);
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val = fb->pitches[0] << 16 | fb->pitches[0];
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@ -208,24 +230,27 @@ armada_plane_update(struct drm_plane *plane, struct drm_crtc *crtc,
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LCD_SPU_DMA_PITCH_UV);
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}
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val = (src_h & 0xffff0000) | src_w >> 16;
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val = (drm_rect_height(&src) & 0xffff0000) | drm_rect_width(&src) >> 16;
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if (dplane->src_hw != val) {
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dplane->src_hw = val;
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armada_reg_queue_set(dplane->vbl.regs, idx, val,
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LCD_SPU_DMA_HPXL_VLN);
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}
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val = crtc_h << 16 | crtc_w;
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val = drm_rect_height(&dest) << 16 | drm_rect_width(&dest);
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if (dplane->dst_hw != val) {
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dplane->dst_hw = val;
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armada_reg_queue_set(dplane->vbl.regs, idx, val,
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LCD_SPU_DZM_HPXL_VLN);
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}
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val = crtc_y << 16 | crtc_x;
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val = dest.y1 << 16 | dest.x1;
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if (dplane->dst_yx != val) {
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dplane->dst_yx = val;
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armada_reg_queue_set(dplane->vbl.regs, idx, val,
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LCD_SPU_DMA_OVSA_HPXL_VLN);
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}
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if (dplane->ctrl0 != ctrl0) {
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dplane->ctrl0 = ctrl0;
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armada_reg_queue_mod(dplane->vbl.regs, idx, ctrl0,
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@ -279,7 +304,11 @@ static int armada_plane_disable(struct drm_plane *plane)
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static void armada_plane_destroy(struct drm_plane *plane)
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{
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kfree(plane);
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struct armada_plane *dplane = drm_to_armada_plane(plane);
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drm_plane_cleanup(plane);
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kfree(dplane);
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}
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static int armada_plane_set_property(struct drm_plane *plane,
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